arch/arm/boot/dts/tegra20-seaboard.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/input/input.h>
   4 #include "tegra20.dtsi"
   5
   6 / {
   7         model = "NVIDIA Seaboard";
   8         compatible = "nvidia,seaboard", "nvidia,tegra20";
   9
  10         aliases {
  11                 rtc0 = "/i2c@7000d000/tps6586x@34";
  12                 rtc1 = "/rtc@7000e000";
  13                 serial0 = &uartd;
  14         };
  15
  16         memory {
  17                 reg = <0x00000000 0x40000000>;
  18         };
  19
  20         host1x@50000000 {
  21                 dc@54200000 {
  22                         rgb {
  23                                 status = "okay";
  24
  25                                 nvidia,panel = <&panel>;
  26                         };
  27                 };
  28
  29                 hdmi@54280000 {
  30                         status = "okay";
  31
  32                         vdd-supply = <&hdmi_vdd_reg>;
  33                         pll-supply = <&hdmi_pll_reg>;
  34
  35                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  36                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
  37                                 GPIO_ACTIVE_HIGH>;
  38                 };
  39         };
  40
  41         pinmux@70000014 {
  42                 pinctrl-names = "default";
  43                 pinctrl-0 = <&state_default>;
  44
  45                 state_default: pinmux {
  46                         ata {
  47                                 nvidia,pins = "ata";
  48                                 nvidia,function = "ide";
  49                         };
  50                         atb {
  51                                 nvidia,pins = "atb", "gma", "gme";
  52                                 nvidia,function = "sdio4";
  53                         };
  54                         atc {
  55                                 nvidia,pins = "atc";
  56                                 nvidia,function = "nand";
  57                         };
  58                         atd {
  59                                 nvidia,pins = "atd", "ate", "gmb", "spia",
  60                                         "spib", "spic";
  61                                 nvidia,function = "gmi";
  62                         };
  63                         cdev1 {
  64                                 nvidia,pins = "cdev1";
  65                                 nvidia,function = "plla_out";
  66                         };
  67                         cdev2 {
  68                                 nvidia,pins = "cdev2";
  69                                 nvidia,function = "pllp_out4";
  70                         };
  71                         crtp {
  72                                 nvidia,pins = "crtp", "lm1";
  73                                 nvidia,function = "crt";
  74                         };
  75                         csus {
  76                                 nvidia,pins = "csus";
  77                                 nvidia,function = "vi_sensor_clk";
  78                         };
  79                         dap1 {
  80                                 nvidia,pins = "dap1";
  81                                 nvidia,function = "dap1";
  82                         };
  83                         dap2 {
  84                                 nvidia,pins = "dap2";
  85                                 nvidia,function = "dap2";
  86                         };
  87                         dap3 {
  88                                 nvidia,pins = "dap3";
  89                                 nvidia,function = "dap3";
  90                         };
  91                         dap4 {
  92                                 nvidia,pins = "dap4";
  93                                 nvidia,function = "dap4";
  94                         };
  95                         dta {
  96                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
  97                                 nvidia,function = "vi";
  98                         };
  99                         dtf {
 100                                 nvidia,pins = "dtf";
 101                                 nvidia,function = "i2c3";
 102                         };
 103                         gmc {
 104                                 nvidia,pins = "gmc";
 105                                 nvidia,function = "uartd";
 106                         };
 107                         gmd {
 108                                 nvidia,pins = "gmd";
 109                                 nvidia,function = "sflash";
 110                         };
 111                         gpu {
 112                                 nvidia,pins = "gpu";
 113                                 nvidia,function = "pwm";
 114                         };
 115                         gpu7 {
 116                                 nvidia,pins = "gpu7";
 117                                 nvidia,function = "rtck";
 118                         };
 119                         gpv {
 120                                 nvidia,pins = "gpv", "slxa", "slxk";
 121                                 nvidia,function = "pcie";
 122                         };
 123                         hdint {
 124                                 nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
 125                                         "lsck", "lsda";
 126                                 nvidia,function = "hdmi";
 127                         };
 128                         i2cp {
 129                                 nvidia,pins = "i2cp";
 130                                 nvidia,function = "i2cp";
 131                         };
 132                         irrx {
 133                                 nvidia,pins = "irrx", "irtx";
 134                                 nvidia,function = "uartb";
 135                         };
 136                         kbca {
 137                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 138                                         "kbce", "kbcf";
 139                                 nvidia,function = "kbc";
 140                         };
 141                         lcsn {
 142                                 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
 143                                         "lsdi", "lvp0";
 144                                 nvidia,function = "rsvd4";
 145                         };
 146                         ld0 {
 147                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 148                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 149                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 150                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 151                                         "lhp1", "lhp2", "lhs", "lpp", "lsc0",
 152                                         "lspi", "lvp1", "lvs";
 153                                 nvidia,function = "displaya";
 154                         };
 155                         owc {
 156                                 nvidia,pins = "owc", "spdi", "spdo", "uac";
 157                                 nvidia,function = "rsvd2";
 158                         };
 159                         pmc {
 160                                 nvidia,pins = "pmc";
 161                                 nvidia,function = "pwr_on";
 162                         };
 163                         rm {
 164                                 nvidia,pins = "rm";
 165                                 nvidia,function = "i2c1";
 166                         };
 167                         sdb {
 168                                 nvidia,pins = "sdb", "sdc", "sdd";
 169                                 nvidia,function = "sdio3";
 170                         };
 171                         sdio1 {
 172                                 nvidia,pins = "sdio1";
 173                                 nvidia,function = "sdio1";
 174                         };
 175                         slxc {
 176                                 nvidia,pins = "slxc", "slxd";
 177                                 nvidia,function = "spdif";
 178                         };
 179                         spid {
 180                                 nvidia,pins = "spid", "spie", "spif";
 181                                 nvidia,function = "spi1";
 182                         };
 183                         spig {
 184                                 nvidia,pins = "spig", "spih";
 185                                 nvidia,function = "spi2_alt";
 186                         };
 187                         uaa {
 188                                 nvidia,pins = "uaa", "uab", "uda";
 189                                 nvidia,function = "ulpi";
 190                         };
 191                         uad {
 192                                 nvidia,pins = "uad";
 193                                 nvidia,function = "irda";
 194                         };
 195                         uca {
 196                                 nvidia,pins = "uca", "ucb";
 197                                 nvidia,function = "uartc";
 198                         };
 199                         conf_ata {
 200                                 nvidia,pins = "ata", "atb", "atc", "atd",
 201                                         "cdev1", "cdev2", "dap1", "dap2",
 202                                         "dap4", "ddc", "dtf", "gma", "gmc", "gmd",
 203                                         "gme", "gpu", "gpu7", "i2cp", "irrx",
 204                                         "irtx", "pta", "rm", "sdc", "sdd",
 205                                         "slxd", "slxk", "spdi", "spdo", "uac",
 206                                         "uad", "uca", "ucb", "uda";
 207                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 208                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 209                         };
 210                         conf_ate {
 211                                 nvidia,pins = "ate", "csus", "dap3",
 212                                         "gpv", "owc", "slxc", "spib", "spid",
 213                                         "spie";
 214                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 215                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 216                         };
 217                         conf_ck32 {
 218                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
 219                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
 220                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 221                         };
 222                         conf_crtp {
 223                                 nvidia,pins = "crtp", "gmb", "slxa", "spia",
 224                                         "spig", "spih";
 225                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 226                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 227                         };
 228                         conf_dta {
 229                                 nvidia,pins = "dta", "dtb", "dtc", "dtd";
 230                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 231                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 232                         };
 233                         conf_dte {
 234                                 nvidia,pins = "dte", "spif";
 235                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 236                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 237                         };
 238                         conf_hdint {
 239                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
 240                                         "lpw1", "lsc1", "lsck", "lsda", "lsdi",
 241                                         "lvp0";
 242                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 243                         };
 244                         conf_kbca {
 245                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 246                                         "kbce", "kbcf", "sdio1", "spic", "uaa",
 247                                         "uab";
 248                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 249                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 250                         };
 251                         conf_lc {
 252                                 nvidia,pins = "lc", "ls";
 253                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 254                         };
 255                         conf_ld0 {
 256                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 257                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 258                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 259                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 260                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
 261                                         "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
 262                                         "lvs", "pmc", "sdb";
 263                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 264                         };
 265                         conf_ld17_0 {
 266                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
 267                                         "ld23_22";
 268                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 269                         };
 270                         drive_sdio1 {
 271                                 nvidia,pins = "drive_sdio1";
 272                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 273                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 274                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 275                                 nvidia,pull-down-strength = <31>;
 276                                 nvidia,pull-up-strength = <31>;
 277                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 278                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 279                         };
 280                 };
 281
 282                 state_i2cmux_ddc: pinmux_i2cmux_ddc {
 283                         ddc {
 284                                 nvidia,pins = "ddc";
 285                                 nvidia,function = "i2c2";
 286                         };
 287                         pta {
 288                                 nvidia,pins = "pta";
 289                                 nvidia,function = "rsvd4";
 290                         };
 291                 };
 292
 293                 state_i2cmux_pta: pinmux_i2cmux_pta {
 294                         ddc {
 295                                 nvidia,pins = "ddc";
 296                                 nvidia,function = "rsvd4";
 297                         };
 298                         pta {
 299                                 nvidia,pins = "pta";
 300                                 nvidia,function = "i2c2";
 301                         };
 302                 };
 303
 304                 state_i2cmux_idle: pinmux_i2cmux_idle {
 305                         ddc {
 306                                 nvidia,pins = "ddc";
 307                                 nvidia,function = "rsvd4";
 308                         };
 309                         pta {
 310                                 nvidia,pins = "pta";
 311                                 nvidia,function = "rsvd4";
 312                         };
 313                 };
 314         };
 315
 316         i2s@70002800 {
 317                 status = "okay";
 318         };
 319
 320         serial@70006300 {
 321                 status = "okay";
 322         };
 323
 324         pwm: pwm@7000a000 {
 325                 status = "okay";
 326         };
 327
 328         i2c@7000c000 {
 329                 status = "okay";
 330                 clock-frequency = <400000>;
 331
 332                 wm8903: wm8903@1a {
 333                         compatible = "wlf,wm8903";
 334                         reg = <0x1a>;
 335                         interrupt-parent = <&gpio>;
 336                         interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
 337
 338                         gpio-controller;
 339                         #gpio-cells = <2>;
 340
 341                         micdet-cfg = <0>;
 342                         micdet-delay = <100>;
 343                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
 344                 };
 345
 346                 /* ALS and proximity sensor */
 347                 isl29018@44 {
 348                         compatible = "isil,isl29018";
 349                         reg = <0x44>;
 350                         interrupt-parent = <&gpio>;
 351                         interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
 352                 };
 353
 354                 gyrometer@68 {
 355                         compatible = "invn,mpu3050";
 356                         reg = <0x68>;
 357                         interrupt-parent = <&gpio>;
 358                         interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>;
 359                 };
 360         };
 361
 362         i2c@7000c400 {
 363                 status = "okay";
 364                 clock-frequency = <100000>;
 365         };
 366
 367         i2cmux {
 368                 compatible = "i2c-mux-pinctrl";
 369                 #address-cells = <1>;
 370                 #size-cells = <0>;
 371
 372                 i2c-parent = <&{/i2c@7000c400}>;
 373
 374                 pinctrl-names = "ddc", "pta", "idle";
 375                 pinctrl-0 = <&state_i2cmux_ddc>;
 376                 pinctrl-1 = <&state_i2cmux_pta>;
 377                 pinctrl-2 = <&state_i2cmux_idle>;
 378
 379                 hdmi_ddc: i2c@0 {
 380                         reg = <0>;
 381                         #address-cells = <1>;
 382                         #size-cells = <0>;
 383                 };
 384
 385                 lvds_ddc: i2c@1 {
 386                         reg = <1>;
 387                         #address-cells = <1>;
 388                         #size-cells = <0>;
 389
 390                         smart-battery@b {
 391                                 compatible = "ti,bq20z75", "smart-battery-1.1";
 392                                 reg = <0xb>;
 393                                 ti,i2c-retry-count = <2>;
 394                                 ti,poll-retry-count = <10>;
 395                         };
 396                 };
 397         };
 398
 399         i2c@7000c500 {
 400                 status = "okay";
 401                 clock-frequency = <400000>;
 402         };
 403
 404         i2c@7000d000 {
 405                 status = "okay";
 406                 clock-frequency = <400000>;
 407
 408                 magnetometer@c {
 409                         compatible = "asahi-kasei,ak8975";
 410                         reg = <0xc>;
 411                         interrupt-parent = <&gpio>;
 412                         interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
 413                 };
 414
 415                 pmic: tps6586x@34 {
 416                         compatible = "ti,tps6586x";
 417                         reg = <0x34>;
 418                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 419
 420                         ti,system-power-controller;
 421
 422                         #gpio-cells = <2>;
 423                         gpio-controller;
 424
 425                         sys-supply = <&vdd_5v0_reg>;
 426                         vin-sm0-supply = <&sys_reg>;
 427                         vin-sm1-supply = <&sys_reg>;
 428                         vin-sm2-supply = <&sys_reg>;
 429                         vinldo01-supply = <&sm2_reg>;
 430                         vinldo23-supply = <&sm2_reg>;
 431                         vinldo4-supply = <&sm2_reg>;
 432                         vinldo678-supply = <&sm2_reg>;
 433                         vinldo9-supply = <&sm2_reg>;
 434
 435                         regulators {
 436                                 sys_reg: sys {
 437                                         regulator-name = "vdd_sys";
 438                                         regulator-always-on;
 439                                 };
 440
 441                                 sm0 {
 442                                         regulator-name = "vdd_sm0,vdd_core";
 443                                         regulator-min-microvolt = <1300000>;
 444                                         regulator-max-microvolt = <1300000>;
 445                                         regulator-always-on;
 446                                 };
 447
 448                                 sm1 {
 449                                         regulator-name = "vdd_sm1,vdd_cpu";
 450                                         regulator-min-microvolt = <1125000>;
 451                                         regulator-max-microvolt = <1125000>;
 452                                         regulator-always-on;
 453                                 };
 454
 455                                 sm2_reg: sm2 {
 456                                         regulator-name = "vdd_sm2,vin_ldo*";
 457                                         regulator-min-microvolt = <3700000>;
 458                                         regulator-max-microvolt = <3700000>;
 459                                         regulator-always-on;
 460                                 };
 461
 462                                 /* LDO0 is not connected to anything */
 463
 464                                 ldo1 {
 465                                         regulator-name = "vdd_ldo1,avdd_pll*";
 466                                         regulator-min-microvolt = <1100000>;
 467                                         regulator-max-microvolt = <1100000>;
 468                                         regulator-always-on;
 469                                 };
 470
 471                                 ldo2 {
 472                                         regulator-name = "vdd_ldo2,vdd_rtc";
 473                                         regulator-min-microvolt = <1200000>;
 474                                         regulator-max-microvolt = <1200000>;
 475                                 };
 476
 477                                 ldo3 {
 478                                         regulator-name = "vdd_ldo3,avdd_usb*";
 479                                         regulator-min-microvolt = <3300000>;
 480                                         regulator-max-microvolt = <3300000>;
 481                                         regulator-always-on;
 482                                 };
 483
 484                                 ldo4 {
 485                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
 486                                         regulator-min-microvolt = <1800000>;
 487                                         regulator-max-microvolt = <1800000>;
 488                                         regulator-always-on;
 489                                 };
 490
 491                                 ldo5 {
 492                                         regulator-name = "vdd_ldo5,vcore_mmc";
 493                                         regulator-min-microvolt = <2850000>;
 494                                         regulator-max-microvolt = <2850000>;
 495                                         regulator-always-on;
 496                                 };
 497
 498                                 ldo6 {
 499                                         regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
 500                                         regulator-min-microvolt = <1800000>;
 501                                         regulator-max-microvolt = <1800000>;
 502                                 };
 503
 504                                 hdmi_vdd_reg: ldo7 {
 505                                         regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
 506                                         regulator-min-microvolt = <3300000>;
 507                                         regulator-max-microvolt = <3300000>;
 508                                 };
 509
 510                                 hdmi_pll_reg: ldo8 {
 511                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
 512                                         regulator-min-microvolt = <1800000>;
 513                                         regulator-max-microvolt = <1800000>;
 514                                 };
 515
 516                                 ldo9 {
 517                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
 518                                         regulator-min-microvolt = <2850000>;
 519                                         regulator-max-microvolt = <2850000>;
 520                                         regulator-always-on;
 521                                 };
 522
 523                                 ldo_rtc {
 524                                         regulator-name = "vdd_rtc_out,vdd_cell";
 525                                         regulator-min-microvolt = <3300000>;
 526                                         regulator-max-microvolt = <3300000>;
 527                                         regulator-always-on;
 528                                 };
 529                         };
 530                 };
 531
 532                 temperature-sensor@4c {
 533                         compatible = "onnn,nct1008";
 534                         reg = <0x4c>;
 535                 };
 536         };
 537
 538         kbc@7000e200 {
 539                 status = "okay";
 540                 nvidia,debounce-delay-ms = <32>;
 541                 nvidia,repeat-delay-ms = <160>;
 542                 nvidia,ghost-filter;
 543                 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
 544                 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
 545                 linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W)
 546                                 MATRIX_KEY(0x00, 0x03, KEY_S)
 547                                 MATRIX_KEY(0x00, 0x04, KEY_A)
 548                                 MATRIX_KEY(0x00, 0x05, KEY_Z)
 549                                 MATRIX_KEY(0x00, 0x07, KEY_FN)
 550
 551                                 MATRIX_KEY(0x01, 0x07, KEY_LEFTMETA)
 552                                 MATRIX_KEY(0x02, 0x06, KEY_RIGHTALT)
 553                                 MATRIX_KEY(0x02, 0x07, KEY_LEFTALT)
 554
 555                                 MATRIX_KEY(0x03, 0x00, KEY_5)
 556                                 MATRIX_KEY(0x03, 0x01, KEY_4)
 557                                 MATRIX_KEY(0x03, 0x02, KEY_R)
 558                                 MATRIX_KEY(0x03, 0x03, KEY_E)
 559                                 MATRIX_KEY(0x03, 0x04, KEY_F)
 560                                 MATRIX_KEY(0x03, 0x05, KEY_D)
 561                                 MATRIX_KEY(0x03, 0x06, KEY_X)
 562
 563                                 MATRIX_KEY(0x04, 0x00, KEY_7)
 564                                 MATRIX_KEY(0x04, 0x01, KEY_6)
 565                                 MATRIX_KEY(0x04, 0x02, KEY_T)
 566                                 MATRIX_KEY(0x04, 0x03, KEY_H)
 567                                 MATRIX_KEY(0x04, 0x04, KEY_G)
 568                                 MATRIX_KEY(0x04, 0x05, KEY_V)
 569                                 MATRIX_KEY(0x04, 0x06, KEY_C)
 570                                 MATRIX_KEY(0x04, 0x07, KEY_SPACE)
 571
 572                                 MATRIX_KEY(0x05, 0x00, KEY_9)
 573                                 MATRIX_KEY(0x05, 0x01, KEY_8)
 574                                 MATRIX_KEY(0x05, 0x02, KEY_U)
 575                                 MATRIX_KEY(0x05, 0x03, KEY_Y)
 576                                 MATRIX_KEY(0x05, 0x04, KEY_J)
 577                                 MATRIX_KEY(0x05, 0x05, KEY_N)
 578                                 MATRIX_KEY(0x05, 0x06, KEY_B)
 579                                 MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH)
 580
 581                                 MATRIX_KEY(0x06, 0x00, KEY_MINUS)
 582                                 MATRIX_KEY(0x06, 0x01, KEY_0)
 583                                 MATRIX_KEY(0x06, 0x02, KEY_O)
 584                                 MATRIX_KEY(0x06, 0x03, KEY_I)
 585                                 MATRIX_KEY(0x06, 0x04, KEY_L)
 586                                 MATRIX_KEY(0x06, 0x05, KEY_K)
 587                                 MATRIX_KEY(0x06, 0x06, KEY_COMMA)
 588                                 MATRIX_KEY(0x06, 0x07, KEY_M)
 589
 590                                 MATRIX_KEY(0x07, 0x01, KEY_EQUAL)
 591                                 MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE)
 592                                 MATRIX_KEY(0x07, 0x03, KEY_ENTER)
 593                                 MATRIX_KEY(0x07, 0x07, KEY_MENU)
 594
 595                                 MATRIX_KEY(0x08, 0x04, KEY_RIGHTSHIFT)
 596                                 MATRIX_KEY(0x08, 0x05, KEY_LEFTSHIFT)
 597
 598                                 MATRIX_KEY(0x09, 0x05, KEY_RIGHTCTRL)
 599                                 MATRIX_KEY(0x09, 0x07, KEY_LEFTCTRL)
 600
 601                                 MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE)
 602                                 MATRIX_KEY(0x0B, 0x01, KEY_P)
 603                                 MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE)
 604                                 MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON)
 605                                 MATRIX_KEY(0x0B, 0x04, KEY_SLASH)
 606                                 MATRIX_KEY(0x0B, 0x05, KEY_DOT)
 607
 608                                 MATRIX_KEY(0x0C, 0x00, KEY_F10)
 609                                 MATRIX_KEY(0x0C, 0x01, KEY_F9)
 610                                 MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE)
 611                                 MATRIX_KEY(0x0C, 0x03, KEY_3)
 612                                 MATRIX_KEY(0x0C, 0x04, KEY_2)
 613                                 MATRIX_KEY(0x0C, 0x05, KEY_UP)
 614                                 MATRIX_KEY(0x0C, 0x06, KEY_PRINT)
 615                                 MATRIX_KEY(0x0C, 0x07, KEY_PAUSE)
 616
 617                                 MATRIX_KEY(0x0D, 0x00, KEY_INSERT)
 618                                 MATRIX_KEY(0x0D, 0x01, KEY_DELETE)
 619                                 MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP )
 620                                 MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN)
 621                                 MATRIX_KEY(0x0D, 0x05, KEY_RIGHT)
 622                                 MATRIX_KEY(0x0D, 0x06, KEY_DOWN)
 623                                 MATRIX_KEY(0x0D, 0x07, KEY_LEFT)
 624
 625                                 MATRIX_KEY(0x0E, 0x00, KEY_F11)
 626                                 MATRIX_KEY(0x0E, 0x01, KEY_F12)
 627                                 MATRIX_KEY(0x0E, 0x02, KEY_F8)
 628                                 MATRIX_KEY(0x0E, 0x03, KEY_Q)
 629                                 MATRIX_KEY(0x0E, 0x04, KEY_F4)
 630                                 MATRIX_KEY(0x0E, 0x05, KEY_F3)
 631                                 MATRIX_KEY(0x0E, 0x06, KEY_1)
 632                                 MATRIX_KEY(0x0E, 0x07, KEY_F7)
 633
 634                                 MATRIX_KEY(0x0F, 0x00, KEY_ESC)
 635                                 MATRIX_KEY(0x0F, 0x01, KEY_GRAVE)
 636                                 MATRIX_KEY(0x0F, 0x02, KEY_F5)
 637                                 MATRIX_KEY(0x0F, 0x03, KEY_TAB)
 638                                 MATRIX_KEY(0x0F, 0x04, KEY_F1)
 639                                 MATRIX_KEY(0x0F, 0x05, KEY_F2)
 640                                 MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK)
 641                                 MATRIX_KEY(0x0F, 0x07, KEY_F6)
 642
 643                                 /* Software Handled Function Keys */
 644                                 MATRIX_KEY(0x14, 0x00, KEY_KP7)
 645
 646                                 MATRIX_KEY(0x15, 0x00, KEY_KP9)
 647                                 MATRIX_KEY(0x15, 0x01, KEY_KP8)
 648                                 MATRIX_KEY(0x15, 0x02, KEY_KP4)
 649                                 MATRIX_KEY(0x15, 0x04, KEY_KP1)
 650
 651                                 MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
 652                                 MATRIX_KEY(0x16, 0x02, KEY_KP6)
 653                                 MATRIX_KEY(0x16, 0x03, KEY_KP5)
 654                                 MATRIX_KEY(0x16, 0x04, KEY_KP3)
 655                                 MATRIX_KEY(0x16, 0x05, KEY_KP2)
 656                                 MATRIX_KEY(0x16, 0x07, KEY_KP0)
 657
 658                                 MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK)
 659                                 MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS)
 660                                 MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS)
 661                                 MATRIX_KEY(0x1B, 0x05, KEY_KPDOT)
 662
 663                                 MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP)
 664
 665                                 MATRIX_KEY(0x1D, 0x03, KEY_HOME)
 666                                 MATRIX_KEY(0x1D, 0x04, KEY_END)
 667                                 MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSDOWN)
 668                                 MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN)
 669                                 MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSUP)
 670
 671                                 MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK)
 672                                 MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK)
 673                                 MATRIX_KEY(0x1E, 0x02, KEY_MUTE)
 674
 675                                 MATRIX_KEY(0x1F, 0x04, KEY_HELP)>;
 676         };
 677
 678         pmc@7000e400 {
 679                 nvidia,invert-interrupt;
 680                 nvidia,suspend-mode = <1>;
 681                 nvidia,cpu-pwr-good-time = <5000>;
 682                 nvidia,cpu-pwr-off-time = <5000>;
 683                 nvidia,core-pwr-good-time = <3845 3845>;
 684                 nvidia,core-pwr-off-time = <3875>;
 685                 nvidia,sys-clock-req-active-high;
 686         };
 687
 688         memory-controller@7000f400 {
 689                 emc-table@190000 {
 690                         reg = <190000>;
 691                         compatible = "nvidia,tegra20-emc-table";
 692                         clock-frequency = <190000>;
 693                         nvidia,emc-registers = <0x0000000c 0x00000026
 694                                 0x00000009 0x00000003 0x00000004 0x00000004
 695                                 0x00000002 0x0000000c 0x00000003 0x00000003
 696                                 0x00000002 0x00000001 0x00000004 0x00000005
 697                                 0x00000004 0x00000009 0x0000000d 0x0000059f
 698                                 0x00000000 0x00000003 0x00000003 0x00000003
 699                                 0x00000003 0x00000001 0x0000000b 0x000000c8
 700                                 0x00000003 0x00000007 0x00000004 0x0000000f
 701                                 0x00000002 0x00000000 0x00000000 0x00000002
 702                                 0x00000000 0x00000000 0x00000083 0xa06204ae
 703                                 0x007dc010 0x00000000 0x00000000 0x00000000
 704                                 0x00000000 0x00000000 0x00000000 0x00000000>;
 705                 };
 706
 707                 emc-table@380000 {
 708                         reg = <380000>;
 709                         compatible = "nvidia,tegra20-emc-table";
 710                         clock-frequency = <380000>;
 711                         nvidia,emc-registers = <0x00000017 0x0000004b
 712                                 0x00000012 0x00000006 0x00000004 0x00000005
 713                                 0x00000003 0x0000000c 0x00000006 0x00000006
 714                                 0x00000003 0x00000001 0x00000004 0x00000005
 715                                 0x00000004 0x00000009 0x0000000d 0x00000b5f
 716                                 0x00000000 0x00000003 0x00000003 0x00000006
 717                                 0x00000006 0x00000001 0x00000011 0x000000c8
 718                                 0x00000003 0x0000000e 0x00000007 0x0000000f
 719                                 0x00000002 0x00000000 0x00000000 0x00000002
 720                                 0x00000000 0x00000000 0x00000083 0xe044048b
 721                                 0x007d8010 0x00000000 0x00000000 0x00000000
 722                                 0x00000000 0x00000000 0x00000000 0x00000000>;
 723                 };
 724         };
 725
 726         usb@c5000000 {
 727                 status = "okay";
 728                 dr_mode = "otg";
 729         };
 730
 731         usb-phy@c5000000 {
 732                 status = "okay";
 733                 vbus-supply = <&vbus_reg>;
 734                 dr_mode = "otg";
 735         };
 736
 737         usb@c5004000 {
 738                 status = "okay";
 739                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
 740                         GPIO_ACTIVE_LOW>;
 741         };
 742
 743         usb-phy@c5004000 {
 744                 status = "okay";
 745                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
 746                         GPIO_ACTIVE_LOW>;
 747         };
 748
 749         usb@c5008000 {
 750                 status = "okay";
 751         };
 752
 753         usb-phy@c5008000 {
 754                 status = "okay";
 755         };
 756
 757         sdhci@c8000000 {
 758                 status = "okay";
 759                 power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
 760                 bus-width = <4>;
 761                 keep-power-in-suspend;
 762         };
 763
 764         sdhci@c8000400 {
 765                 status = "okay";
 766                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 767                 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
 768                 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
 769                 bus-width = <4>;
 770         };
 771
 772         sdhci@c8000600 {
 773                 status = "okay";
 774                 bus-width = <8>;
 775                 non-removable;
 776         };
 777
 778         backlight: backlight {
 779                 compatible = "pwm-backlight";
 780
 781                 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
 782                 power-supply = <&vdd_bl_reg>;
 783                 pwms = <&pwm 2 5000000>;
 784
 785                 brightness-levels = <0 4 8 16 32 64 128 255>;
 786                 default-brightness-level = <6>;
 787         };
 788
 789         clocks {
 790                 compatible = "simple-bus";
 791                 #address-cells = <1>;
 792                 #size-cells = <0>;
 793
 794                 clk32k_in: clock@0 {
 795                         compatible = "fixed-clock";
 796                         reg=<0>;
 797                         #clock-cells = <0>;
 798                         clock-frequency = <32768>;
 799                 };
 800         };
 801
 802         gpio-keys {
 803                 compatible = "gpio-keys";
 804
 805                 power {
 806                         label = "Power";
 807                         gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
 808                         linux,code = <KEY_POWER>;
 809                         gpio-key,wakeup;
 810                 };
 811
 812                 lid {
 813                         label = "Lid";
 814                         gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
 815                         linux,input-type = <5>; /* EV_SW */
 816                         linux,code = <0>; /* SW_LID */
 817                         debounce-interval = <1>;
 818                         gpio-key,wakeup;
 819                 };
 820         };
 821
 822         panel: panel {
 823                 compatible = "chunghwa,claa101wa01a", "simple-panel";
 824
 825                 power-supply = <&vdd_pnl_reg>;
 826                 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
 827
 828                 backlight = <&backlight>;
 829                 ddc-i2c-bus = <&lvds_ddc>;
 830         };
 831
 832         regulators {
 833                 compatible = "simple-bus";
 834                 #address-cells = <1>;
 835                 #size-cells = <0>;
 836
 837                 vdd_5v0_reg: regulator@0 {
 838                         compatible = "regulator-fixed";
 839                         reg = <0>;
 840                         regulator-name = "vdd_5v0";
 841                         regulator-min-microvolt = <5000000>;
 842                         regulator-max-microvolt = <5000000>;
 843                         regulator-always-on;
 844                 };
 845
 846                 regulator@1 {
 847                         compatible = "regulator-fixed";
 848                         reg = <1>;
 849                         regulator-name = "vdd_1v5";
 850                         regulator-min-microvolt = <1500000>;
 851                         regulator-max-microvolt = <1500000>;
 852                         gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
 853                 };
 854
 855                 regulator@2 {
 856                         compatible = "regulator-fixed";
 857                         reg = <2>;
 858                         regulator-name = "vdd_1v2";
 859                         regulator-min-microvolt = <1200000>;
 860                         regulator-max-microvolt = <1200000>;
 861                         gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
 862                         enable-active-high;
 863                 };
 864
 865                 vbus_reg: regulator@3 {
 866                         compatible = "regulator-fixed";
 867                         reg = <3>;
 868                         regulator-name = "vdd_vbus_wup1";
 869                         regulator-min-microvolt = <5000000>;
 870                         regulator-max-microvolt = <5000000>;
 871                         enable-active-high;
 872                         gpio = <&gpio TEGRA_GPIO(D, 0) 0>;
 873                         regulator-always-on;
 874                         regulator-boot-on;
 875                 };
 876
 877                 vdd_pnl_reg: regulator@4 {
 878                         compatible = "regulator-fixed";
 879                         reg = <4>;
 880                         regulator-name = "vdd_pnl";
 881                         regulator-min-microvolt = <2800000>;
 882                         regulator-max-microvolt = <2800000>;
 883                         gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
 884                         enable-active-high;
 885                 };
 886
 887                 vdd_bl_reg: regulator@5 {
 888                         compatible = "regulator-fixed";
 889                         reg = <5>;
 890                         regulator-name = "vdd_bl";
 891                         regulator-min-microvolt = <2800000>;
 892                         regulator-max-microvolt = <2800000>;
 893                         gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
 894                         enable-active-high;
 895                 };
 896         };
 897
 898         sound {
 899                 compatible = "nvidia,tegra-audio-wm8903-seaboard",
 900                              "nvidia,tegra-audio-wm8903";
 901                 nvidia,model = "NVIDIA Tegra Seaboard";
 902
 903                 nvidia,audio-routing =
 904                         "Headphone Jack", "HPOUTR",
 905                         "Headphone Jack", "HPOUTL",
 906                         "Int Spk", "ROP",
 907                         "Int Spk", "RON",
 908                         "Int Spk", "LOP",
 909                         "Int Spk", "LON",
 910                         "Mic Jack", "MICBIAS",
 911                         "IN1R", "Mic Jack";
 912
 913                 nvidia,i2s-controller = <&tegra_i2s1>;
 914                 nvidia,audio-codec = <&wm8903>;
 915
 916                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
 917                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
 918
 919                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
 920                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
 921                          <&tegra_car TEGRA20_CLK_CDEV1>;
 922                 clock-names = "pll_a", "pll_a_out0", "mclk";
 923         };
 924 };