arch/arm/boot/dts/tegra20-seaboard.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/input/input.h>
   4 #include "tegra20.dtsi"
   5
   6 / {
   7         model = "NVIDIA Seaboard";
   8         compatible = "nvidia,seaboard", "nvidia,tegra20";
   9
  10         aliases {
  11                 rtc0 = "/i2c@7000d000/tps6586x@34";
  12                 rtc1 = "/rtc@7000e000";
  13                 serial0 = &uartd;
  14         };
  15
  16         memory {
  17                 reg = <0x00000000 0x40000000>;
  18         };
  19
  20         host1x@50000000 {
  21                 dc@54200000 {
  22                         rgb {
  23                                 status = "okay";
  24
  25                                 nvidia,panel = <&panel>;
  26                         };
  27                 };
  28
  29                 hdmi@54280000 {
  30                         status = "okay";
  31
  32                         vdd-supply = <&hdmi_vdd_reg>;
  33                         pll-supply = <&hdmi_pll_reg>;
  34                         hdmi-supply = <&vdd_hdmi>;
  35
  36                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  37                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
  38                                 GPIO_ACTIVE_HIGH>;
  39                 };
  40         };
  41
  42         pinmux@70000014 {
  43                 pinctrl-names = "default";
  44                 pinctrl-0 = <&state_default>;
  45
  46                 state_default: pinmux {
  47                         ata {
  48                                 nvidia,pins = "ata";
  49                                 nvidia,function = "ide";
  50                         };
  51                         atb {
  52                                 nvidia,pins = "atb", "gma", "gme";
  53                                 nvidia,function = "sdio4";
  54                         };
  55                         atc {
  56                                 nvidia,pins = "atc";
  57                                 nvidia,function = "nand";
  58                         };
  59                         atd {
  60                                 nvidia,pins = "atd", "ate", "gmb", "spia",
  61                                         "spib", "spic";
  62                                 nvidia,function = "gmi";
  63                         };
  64                         cdev1 {
  65                                 nvidia,pins = "cdev1";
  66                                 nvidia,function = "plla_out";
  67                         };
  68                         cdev2 {
  69                                 nvidia,pins = "cdev2";
  70                                 nvidia,function = "pllp_out4";
  71                         };
  72                         crtp {
  73                                 nvidia,pins = "crtp", "lm1";
  74                                 nvidia,function = "crt";
  75                         };
  76                         csus {
  77                                 nvidia,pins = "csus";
  78                                 nvidia,function = "vi_sensor_clk";
  79                         };
  80                         dap1 {
  81                                 nvidia,pins = "dap1";
  82                                 nvidia,function = "dap1";
  83                         };
  84                         dap2 {
  85                                 nvidia,pins = "dap2";
  86                                 nvidia,function = "dap2";
  87                         };
  88                         dap3 {
  89                                 nvidia,pins = "dap3";
  90                                 nvidia,function = "dap3";
  91                         };
  92                         dap4 {
  93                                 nvidia,pins = "dap4";
  94                                 nvidia,function = "dap4";
  95                         };
  96                         dta {
  97                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
  98                                 nvidia,function = "vi";
  99                         };
 100                         dtf {
 101                                 nvidia,pins = "dtf";
 102                                 nvidia,function = "i2c3";
 103                         };
 104                         gmc {
 105                                 nvidia,pins = "gmc";
 106                                 nvidia,function = "uartd";
 107                         };
 108                         gmd {
 109                                 nvidia,pins = "gmd";
 110                                 nvidia,function = "sflash";
 111                         };
 112                         gpu {
 113                                 nvidia,pins = "gpu";
 114                                 nvidia,function = "pwm";
 115                         };
 116                         gpu7 {
 117                                 nvidia,pins = "gpu7";
 118                                 nvidia,function = "rtck";
 119                         };
 120                         gpv {
 121                                 nvidia,pins = "gpv", "slxa", "slxk";
 122                                 nvidia,function = "pcie";
 123                         };
 124                         hdint {
 125                                 nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
 126                                         "lsck", "lsda";
 127                                 nvidia,function = "hdmi";
 128                         };
 129                         i2cp {
 130                                 nvidia,pins = "i2cp";
 131                                 nvidia,function = "i2cp";
 132                         };
 133                         irrx {
 134                                 nvidia,pins = "irrx", "irtx";
 135                                 nvidia,function = "uartb";
 136                         };
 137                         kbca {
 138                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 139                                         "kbce", "kbcf";
 140                                 nvidia,function = "kbc";
 141                         };
 142                         lcsn {
 143                                 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
 144                                         "lsdi", "lvp0";
 145                                 nvidia,function = "rsvd4";
 146                         };
 147                         ld0 {
 148                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 149                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 150                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 151                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 152                                         "lhp1", "lhp2", "lhs", "lpp", "lsc0",
 153                                         "lspi", "lvp1", "lvs";
 154                                 nvidia,function = "displaya";
 155                         };
 156                         owc {
 157                                 nvidia,pins = "owc", "spdi", "spdo", "uac";
 158                                 nvidia,function = "rsvd2";
 159                         };
 160                         pmc {
 161                                 nvidia,pins = "pmc";
 162                                 nvidia,function = "pwr_on";
 163                         };
 164                         rm {
 165                                 nvidia,pins = "rm";
 166                                 nvidia,function = "i2c1";
 167                         };
 168                         sdb {
 169                                 nvidia,pins = "sdb", "sdc", "sdd";
 170                                 nvidia,function = "sdio3";
 171                         };
 172                         sdio1 {
 173                                 nvidia,pins = "sdio1";
 174                                 nvidia,function = "sdio1";
 175                         };
 176                         slxc {
 177                                 nvidia,pins = "slxc", "slxd";
 178                                 nvidia,function = "spdif";
 179                         };
 180                         spid {
 181                                 nvidia,pins = "spid", "spie", "spif";
 182                                 nvidia,function = "spi1";
 183                         };
 184                         spig {
 185                                 nvidia,pins = "spig", "spih";
 186                                 nvidia,function = "spi2_alt";
 187                         };
 188                         uaa {
 189                                 nvidia,pins = "uaa", "uab", "uda";
 190                                 nvidia,function = "ulpi";
 191                         };
 192                         uad {
 193                                 nvidia,pins = "uad";
 194                                 nvidia,function = "irda";
 195                         };
 196                         uca {
 197                                 nvidia,pins = "uca", "ucb";
 198                                 nvidia,function = "uartc";
 199                         };
 200                         conf_ata {
 201                                 nvidia,pins = "ata", "atb", "atc", "atd",
 202                                         "cdev1", "cdev2", "dap1", "dap2",
 203                                         "dap4", "ddc", "dtf", "gma", "gmc", "gmd",
 204                                         "gme", "gpu", "gpu7", "i2cp", "irrx",
 205                                         "irtx", "pta", "rm", "sdc", "sdd",
 206                                         "slxd", "slxk", "spdi", "spdo", "uac",
 207                                         "uad", "uca", "ucb", "uda";
 208                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 209                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 210                         };
 211                         conf_ate {
 212                                 nvidia,pins = "ate", "csus", "dap3",
 213                                         "gpv", "owc", "slxc", "spib", "spid",
 214                                         "spie";
 215                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 216                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 217                         };
 218                         conf_ck32 {
 219                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
 220                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
 221                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 222                         };
 223                         conf_crtp {
 224                                 nvidia,pins = "crtp", "gmb", "slxa", "spia",
 225                                         "spig", "spih";
 226                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 227                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 228                         };
 229                         conf_dta {
 230                                 nvidia,pins = "dta", "dtb", "dtc", "dtd";
 231                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 232                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 233                         };
 234                         conf_dte {
 235                                 nvidia,pins = "dte", "spif";
 236                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 237                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 238                         };
 239                         conf_hdint {
 240                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
 241                                         "lpw1", "lsc1", "lsck", "lsda", "lsdi",
 242                                         "lvp0";
 243                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 244                         };
 245                         conf_kbca {
 246                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 247                                         "kbce", "kbcf", "sdio1", "spic", "uaa",
 248                                         "uab";
 249                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 250                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 251                         };
 252                         conf_lc {
 253                                 nvidia,pins = "lc", "ls";
 254                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 255                         };
 256                         conf_ld0 {
 257                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 258                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 259                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 260                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 261                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
 262                                         "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
 263                                         "lvs", "pmc", "sdb";
 264                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 265                         };
 266                         conf_ld17_0 {
 267                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
 268                                         "ld23_22";
 269                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 270                         };
 271                         drive_sdio1 {
 272                                 nvidia,pins = "drive_sdio1";
 273                                 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
 274                                 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
 275                                 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
 276                                 nvidia,pull-down-strength = <31>;
 277                                 nvidia,pull-up-strength = <31>;
 278                                 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 279                                 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
 280                         };
 281                 };
 282
 283                 state_i2cmux_ddc: pinmux_i2cmux_ddc {
 284                         ddc {
 285                                 nvidia,pins = "ddc";
 286                                 nvidia,function = "i2c2";
 287                         };
 288                         pta {
 289                                 nvidia,pins = "pta";
 290                                 nvidia,function = "rsvd4";
 291                         };
 292                 };
 293
 294                 state_i2cmux_pta: pinmux_i2cmux_pta {
 295                         ddc {
 296                                 nvidia,pins = "ddc";
 297                                 nvidia,function = "rsvd4";
 298                         };
 299                         pta {
 300                                 nvidia,pins = "pta";
 301                                 nvidia,function = "i2c2";
 302                         };
 303                 };
 304
 305                 state_i2cmux_idle: pinmux_i2cmux_idle {
 306                         ddc {
 307                                 nvidia,pins = "ddc";
 308                                 nvidia,function = "rsvd4";
 309                         };
 310                         pta {
 311                                 nvidia,pins = "pta";
 312                                 nvidia,function = "rsvd4";
 313                         };
 314                 };
 315         };
 316
 317         i2s@70002800 {
 318                 status = "okay";
 319         };
 320
 321         serial@70006300 {
 322                 status = "okay";
 323         };
 324
 325         pwm: pwm@7000a000 {
 326                 status = "okay";
 327         };
 328
 329         i2c@7000c000 {
 330                 status = "okay";
 331                 clock-frequency = <400000>;
 332
 333                 wm8903: wm8903@1a {
 334                         compatible = "wlf,wm8903";
 335                         reg = <0x1a>;
 336                         interrupt-parent = <&gpio>;
 337                         interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
 338
 339                         gpio-controller;
 340                         #gpio-cells = <2>;
 341
 342                         micdet-cfg = <0>;
 343                         micdet-delay = <100>;
 344                         gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
 345                 };
 346
 347                 /* ALS and proximity sensor */
 348                 isl29018@44 {
 349                         compatible = "isil,isl29018";
 350                         reg = <0x44>;
 351                         interrupt-parent = <&gpio>;
 352                         interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
 353                 };
 354
 355                 gyrometer@68 {
 356                         compatible = "invn,mpu3050";
 357                         reg = <0x68>;
 358                         interrupt-parent = <&gpio>;
 359                         interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>;
 360                 };
 361         };
 362
 363         i2c@7000c400 {
 364                 status = "okay";
 365                 clock-frequency = <100000>;
 366         };
 367
 368         i2cmux {
 369                 compatible = "i2c-mux-pinctrl";
 370                 #address-cells = <1>;
 371                 #size-cells = <0>;
 372
 373                 i2c-parent = <&{/i2c@7000c400}>;
 374
 375                 pinctrl-names = "ddc", "pta", "idle";
 376                 pinctrl-0 = <&state_i2cmux_ddc>;
 377                 pinctrl-1 = <&state_i2cmux_pta>;
 378                 pinctrl-2 = <&state_i2cmux_idle>;
 379
 380                 hdmi_ddc: i2c@0 {
 381                         reg = <0>;
 382                         #address-cells = <1>;
 383                         #size-cells = <0>;
 384                 };
 385
 386                 lvds_ddc: i2c@1 {
 387                         reg = <1>;
 388                         #address-cells = <1>;
 389                         #size-cells = <0>;
 390
 391                         smart-battery@b {
 392                                 compatible = "ti,bq20z75", "smart-battery-1.1";
 393                                 reg = <0xb>;
 394                                 ti,i2c-retry-count = <2>;
 395                                 ti,poll-retry-count = <10>;
 396                         };
 397                 };
 398         };
 399
 400         i2c@7000c500 {
 401                 status = "okay";
 402                 clock-frequency = <400000>;
 403         };
 404
 405         i2c@7000d000 {
 406                 status = "okay";
 407                 clock-frequency = <400000>;
 408
 409                 magnetometer@c {
 410                         compatible = "asahi-kasei,ak8975";
 411                         reg = <0xc>;
 412                         interrupt-parent = <&gpio>;
 413                         interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
 414                 };
 415
 416                 pmic: tps6586x@34 {
 417                         compatible = "ti,tps6586x";
 418                         reg = <0x34>;
 419                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 420
 421                         ti,system-power-controller;
 422
 423                         #gpio-cells = <2>;
 424                         gpio-controller;
 425
 426                         sys-supply = <&vdd_5v0_reg>;
 427                         vin-sm0-supply = <&sys_reg>;
 428                         vin-sm1-supply = <&sys_reg>;
 429                         vin-sm2-supply = <&sys_reg>;
 430                         vinldo01-supply = <&sm2_reg>;
 431                         vinldo23-supply = <&sm2_reg>;
 432                         vinldo4-supply = <&sm2_reg>;
 433                         vinldo678-supply = <&sm2_reg>;
 434                         vinldo9-supply = <&sm2_reg>;
 435
 436                         regulators {
 437                                 sys_reg: sys {
 438                                         regulator-name = "vdd_sys";
 439                                         regulator-always-on;
 440                                 };
 441
 442                                 sm0 {
 443                                         regulator-name = "vdd_sm0,vdd_core";
 444                                         regulator-min-microvolt = <1300000>;
 445                                         regulator-max-microvolt = <1300000>;
 446                                         regulator-always-on;
 447                                 };
 448
 449                                 sm1 {
 450                                         regulator-name = "vdd_sm1,vdd_cpu";
 451                                         regulator-min-microvolt = <1125000>;
 452                                         regulator-max-microvolt = <1125000>;
 453                                         regulator-always-on;
 454                                 };
 455
 456                                 sm2_reg: sm2 {
 457                                         regulator-name = "vdd_sm2,vin_ldo*";
 458                                         regulator-min-microvolt = <3700000>;
 459                                         regulator-max-microvolt = <3700000>;
 460                                         regulator-always-on;
 461                                 };
 462
 463                                 /* LDO0 is not connected to anything */
 464
 465                                 ldo1 {
 466                                         regulator-name = "vdd_ldo1,avdd_pll*";
 467                                         regulator-min-microvolt = <1100000>;
 468                                         regulator-max-microvolt = <1100000>;
 469                                         regulator-always-on;
 470                                 };
 471
 472                                 ldo2 {
 473                                         regulator-name = "vdd_ldo2,vdd_rtc";
 474                                         regulator-min-microvolt = <1200000>;
 475                                         regulator-max-microvolt = <1200000>;
 476                                 };
 477
 478                                 ldo3 {
 479                                         regulator-name = "vdd_ldo3,avdd_usb*";
 480                                         regulator-min-microvolt = <3300000>;
 481                                         regulator-max-microvolt = <3300000>;
 482                                         regulator-always-on;
 483                                 };
 484
 485                                 ldo4 {
 486                                         regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
 487                                         regulator-min-microvolt = <1800000>;
 488                                         regulator-max-microvolt = <1800000>;
 489                                         regulator-always-on;
 490                                 };
 491
 492                                 ldo5 {
 493                                         regulator-name = "vdd_ldo5,vcore_mmc";
 494                                         regulator-min-microvolt = <2850000>;
 495                                         regulator-max-microvolt = <2850000>;
 496                                         regulator-always-on;
 497                                 };
 498
 499                                 ldo6 {
 500                                         regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
 501                                         regulator-min-microvolt = <1800000>;
 502                                         regulator-max-microvolt = <1800000>;
 503                                 };
 504
 505                                 hdmi_vdd_reg: ldo7 {
 506                                         regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
 507                                         regulator-min-microvolt = <3300000>;
 508                                         regulator-max-microvolt = <3300000>;
 509                                 };
 510
 511                                 hdmi_pll_reg: ldo8 {
 512                                         regulator-name = "vdd_ldo8,avdd_hdmi_pll";
 513                                         regulator-min-microvolt = <1800000>;
 514                                         regulator-max-microvolt = <1800000>;
 515                                 };
 516
 517                                 ldo9 {
 518                                         regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
 519                                         regulator-min-microvolt = <2850000>;
 520                                         regulator-max-microvolt = <2850000>;
 521                                         regulator-always-on;
 522                                 };
 523
 524                                 ldo_rtc {
 525                                         regulator-name = "vdd_rtc_out,vdd_cell";
 526                                         regulator-min-microvolt = <3300000>;
 527                                         regulator-max-microvolt = <3300000>;
 528                                         regulator-always-on;
 529                                 };
 530                         };
 531                 };
 532
 533                 temperature-sensor@4c {
 534                         compatible = "onnn,nct1008";
 535                         reg = <0x4c>;
 536                 };
 537         };
 538
 539         kbc@7000e200 {
 540                 status = "okay";
 541                 nvidia,debounce-delay-ms = <32>;
 542                 nvidia,repeat-delay-ms = <160>;
 543                 nvidia,ghost-filter;
 544                 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
 545                 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
 546                 linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W)
 547                                 MATRIX_KEY(0x00, 0x03, KEY_S)
 548                                 MATRIX_KEY(0x00, 0x04, KEY_A)
 549                                 MATRIX_KEY(0x00, 0x05, KEY_Z)
 550                                 MATRIX_KEY(0x00, 0x07, KEY_FN)
 551
 552                                 MATRIX_KEY(0x01, 0x07, KEY_LEFTMETA)
 553                                 MATRIX_KEY(0x02, 0x06, KEY_RIGHTALT)
 554                                 MATRIX_KEY(0x02, 0x07, KEY_LEFTALT)
 555
 556                                 MATRIX_KEY(0x03, 0x00, KEY_5)
 557                                 MATRIX_KEY(0x03, 0x01, KEY_4)
 558                                 MATRIX_KEY(0x03, 0x02, KEY_R)
 559                                 MATRIX_KEY(0x03, 0x03, KEY_E)
 560                                 MATRIX_KEY(0x03, 0x04, KEY_F)
 561                                 MATRIX_KEY(0x03, 0x05, KEY_D)
 562                                 MATRIX_KEY(0x03, 0x06, KEY_X)
 563
 564                                 MATRIX_KEY(0x04, 0x00, KEY_7)
 565                                 MATRIX_KEY(0x04, 0x01, KEY_6)
 566                                 MATRIX_KEY(0x04, 0x02, KEY_T)
 567                                 MATRIX_KEY(0x04, 0x03, KEY_H)
 568                                 MATRIX_KEY(0x04, 0x04, KEY_G)
 569                                 MATRIX_KEY(0x04, 0x05, KEY_V)
 570                                 MATRIX_KEY(0x04, 0x06, KEY_C)
 571                                 MATRIX_KEY(0x04, 0x07, KEY_SPACE)
 572
 573                                 MATRIX_KEY(0x05, 0x00, KEY_9)
 574                                 MATRIX_KEY(0x05, 0x01, KEY_8)
 575                                 MATRIX_KEY(0x05, 0x02, KEY_U)
 576                                 MATRIX_KEY(0x05, 0x03, KEY_Y)
 577                                 MATRIX_KEY(0x05, 0x04, KEY_J)
 578                                 MATRIX_KEY(0x05, 0x05, KEY_N)
 579                                 MATRIX_KEY(0x05, 0x06, KEY_B)
 580                                 MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH)
 581
 582                                 MATRIX_KEY(0x06, 0x00, KEY_MINUS)
 583                                 MATRIX_KEY(0x06, 0x01, KEY_0)
 584                                 MATRIX_KEY(0x06, 0x02, KEY_O)
 585                                 MATRIX_KEY(0x06, 0x03, KEY_I)
 586                                 MATRIX_KEY(0x06, 0x04, KEY_L)
 587                                 MATRIX_KEY(0x06, 0x05, KEY_K)
 588                                 MATRIX_KEY(0x06, 0x06, KEY_COMMA)
 589                                 MATRIX_KEY(0x06, 0x07, KEY_M)
 590
 591                                 MATRIX_KEY(0x07, 0x01, KEY_EQUAL)
 592                                 MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE)
 593                                 MATRIX_KEY(0x07, 0x03, KEY_ENTER)
 594                                 MATRIX_KEY(0x07, 0x07, KEY_MENU)
 595
 596                                 MATRIX_KEY(0x08, 0x04, KEY_RIGHTSHIFT)
 597                                 MATRIX_KEY(0x08, 0x05, KEY_LEFTSHIFT)
 598
 599                                 MATRIX_KEY(0x09, 0x05, KEY_RIGHTCTRL)
 600                                 MATRIX_KEY(0x09, 0x07, KEY_LEFTCTRL)
 601
 602                                 MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE)
 603                                 MATRIX_KEY(0x0B, 0x01, KEY_P)
 604                                 MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE)
 605                                 MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON)
 606                                 MATRIX_KEY(0x0B, 0x04, KEY_SLASH)
 607                                 MATRIX_KEY(0x0B, 0x05, KEY_DOT)
 608
 609                                 MATRIX_KEY(0x0C, 0x00, KEY_F10)
 610                                 MATRIX_KEY(0x0C, 0x01, KEY_F9)
 611                                 MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE)
 612                                 MATRIX_KEY(0x0C, 0x03, KEY_3)
 613                                 MATRIX_KEY(0x0C, 0x04, KEY_2)
 614                                 MATRIX_KEY(0x0C, 0x05, KEY_UP)
 615                                 MATRIX_KEY(0x0C, 0x06, KEY_PRINT)
 616                                 MATRIX_KEY(0x0C, 0x07, KEY_PAUSE)
 617
 618                                 MATRIX_KEY(0x0D, 0x00, KEY_INSERT)
 619                                 MATRIX_KEY(0x0D, 0x01, KEY_DELETE)
 620                                 MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP )
 621                                 MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN)
 622                                 MATRIX_KEY(0x0D, 0x05, KEY_RIGHT)
 623                                 MATRIX_KEY(0x0D, 0x06, KEY_DOWN)
 624                                 MATRIX_KEY(0x0D, 0x07, KEY_LEFT)
 625
 626                                 MATRIX_KEY(0x0E, 0x00, KEY_F11)
 627                                 MATRIX_KEY(0x0E, 0x01, KEY_F12)
 628                                 MATRIX_KEY(0x0E, 0x02, KEY_F8)
 629                                 MATRIX_KEY(0x0E, 0x03, KEY_Q)
 630                                 MATRIX_KEY(0x0E, 0x04, KEY_F4)
 631                                 MATRIX_KEY(0x0E, 0x05, KEY_F3)
 632                                 MATRIX_KEY(0x0E, 0x06, KEY_1)
 633                                 MATRIX_KEY(0x0E, 0x07, KEY_F7)
 634
 635                                 MATRIX_KEY(0x0F, 0x00, KEY_ESC)
 636                                 MATRIX_KEY(0x0F, 0x01, KEY_GRAVE)
 637                                 MATRIX_KEY(0x0F, 0x02, KEY_F5)
 638                                 MATRIX_KEY(0x0F, 0x03, KEY_TAB)
 639                                 MATRIX_KEY(0x0F, 0x04, KEY_F1)
 640                                 MATRIX_KEY(0x0F, 0x05, KEY_F2)
 641                                 MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK)
 642                                 MATRIX_KEY(0x0F, 0x07, KEY_F6)
 643
 644                                 /* Software Handled Function Keys */
 645                                 MATRIX_KEY(0x14, 0x00, KEY_KP7)
 646
 647                                 MATRIX_KEY(0x15, 0x00, KEY_KP9)
 648                                 MATRIX_KEY(0x15, 0x01, KEY_KP8)
 649                                 MATRIX_KEY(0x15, 0x02, KEY_KP4)
 650                                 MATRIX_KEY(0x15, 0x04, KEY_KP1)
 651
 652                                 MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
 653                                 MATRIX_KEY(0x16, 0x02, KEY_KP6)
 654                                 MATRIX_KEY(0x16, 0x03, KEY_KP5)
 655                                 MATRIX_KEY(0x16, 0x04, KEY_KP3)
 656                                 MATRIX_KEY(0x16, 0x05, KEY_KP2)
 657                                 MATRIX_KEY(0x16, 0x07, KEY_KP0)
 658
 659                                 MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK)
 660                                 MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS)
 661                                 MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS)
 662                                 MATRIX_KEY(0x1B, 0x05, KEY_KPDOT)
 663
 664                                 MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP)
 665
 666                                 MATRIX_KEY(0x1D, 0x03, KEY_HOME)
 667                                 MATRIX_KEY(0x1D, 0x04, KEY_END)
 668                                 MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSDOWN)
 669                                 MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN)
 670                                 MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSUP)
 671
 672                                 MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK)
 673                                 MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK)
 674                                 MATRIX_KEY(0x1E, 0x02, KEY_MUTE)
 675
 676                                 MATRIX_KEY(0x1F, 0x04, KEY_HELP)>;
 677         };
 678
 679         pmc@7000e400 {
 680                 nvidia,invert-interrupt;
 681                 nvidia,suspend-mode = <1>;
 682                 nvidia,cpu-pwr-good-time = <5000>;
 683                 nvidia,cpu-pwr-off-time = <5000>;
 684                 nvidia,core-pwr-good-time = <3845 3845>;
 685                 nvidia,core-pwr-off-time = <3875>;
 686                 nvidia,sys-clock-req-active-high;
 687         };
 688
 689         memory-controller@7000f400 {
 690                 emc-table@190000 {
 691                         reg = <190000>;
 692                         compatible = "nvidia,tegra20-emc-table";
 693                         clock-frequency = <190000>;
 694                         nvidia,emc-registers = <0x0000000c 0x00000026
 695                                 0x00000009 0x00000003 0x00000004 0x00000004
 696                                 0x00000002 0x0000000c 0x00000003 0x00000003
 697                                 0x00000002 0x00000001 0x00000004 0x00000005
 698                                 0x00000004 0x00000009 0x0000000d 0x0000059f
 699                                 0x00000000 0x00000003 0x00000003 0x00000003
 700                                 0x00000003 0x00000001 0x0000000b 0x000000c8
 701                                 0x00000003 0x00000007 0x00000004 0x0000000f
 702                                 0x00000002 0x00000000 0x00000000 0x00000002
 703                                 0x00000000 0x00000000 0x00000083 0xa06204ae
 704                                 0x007dc010 0x00000000 0x00000000 0x00000000
 705                                 0x00000000 0x00000000 0x00000000 0x00000000>;
 706                 };
 707
 708                 emc-table@380000 {
 709                         reg = <380000>;
 710                         compatible = "nvidia,tegra20-emc-table";
 711                         clock-frequency = <380000>;
 712                         nvidia,emc-registers = <0x00000017 0x0000004b
 713                                 0x00000012 0x00000006 0x00000004 0x00000005
 714                                 0x00000003 0x0000000c 0x00000006 0x00000006
 715                                 0x00000003 0x00000001 0x00000004 0x00000005
 716                                 0x00000004 0x00000009 0x0000000d 0x00000b5f
 717                                 0x00000000 0x00000003 0x00000003 0x00000006
 718                                 0x00000006 0x00000001 0x00000011 0x000000c8
 719                                 0x00000003 0x0000000e 0x00000007 0x0000000f
 720                                 0x00000002 0x00000000 0x00000000 0x00000002
 721                                 0x00000000 0x00000000 0x00000083 0xe044048b
 722                                 0x007d8010 0x00000000 0x00000000 0x00000000
 723                                 0x00000000 0x00000000 0x00000000 0x00000000>;
 724                 };
 725         };
 726
 727         usb@c5000000 {
 728                 status = "okay";
 729                 dr_mode = "otg";
 730         };
 731
 732         usb-phy@c5000000 {
 733                 status = "okay";
 734                 vbus-supply = <&vbus_reg>;
 735                 dr_mode = "otg";
 736         };
 737
 738         usb@c5004000 {
 739                 status = "okay";
 740                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
 741                         GPIO_ACTIVE_LOW>;
 742         };
 743
 744         usb-phy@c5004000 {
 745                 status = "okay";
 746                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
 747                         GPIO_ACTIVE_LOW>;
 748         };
 749
 750         usb@c5008000 {
 751                 status = "okay";
 752         };
 753
 754         usb-phy@c5008000 {
 755                 status = "okay";
 756         };
 757
 758         sdhci@c8000000 {
 759                 status = "okay";
 760                 power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
 761                 bus-width = <4>;
 762                 keep-power-in-suspend;
 763         };
 764
 765         sdhci@c8000400 {
 766                 status = "okay";
 767                 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
 768                 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
 769                 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
 770                 bus-width = <4>;
 771         };
 772
 773         sdhci@c8000600 {
 774                 status = "okay";
 775                 bus-width = <8>;
 776                 non-removable;
 777         };
 778
 779         backlight: backlight {
 780                 compatible = "pwm-backlight";
 781
 782                 enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
 783                 power-supply = <&vdd_bl_reg>;
 784                 pwms = <&pwm 2 5000000>;
 785
 786                 brightness-levels = <0 4 8 16 32 64 128 255>;
 787                 default-brightness-level = <6>;
 788         };
 789
 790         clocks {
 791                 compatible = "simple-bus";
 792                 #address-cells = <1>;
 793                 #size-cells = <0>;
 794
 795                 clk32k_in: clock@0 {
 796                         compatible = "fixed-clock";
 797                         reg=<0>;
 798                         #clock-cells = <0>;
 799                         clock-frequency = <32768>;
 800                 };
 801         };
 802
 803         gpio-keys {
 804                 compatible = "gpio-keys";
 805
 806                 power {
 807                         label = "Power";
 808                         gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
 809                         linux,code = <KEY_POWER>;
 810                         gpio-key,wakeup;
 811                 };
 812
 813                 lid {
 814                         label = "Lid";
 815                         gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
 816                         linux,input-type = <5>; /* EV_SW */
 817                         linux,code = <0>; /* SW_LID */
 818                         debounce-interval = <1>;
 819                         gpio-key,wakeup;
 820                 };
 821         };
 822
 823         panel: panel {
 824                 compatible = "chunghwa,claa101wa01a", "simple-panel";
 825
 826                 power-supply = <&vdd_pnl_reg>;
 827                 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
 828
 829                 backlight = <&backlight>;
 830                 ddc-i2c-bus = <&lvds_ddc>;
 831         };
 832
 833         regulators {
 834                 compatible = "simple-bus";
 835                 #address-cells = <1>;
 836                 #size-cells = <0>;
 837
 838                 vdd_5v0_reg: regulator@0 {
 839                         compatible = "regulator-fixed";
 840                         reg = <0>;
 841                         regulator-name = "vdd_5v0";
 842                         regulator-min-microvolt = <5000000>;
 843                         regulator-max-microvolt = <5000000>;
 844                         regulator-always-on;
 845                 };
 846
 847                 regulator@1 {
 848                         compatible = "regulator-fixed";
 849                         reg = <1>;
 850                         regulator-name = "vdd_1v5";
 851                         regulator-min-microvolt = <1500000>;
 852                         regulator-max-microvolt = <1500000>;
 853                         gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
 854                 };
 855
 856                 regulator@2 {
 857                         compatible = "regulator-fixed";
 858                         reg = <2>;
 859                         regulator-name = "vdd_1v2";
 860                         regulator-min-microvolt = <1200000>;
 861                         regulator-max-microvolt = <1200000>;
 862                         gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
 863                         enable-active-high;
 864                 };
 865
 866                 vbus_reg: regulator@3 {
 867                         compatible = "regulator-fixed";
 868                         reg = <3>;
 869                         regulator-name = "vdd_vbus_wup1";
 870                         regulator-min-microvolt = <5000000>;
 871                         regulator-max-microvolt = <5000000>;
 872                         enable-active-high;
 873                         gpio = <&gpio TEGRA_GPIO(D, 0) 0>;
 874                         regulator-always-on;
 875                         regulator-boot-on;
 876                 };
 877
 878                 vdd_pnl_reg: regulator@4 {
 879                         compatible = "regulator-fixed";
 880                         reg = <4>;
 881                         regulator-name = "vdd_pnl";
 882                         regulator-min-microvolt = <2800000>;
 883                         regulator-max-microvolt = <2800000>;
 884                         gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
 885                         enable-active-high;
 886                 };
 887
 888                 vdd_bl_reg: regulator@5 {
 889                         compatible = "regulator-fixed";
 890                         reg = <5>;
 891                         regulator-name = "vdd_bl";
 892                         regulator-min-microvolt = <2800000>;
 893                         regulator-max-microvolt = <2800000>;
 894                         gpio = <&gpio TEGRA_GPIO(W, 0) GPIO_ACTIVE_HIGH>;
 895                         enable-active-high;
 896                 };
 897
 898                 vdd_hdmi: regulator@6 {
 899                         compatible = "regulator-fixed";
 900                         reg = <6>;
 901                         regulator-name = "VDDIO_HDMI";
 902                         regulator-min-microvolt = <5000000>;
 903                         regulator-max-microvolt = <5000000>;
 904                         gpio = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
 905                         enable-active-high;
 906                         vin-supply = <&vdd_5v0_reg>;
 907                 };
 908         };
 909
 910         sound {
 911                 compatible = "nvidia,tegra-audio-wm8903-seaboard",
 912                              "nvidia,tegra-audio-wm8903";
 913                 nvidia,model = "NVIDIA Tegra Seaboard";
 914
 915                 nvidia,audio-routing =
 916                         "Headphone Jack", "HPOUTR",
 917                         "Headphone Jack", "HPOUTL",
 918                         "Int Spk", "ROP",
 919                         "Int Spk", "RON",
 920                         "Int Spk", "LOP",
 921                         "Int Spk", "LON",
 922                         "Mic Jack", "MICBIAS",
 923                         "IN1R", "Mic Jack";
 924
 925                 nvidia,i2s-controller = <&tegra_i2s1>;
 926                 nvidia,audio-codec = <&wm8903>;
 927
 928                 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
 929                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
 930
 931                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
 932                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
 933                          <&tegra_car TEGRA20_CLK_CDEV1>;
 934                 clock-names = "pll_a", "pll_a_out0", "mclk";
 935         };
 936 };