arch/arm/boot/dts/r8a7791.dtsi

   1 /*
   2  * Device Tree Source for the r8a7791 SoC
   3  *
   4  * Copyright (C) 2013 Renesas Electronics Corporation
   5  * Copyright (C) 2013 Renesas Solutions Corp.
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2.  This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 / {
  13         compatible = "renesas,r8a7791";
  14         interrupt-parent = <&gic>;
  15         #address-cells = <2>;
  16         #size-cells = <2>;
  17
  18         cpus {
  19                 #address-cells = <1>;
  20                 #size-cells = <0>;
  21
  22                 cpu0: cpu@0 {
  23                         device_type = "cpu";
  24                         compatible = "arm,cortex-a15";
  25                         reg = <0>;
  26                         clock-frequency = <1300000000>;
  27                 };
  28
  29                 cpu1: cpu@1 {
  30                         device_type = "cpu";
  31                         compatible = "arm,cortex-a15";
  32                         reg = <1>;
  33                         clock-frequency = <1300000000>;
  34                 };
  35         };
  36
  37         gic: interrupt-controller@f1001000 {
  38                 compatible = "arm,cortex-a15-gic";
  39                 #interrupt-cells = <3>;
  40                 #address-cells = <0>;
  41                 interrupt-controller;
  42                 reg = <0 0xf1001000 0 0x1000>,
  43                         <0 0xf1002000 0 0x1000>,
  44                         <0 0xf1004000 0 0x2000>,
  45                         <0 0xf1006000 0 0x2000>;
  46                 interrupts = <1 9 0xf04>;
  47         };
  48
  49         timer {
  50                 compatible = "arm,armv7-timer";
  51                 interrupts = <1 13 0xf08>,
  52                                 <1 14 0xf08>,
  53                                 <1 11 0xf08>,
  54                                 <1 10 0xf08>;
  55         };
  56
  57         irqc0: interrupt-controller@e61c0000 {
  58                 compatible = "renesas,irqc";
  59                 #interrupt-cells = <2>;
  60                 interrupt-controller;
  61                 reg = <0 0xe61c0000 0 0x200>;
  62                 interrupt-parent = <&gic>;
  63                 interrupts = <0 0 4>,
  64                               <0 1 4>,
  65                               <0 2 4>,
  66                               <0 3 4>,
  67                               <0 12 4>,
  68                               <0 13 4>,
  69                               <0 14 4>,
  70                               <0 15 4>,
  71                               <0 16 4>,
  72                               <0 17 4>;
  73         };
  74 };