arch/arm/boot/dts/omap4.dtsi

   1 /*
   2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include <dt-bindings/gpio/gpio.h>
  10 #include <dt-bindings/interrupt-controller/arm-gic.h>
  11 #include <dt-bindings/pinctrl/omap.h>
  12
  13 #include "skeleton.dtsi"
  14
  15 / {
  16         compatible = "ti,omap4430", "ti,omap4";
  17         interrupt-parent = <&wakeupgen>;
  18
  19         aliases {
  20                 i2c0 = &i2c1;
  21                 i2c1 = &i2c2;
  22                 i2c2 = &i2c3;
  23                 i2c3 = &i2c4;
  24                 serial0 = &uart1;
  25                 serial1 = &uart2;
  26                 serial2 = &uart3;
  27                 serial3 = &uart4;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 cpu@0 {
  35                         compatible = "arm,cortex-a9";
  36                         device_type = "cpu";
  37                         next-level-cache = <&L2>;
  38                         reg = <0x0>;
  39
  40                         clocks = <&dpll_mpu_ck>;
  41                         clock-names = "cpu";
  42
  43                         clock-latency = <300000>; /* From omap-cpufreq driver */
  44                 };
  45                 cpu@1 {
  46                         compatible = "arm,cortex-a9";
  47                         device_type = "cpu";
  48                         next-level-cache = <&L2>;
  49                         reg = <0x1>;
  50                 };
  51         };
  52
  53         gic: interrupt-controller@48241000 {
  54                 compatible = "arm,cortex-a9-gic";
  55                 interrupt-controller;
  56                 #interrupt-cells = <3>;
  57                 reg = <0x48241000 0x1000>,
  58                       <0x48240100 0x0100>;
  59                 interrupt-parent = <&gic>;
  60         };
  61
  62         L2: l2-cache-controller@48242000 {
  63                 compatible = "arm,pl310-cache";
  64                 reg = <0x48242000 0x1000>;
  65                 cache-unified;
  66                 cache-level = <2>;
  67         };
  68
  69         local-timer@48240600 {
  70                 compatible = "arm,cortex-a9-twd-timer";
  71                 clocks = <&mpu_periphclk>;
  72                 reg = <0x48240600 0x20>;
  73                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_HIGH)>;
  74                 interrupt-parent = <&gic>;
  75         };
  76
  77         wakeupgen: interrupt-controller@48281000 {
  78                 compatible = "ti,omap4-wugen-mpu";
  79                 interrupt-controller;
  80                 #interrupt-cells = <3>;
  81                 reg = <0x48281000 0x1000>;
  82                 interrupt-parent = <&gic>;
  83         };
  84
  85         /*
  86          * The soc node represents the soc top level view. It is used for IPs
  87          * that are not memory mapped in the MPU view or for the MPU itself.
  88          */
  89         soc {
  90                 compatible = "ti,omap-infra";
  91                 mpu {
  92                         compatible = "ti,omap4-mpu";
  93                         ti,hwmods = "mpu";
  94                         sram = <&ocmcram>;
  95                 };
  96
  97                 dsp {
  98                         compatible = "ti,omap3-c64";
  99                         ti,hwmods = "dsp";
 100                 };
 101
 102                 iva {
 103                         compatible = "ti,ivahd";
 104                         ti,hwmods = "iva";
 105                 };
 106         };
 107
 108         /*
 109          * XXX: Use a flat representation of the OMAP4 interconnect.
 110          * The real OMAP interconnect network is quite complex.
 111          * Since it will not bring real advantage to represent that in DT for
 112          * the moment, just use a fake OCP bus entry to represent the whole bus
 113          * hierarchy.
 114          */
 115         ocp {
 116                 compatible = "ti,omap4-l3-noc", "simple-bus";
 117                 #address-cells = <1>;
 118                 #size-cells = <1>;
 119                 ranges;
 120                 ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
 121                 reg = <0x44000000 0x1000>,
 122                       <0x44800000 0x2000>,
 123                       <0x45000000 0x1000>;
 124                 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
 125                              <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 126
 127                 l4_cfg: l4@4a000000 {
 128                         compatible = "ti,omap4-l4-cfg", "simple-bus";
 129                         #address-cells = <1>;
 130                         #size-cells = <1>;
 131                         ranges = <0 0x4a000000 0x1000000>;
 132
 133                         cm1: cm1@4000 {
 134                                 compatible = "ti,omap4-cm1";
 135                                 reg = <0x4000 0x2000>;
 136
 137                                 cm1_clocks: clocks {
 138                                         #address-cells = <1>;
 139                                         #size-cells = <0>;
 140                                 };
 141
 142                                 cm1_clockdomains: clockdomains {
 143                                 };
 144                         };
 145
 146                         cm2: cm2@8000 {
 147                                 compatible = "ti,omap4-cm2";
 148                                 reg = <0x8000 0x3000>;
 149
 150                                 cm2_clocks: clocks {
 151                                         #address-cells = <1>;
 152                                         #size-cells = <0>;
 153                                 };
 154
 155                                 cm2_clockdomains: clockdomains {
 156                                 };
 157                         };
 158
 159                         omap4_scm_core: scm@2000 {
 160                                 compatible = "ti,omap4-scm-core", "simple-bus";
 161                                 reg = <0x2000 0x1000>;
 162                                 #address-cells = <1>;
 163                                 #size-cells = <1>;
 164                                 ranges = <0 0x2000 0x1000>;
 165
 166                                 scm_conf: scm_conf@0 {
 167                                         compatible = "syscon";
 168                                         reg = <0x0 0x800>;
 169                                         #address-cells = <1>;
 170                                         #size-cells = <1>;
 171                                 };
 172                         };
 173
 174                         omap4_padconf_core: scm@100000 {
 175                                 compatible = "ti,omap4-scm-padconf-core",
 176                                              "simple-bus";
 177                                 #address-cells = <1>;
 178                                 #size-cells = <1>;
 179                                 ranges = <0 0x100000 0x1000>;
 180
 181                                 omap4_pmx_core: pinmux@40 {
 182                                         compatible = "ti,omap4-padconf",
 183                                                      "pinctrl-single";
 184                                         reg = <0x40 0x0196>;
 185                                         #address-cells = <1>;
 186                                         #size-cells = <0>;
 187                                         #interrupt-cells = <1>;
 188                                         interrupt-controller;
 189                                         pinctrl-single,register-width = <16>;
 190                                         pinctrl-single,function-mask = <0x7fff>;
 191                                 };
 192
 193                                 omap4_padconf_global: omap4_padconf_global@5a0 {
 194                                         compatible = "syscon";
 195                                         reg = <0x5a0 0x170>;
 196                                         #address-cells = <1>;
 197                                         #size-cells = <1>;
 198
 199                                         pbias_regulator: pbias_regulator {
 200                                                 compatible = "ti,pbias-omap";
 201                                                 reg = <0x60 0x4>;
 202                                                 syscon = <&omap4_padconf_global>;
 203                                                 pbias_mmc_reg: pbias_mmc_omap4 {
 204                                                         regulator-name = "pbias_mmc_omap4";
 205                                                         regulator-min-microvolt = <1800000>;
 206                                                         regulator-max-microvolt = <3000000>;
 207                                                 };
 208                                         };
 209                                 };
 210                         };
 211
 212                         l4_wkup: l4@300000 {
 213                                 compatible = "ti,omap4-l4-wkup", "simple-bus";
 214                                 #address-cells = <1>;
 215                                 #size-cells = <1>;
 216                                 ranges = <0 0x300000 0x40000>;
 217
 218                                 counter32k: counter@4000 {
 219                                         compatible = "ti,omap-counter32k";
 220                                         reg = <0x4000 0x20>;
 221                                         ti,hwmods = "counter_32k";
 222                                 };
 223
 224                                 prm: prm@6000 {
 225                                         compatible = "ti,omap4-prm";
 226                                         reg = <0x6000 0x3000>;
 227                                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 228
 229                                         prm_clocks: clocks {
 230                                                 #address-cells = <1>;
 231                                                 #size-cells = <0>;
 232                                         };
 233
 234                                         prm_clockdomains: clockdomains {
 235                                         };
 236                                 };
 237
 238                                 scrm: scrm@a000 {
 239                                         compatible = "ti,omap4-scrm";
 240                                         reg = <0xa000 0x2000>;
 241
 242                                         scrm_clocks: clocks {
 243                                                 #address-cells = <1>;
 244                                                 #size-cells = <0>;
 245                                         };
 246
 247                                         scrm_clockdomains: clockdomains {
 248                                         };
 249                                 };
 250
 251                                 omap4_pmx_wkup: pinmux@1e040 {
 252                                         compatible = "ti,omap4-padconf",
 253                                                      "pinctrl-single";
 254                                         reg = <0x1e040 0x0038>;
 255                                         #address-cells = <1>;
 256                                         #size-cells = <0>;
 257                                         #interrupt-cells = <1>;
 258                                         interrupt-controller;
 259                                         pinctrl-single,register-width = <16>;
 260                                         pinctrl-single,function-mask = <0x7fff>;
 261                                 };
 262                         };
 263                 };
 264
 265                 ocmcram: ocmcram@40304000 {
 266                         compatible = "mmio-sram";
 267                         reg = <0x40304000 0xa000>; /* 40k */
 268                 };
 269
 270                 sdma: dma-controller@4a056000 {
 271                         compatible = "ti,omap4430-sdma";
 272                         reg = <0x4a056000 0x1000>;
 273                         interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
 274                                      <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
 275                                      <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
 276                                      <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
 277                         #dma-cells = <1>;
 278                         dma-channels = <32>;
 279                         dma-requests = <127>;
 280                 };
 281
 282                 gpio1: gpio@4a310000 {
 283                         compatible = "ti,omap4-gpio";
 284                         reg = <0x4a310000 0x200>;
 285                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 286                         ti,hwmods = "gpio1";
 287                         ti,gpio-always-on;
 288                         gpio-controller;
 289                         #gpio-cells = <2>;
 290                         interrupt-controller;
 291                         #interrupt-cells = <2>;
 292                 };
 293
 294                 gpio2: gpio@48055000 {
 295                         compatible = "ti,omap4-gpio";
 296                         reg = <0x48055000 0x200>;
 297                         interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
 298                         ti,hwmods = "gpio2";
 299                         gpio-controller;
 300                         #gpio-cells = <2>;
 301                         interrupt-controller;
 302                         #interrupt-cells = <2>;
 303                 };
 304
 305                 gpio3: gpio@48057000 {
 306                         compatible = "ti,omap4-gpio";
 307                         reg = <0x48057000 0x200>;
 308                         interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
 309                         ti,hwmods = "gpio3";
 310                         gpio-controller;
 311                         #gpio-cells = <2>;
 312                         interrupt-controller;
 313                         #interrupt-cells = <2>;
 314                 };
 315
 316                 gpio4: gpio@48059000 {
 317                         compatible = "ti,omap4-gpio";
 318                         reg = <0x48059000 0x200>;
 319                         interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
 320                         ti,hwmods = "gpio4";
 321                         gpio-controller;
 322                         #gpio-cells = <2>;
 323                         interrupt-controller;
 324                         #interrupt-cells = <2>;
 325                 };
 326
 327                 gpio5: gpio@4805b000 {
 328                         compatible = "ti,omap4-gpio";
 329                         reg = <0x4805b000 0x200>;
 330                         interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
 331                         ti,hwmods = "gpio5";
 332                         gpio-controller;
 333                         #gpio-cells = <2>;
 334                         interrupt-controller;
 335                         #interrupt-cells = <2>;
 336                 };
 337
 338                 gpio6: gpio@4805d000 {
 339                         compatible = "ti,omap4-gpio";
 340                         reg = <0x4805d000 0x200>;
 341                         interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
 342                         ti,hwmods = "gpio6";
 343                         gpio-controller;
 344                         #gpio-cells = <2>;
 345                         interrupt-controller;
 346                         #interrupt-cells = <2>;
 347                 };
 348
 349                 gpmc: gpmc@50000000 {
 350                         compatible = "ti,omap4430-gpmc";
 351                         reg = <0x50000000 0x1000>;
 352                         #address-cells = <2>;
 353                         #size-cells = <1>;
 354                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 355                         gpmc,num-cs = <8>;
 356                         gpmc,num-waitpins = <4>;
 357                         ti,hwmods = "gpmc";
 358                         ti,no-idle-on-init;
 359                         clocks = <&l3_div_ck>;
 360                         clock-names = "fck";
 361                 };
 362
 363                 uart1: serial@4806a000 {
 364                         compatible = "ti,omap4-uart";
 365                         reg = <0x4806a000 0x100>;
 366                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
 367                         ti,hwmods = "uart1";
 368                         clock-frequency = <48000000>;
 369                 };
 370
 371                 uart2: serial@4806c000 {
 372                         compatible = "ti,omap4-uart";
 373                         reg = <0x4806c000 0x100>;
 374                         interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
 375                         ti,hwmods = "uart2";
 376                         clock-frequency = <48000000>;
 377                 };
 378
 379                 uart3: serial@48020000 {
 380                         compatible = "ti,omap4-uart";
 381                         reg = <0x48020000 0x100>;
 382                         interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
 383                         ti,hwmods = "uart3";
 384                         clock-frequency = <48000000>;
 385                 };
 386
 387                 uart4: serial@4806e000 {
 388                         compatible = "ti,omap4-uart";
 389                         reg = <0x4806e000 0x100>;
 390                         interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
 391                         ti,hwmods = "uart4";
 392                         clock-frequency = <48000000>;
 393                 };
 394
 395                 hwspinlock: spinlock@4a0f6000 {
 396                         compatible = "ti,omap4-hwspinlock";
 397                         reg = <0x4a0f6000 0x1000>;
 398                         ti,hwmods = "spinlock";
 399                         #hwlock-cells = <1>;
 400                 };
 401
 402                 i2c1: i2c@48070000 {
 403                         compatible = "ti,omap4-i2c";
 404                         reg = <0x48070000 0x100>;
 405                         interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
 406                         #address-cells = <1>;
 407                         #size-cells = <0>;
 408                         ti,hwmods = "i2c1";
 409                 };
 410
 411                 i2c2: i2c@48072000 {
 412                         compatible = "ti,omap4-i2c";
 413                         reg = <0x48072000 0x100>;
 414                         interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
 415                         #address-cells = <1>;
 416                         #size-cells = <0>;
 417                         ti,hwmods = "i2c2";
 418                 };
 419
 420                 i2c3: i2c@48060000 {
 421                         compatible = "ti,omap4-i2c";
 422                         reg = <0x48060000 0x100>;
 423                         interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
 424                         #address-cells = <1>;
 425                         #size-cells = <0>;
 426                         ti,hwmods = "i2c3";
 427                 };
 428
 429                 i2c4: i2c@48350000 {
 430                         compatible = "ti,omap4-i2c";
 431                         reg = <0x48350000 0x100>;
 432                         interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
 433                         #address-cells = <1>;
 434                         #size-cells = <0>;
 435                         ti,hwmods = "i2c4";
 436                 };
 437
 438                 mcspi1: spi@48098000 {
 439                         compatible = "ti,omap4-mcspi";
 440                         reg = <0x48098000 0x200>;
 441                         interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
 442                         #address-cells = <1>;
 443                         #size-cells = <0>;
 444                         ti,hwmods = "mcspi1";
 445                         ti,spi-num-cs = <4>;
 446                         dmas = <&sdma 35>,
 447                                <&sdma 36>,
 448                                <&sdma 37>,
 449                                <&sdma 38>,
 450                                <&sdma 39>,
 451                                <&sdma 40>,
 452                                <&sdma 41>,
 453                                <&sdma 42>;
 454                         dma-names = "tx0", "rx0", "tx1", "rx1",
 455                                     "tx2", "rx2", "tx3", "rx3";
 456                 };
 457
 458                 mcspi2: spi@4809a000 {
 459                         compatible = "ti,omap4-mcspi";
 460                         reg = <0x4809a000 0x200>;
 461                         interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
 462                         #address-cells = <1>;
 463                         #size-cells = <0>;
 464                         ti,hwmods = "mcspi2";
 465                         ti,spi-num-cs = <2>;
 466                         dmas = <&sdma 43>,
 467                                <&sdma 44>,
 468                                <&sdma 45>,
 469                                <&sdma 46>;
 470                         dma-names = "tx0", "rx0", "tx1", "rx1";
 471                 };
 472
 473                 mcspi3: spi@480b8000 {
 474                         compatible = "ti,omap4-mcspi";
 475                         reg = <0x480b8000 0x200>;
 476                         interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
 477                         #address-cells = <1>;
 478                         #size-cells = <0>;
 479                         ti,hwmods = "mcspi3";
 480                         ti,spi-num-cs = <2>;
 481                         dmas = <&sdma 15>, <&sdma 16>;
 482                         dma-names = "tx0", "rx0";
 483                 };
 484
 485                 mcspi4: spi@480ba000 {
 486                         compatible = "ti,omap4-mcspi";
 487                         reg = <0x480ba000 0x200>;
 488                         interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
 489                         #address-cells = <1>;
 490                         #size-cells = <0>;
 491                         ti,hwmods = "mcspi4";
 492                         ti,spi-num-cs = <1>;
 493                         dmas = <&sdma 70>, <&sdma 71>;
 494                         dma-names = "tx0", "rx0";
 495                 };
 496
 497                 mmc1: mmc@4809c000 {
 498                         compatible = "ti,omap4-hsmmc";
 499                         reg = <0x4809c000 0x400>;
 500                         interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
 501                         ti,hwmods = "mmc1";
 502                         ti,dual-volt;
 503                         ti,needs-special-reset;
 504                         dmas = <&sdma 61>, <&sdma 62>;
 505                         dma-names = "tx", "rx";
 506                         pbias-supply = <&pbias_mmc_reg>;
 507                 };
 508
 509                 mmc2: mmc@480b4000 {
 510                         compatible = "ti,omap4-hsmmc";
 511                         reg = <0x480b4000 0x400>;
 512                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 513                         ti,hwmods = "mmc2";
 514                         ti,needs-special-reset;
 515                         dmas = <&sdma 47>, <&sdma 48>;
 516                         dma-names = "tx", "rx";
 517                 };
 518
 519                 mmc3: mmc@480ad000 {
 520                         compatible = "ti,omap4-hsmmc";
 521                         reg = <0x480ad000 0x400>;
 522                         interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
 523                         ti,hwmods = "mmc3";
 524                         ti,needs-special-reset;
 525                         dmas = <&sdma 77>, <&sdma 78>;
 526                         dma-names = "tx", "rx";
 527                 };
 528
 529                 mmc4: mmc@480d1000 {
 530                         compatible = "ti,omap4-hsmmc";
 531                         reg = <0x480d1000 0x400>;
 532                         interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
 533                         ti,hwmods = "mmc4";
 534                         ti,needs-special-reset;
 535                         dmas = <&sdma 57>, <&sdma 58>;
 536                         dma-names = "tx", "rx";
 537                 };
 538
 539                 mmc5: mmc@480d5000 {
 540                         compatible = "ti,omap4-hsmmc";
 541                         reg = <0x480d5000 0x400>;
 542                         interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
 543                         ti,hwmods = "mmc5";
 544                         ti,needs-special-reset;
 545                         dmas = <&sdma 59>, <&sdma 60>;
 546                         dma-names = "tx", "rx";
 547                 };
 548
 549                 mmu_dsp: mmu@4a066000 {
 550                         compatible = "ti,omap4-iommu";
 551                         reg = <0x4a066000 0x100>;
 552                         interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
 553                         ti,hwmods = "mmu_dsp";
 554                         #iommu-cells = <0>;
 555                 };
 556
 557                 mmu_ipu: mmu@55082000 {
 558                         compatible = "ti,omap4-iommu";
 559                         reg = <0x55082000 0x100>;
 560                         interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
 561                         ti,hwmods = "mmu_ipu";
 562                         #iommu-cells = <0>;
 563                         ti,iommu-bus-err-back;
 564                 };
 565
 566                 wdt2: wdt@4a314000 {
 567                         compatible = "ti,omap4-wdt", "ti,omap3-wdt";
 568                         reg = <0x4a314000 0x80>;
 569                         interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 570                         ti,hwmods = "wd_timer2";
 571                 };
 572
 573                 mcpdm: mcpdm@40132000 {
 574                         compatible = "ti,omap4-mcpdm";
 575                         reg = <0x40132000 0x7f>, /* MPU private access */
 576                               <0x49032000 0x7f>; /* L3 Interconnect */
 577                         reg-names = "mpu", "dma";
 578                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
 579                         ti,hwmods = "mcpdm";
 580                         dmas = <&sdma 65>,
 581                                <&sdma 66>;
 582                         dma-names = "up_link", "dn_link";
 583                         status = "disabled";
 584                 };
 585
 586                 dmic: dmic@4012e000 {
 587                         compatible = "ti,omap4-dmic";
 588                         reg = <0x4012e000 0x7f>, /* MPU private access */
 589                               <0x4902e000 0x7f>; /* L3 Interconnect */
 590                         reg-names = "mpu", "dma";
 591                         interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
 592                         ti,hwmods = "dmic";
 593                         dmas = <&sdma 67>;
 594                         dma-names = "up_link";
 595                         status = "disabled";
 596                 };
 597
 598                 mcbsp1: mcbsp@40122000 {
 599                         compatible = "ti,omap4-mcbsp";
 600                         reg = <0x40122000 0xff>, /* MPU private access */
 601                               <0x49022000 0xff>; /* L3 Interconnect */
 602                         reg-names = "mpu", "dma";
 603                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 604                         interrupt-names = "common";
 605                         ti,buffer-size = <128>;
 606                         ti,hwmods = "mcbsp1";
 607                         dmas = <&sdma 33>,
 608                                <&sdma 34>;
 609                         dma-names = "tx", "rx";
 610                         status = "disabled";
 611                 };
 612
 613                 mcbsp2: mcbsp@40124000 {
 614                         compatible = "ti,omap4-mcbsp";
 615                         reg = <0x40124000 0xff>, /* MPU private access */
 616                               <0x49024000 0xff>; /* L3 Interconnect */
 617                         reg-names = "mpu", "dma";
 618                         interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
 619                         interrupt-names = "common";
 620                         ti,buffer-size = <128>;
 621                         ti,hwmods = "mcbsp2";
 622                         dmas = <&sdma 17>,
 623                                <&sdma 18>;
 624                         dma-names = "tx", "rx";
 625                         status = "disabled";
 626                 };
 627
 628                 mcbsp3: mcbsp@40126000 {
 629                         compatible = "ti,omap4-mcbsp";
 630                         reg = <0x40126000 0xff>, /* MPU private access */
 631                               <0x49026000 0xff>; /* L3 Interconnect */
 632                         reg-names = "mpu", "dma";
 633                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 634                         interrupt-names = "common";
 635                         ti,buffer-size = <128>;
 636                         ti,hwmods = "mcbsp3";
 637                         dmas = <&sdma 19>,
 638                                <&sdma 20>;
 639                         dma-names = "tx", "rx";
 640                         status = "disabled";
 641                 };
 642
 643                 mcbsp4: mcbsp@48096000 {
 644                         compatible = "ti,omap4-mcbsp";
 645                         reg = <0x48096000 0xff>; /* L4 Interconnect */
 646                         reg-names = "mpu";
 647                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 648                         interrupt-names = "common";
 649                         ti,buffer-size = <128>;
 650                         ti,hwmods = "mcbsp4";
 651                         dmas = <&sdma 31>,
 652                                <&sdma 32>;
 653                         dma-names = "tx", "rx";
 654                         status = "disabled";
 655                 };
 656
 657                 keypad: keypad@4a31c000 {
 658                         compatible = "ti,omap4-keypad";
 659                         reg = <0x4a31c000 0x80>;
 660                         interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
 661                         reg-names = "mpu";
 662                         ti,hwmods = "kbd";
 663                 };
 664
 665                 dmm@4e000000 {
 666                         compatible = "ti,omap4-dmm";
 667                         reg = <0x4e000000 0x800>;
 668                         interrupts = <0 113 0x4>;
 669                         ti,hwmods = "dmm";
 670                 };
 671
 672                 emif1: emif@4c000000 {
 673                         compatible = "ti,emif-4d";
 674                         reg = <0x4c000000 0x100>;
 675                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 676                         ti,hwmods = "emif1";
 677                         ti,no-idle-on-init;
 678                         phy-type = <1>;
 679                         hw-caps-read-idle-ctrl;
 680                         hw-caps-ll-interface;
 681                         hw-caps-temp-alert;
 682                 };
 683
 684                 emif2: emif@4d000000 {
 685                         compatible = "ti,emif-4d";
 686                         reg = <0x4d000000 0x100>;
 687                         interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
 688                         ti,hwmods = "emif2";
 689                         ti,no-idle-on-init;
 690                         phy-type = <1>;
 691                         hw-caps-read-idle-ctrl;
 692                         hw-caps-ll-interface;
 693                         hw-caps-temp-alert;
 694                 };
 695
 696                 ocp2scp@4a0ad000 {
 697                         compatible = "ti,omap-ocp2scp";
 698                         reg = <0x4a0ad000 0x1f>;
 699                         #address-cells = <1>;
 700                         #size-cells = <1>;
 701                         ranges;
 702                         ti,hwmods = "ocp2scp_usb_phy";
 703                         usb2_phy: usb2phy@4a0ad080 {
 704                                 compatible = "ti,omap-usb2";
 705                                 reg = <0x4a0ad080 0x58>;
 706                                 ctrl-module = <&omap_control_usb2phy>;
 707                                 clocks = <&usb_phy_cm_clk32k>;
 708                                 clock-names = "wkupclk";
 709                                 #phy-cells = <0>;
 710                         };
 711                 };
 712
 713                 mailbox: mailbox@4a0f4000 {
 714                         compatible = "ti,omap4-mailbox";
 715                         reg = <0x4a0f4000 0x200>;
 716                         interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 717                         ti,hwmods = "mailbox";
 718                         #mbox-cells = <1>;
 719                         ti,mbox-num-users = <3>;
 720                         ti,mbox-num-fifos = <8>;
 721                         mbox_ipu: mbox_ipu {
 722                                 ti,mbox-tx = <0 0 0>;
 723                                 ti,mbox-rx = <1 0 0>;
 724                         };
 725                         mbox_dsp: mbox_dsp {
 726                                 ti,mbox-tx = <3 0 0>;
 727                                 ti,mbox-rx = <2 0 0>;
 728                         };
 729                 };
 730
 731                 timer1: timer@4a318000 {
 732                         compatible = "ti,omap3430-timer";
 733                         reg = <0x4a318000 0x80>;
 734                         interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 735                         ti,hwmods = "timer1";
 736                         ti,timer-alwon;
 737                 };
 738
 739                 timer2: timer@48032000 {
 740                         compatible = "ti,omap3430-timer";
 741                         reg = <0x48032000 0x80>;
 742                         interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
 743                         ti,hwmods = "timer2";
 744                 };
 745
 746                 timer3: timer@48034000 {
 747                         compatible = "ti,omap4430-timer";
 748                         reg = <0x48034000 0x80>;
 749                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
 750                         ti,hwmods = "timer3";
 751                 };
 752
 753                 timer4: timer@48036000 {
 754                         compatible = "ti,omap4430-timer";
 755                         reg = <0x48036000 0x80>;
 756                         interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
 757                         ti,hwmods = "timer4";
 758                 };
 759
 760                 timer5: timer@40138000 {
 761                         compatible = "ti,omap4430-timer";
 762                         reg = <0x40138000 0x80>,
 763                               <0x49038000 0x80>;
 764                         interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 765                         ti,hwmods = "timer5";
 766                         ti,timer-dsp;
 767                 };
 768
 769                 timer6: timer@4013a000 {
 770                         compatible = "ti,omap4430-timer";
 771                         reg = <0x4013a000 0x80>,
 772                               <0x4903a000 0x80>;
 773                         interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 774                         ti,hwmods = "timer6";
 775                         ti,timer-dsp;
 776                 };
 777
 778                 timer7: timer@4013c000 {
 779                         compatible = "ti,omap4430-timer";
 780                         reg = <0x4013c000 0x80>,
 781                               <0x4903c000 0x80>;
 782                         interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
 783                         ti,hwmods = "timer7";
 784                         ti,timer-dsp;
 785                 };
 786
 787                 timer8: timer@4013e000 {
 788                         compatible = "ti,omap4430-timer";
 789                         reg = <0x4013e000 0x80>,
 790                               <0x4903e000 0x80>;
 791                         interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
 792                         ti,hwmods = "timer8";
 793                         ti,timer-pwm;
 794                         ti,timer-dsp;
 795                 };
 796
 797                 timer9: timer@4803e000 {
 798                         compatible = "ti,omap4430-timer";
 799                         reg = <0x4803e000 0x80>;
 800                         interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 801                         ti,hwmods = "timer9";
 802                         ti,timer-pwm;
 803                 };
 804
 805                 timer10: timer@48086000 {
 806                         compatible = "ti,omap3430-timer";
 807                         reg = <0x48086000 0x80>;
 808                         interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
 809                         ti,hwmods = "timer10";
 810                         ti,timer-pwm;
 811                 };
 812
 813                 timer11: timer@48088000 {
 814                         compatible = "ti,omap4430-timer";
 815                         reg = <0x48088000 0x80>;
 816                         interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 817                         ti,hwmods = "timer11";
 818                         ti,timer-pwm;
 819                 };
 820
 821                 usbhstll: usbhstll@4a062000 {
 822                         compatible = "ti,usbhs-tll";
 823                         reg = <0x4a062000 0x1000>;
 824                         interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 825                         ti,hwmods = "usb_tll_hs";
 826                 };
 827
 828                 usbhshost: usbhshost@4a064000 {
 829                         compatible = "ti,usbhs-host";
 830                         reg = <0x4a064000 0x800>;
 831                         ti,hwmods = "usb_host_hs";
 832                         #address-cells = <1>;
 833                         #size-cells = <1>;
 834                         ranges;
 835                         clocks = <&init_60m_fclk>,
 836                                  <&xclk60mhsp1_ck>,
 837                                  <&xclk60mhsp2_ck>;
 838                         clock-names = "refclk_60m_int",
 839                                       "refclk_60m_ext_p1",
 840                                       "refclk_60m_ext_p2";
 841
 842                         usbhsohci: ohci@4a064800 {
 843                                 compatible = "ti,ohci-omap3";
 844                                 reg = <0x4a064800 0x400>;
 845                                 interrupt-parent = <&gic>;
 846                                 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
 847                         };
 848
 849                         usbhsehci: ehci@4a064c00 {
 850                                 compatible = "ti,ehci-omap";
 851                                 reg = <0x4a064c00 0x400>;
 852                                 interrupt-parent = <&gic>;
 853                                 interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
 854                         };
 855                 };
 856
 857                 omap_control_usb2phy: control-phy@4a002300 {
 858                         compatible = "ti,control-phy-usb2";
 859                         reg = <0x4a002300 0x4>;
 860                         reg-names = "power";
 861                 };
 862
 863                 omap_control_usbotg: control-phy@4a00233c {
 864                         compatible = "ti,control-phy-otghs";
 865                         reg = <0x4a00233c 0x4>;
 866                         reg-names = "otghs_control";
 867                 };
 868
 869                 usb_otg_hs: usb_otg_hs@4a0ab000 {
 870                         compatible = "ti,omap4-musb";
 871                         reg = <0x4a0ab000 0x7ff>;
 872                         interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
 873                         interrupt-names = "mc", "dma";
 874                         ti,hwmods = "usb_otg_hs";
 875                         usb-phy = <&usb2_phy>;
 876                         phys = <&usb2_phy>;
 877                         phy-names = "usb2-phy";
 878                         multipoint = <1>;
 879                         num-eps = <16>;
 880                         ram-bits = <12>;
 881                         ctrl-module = <&omap_control_usbotg>;
 882                 };
 883
 884                 aes: aes@4b501000 {
 885                         compatible = "ti,omap4-aes";
 886                         ti,hwmods = "aes";
 887                         reg = <0x4b501000 0xa0>;
 888                         interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
 889                         dmas = <&sdma 111>, <&sdma 110>;
 890                         dma-names = "tx", "rx";
 891                 };
 892
 893                 des: des@480a5000 {
 894                         compatible = "ti,omap4-des";
 895                         ti,hwmods = "des";
 896                         reg = <0x480a5000 0xa0>;
 897                         interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
 898                         dmas = <&sdma 117>, <&sdma 116>;
 899                         dma-names = "tx", "rx";
 900                 };
 901
 902                 abb_mpu: regulator-abb-mpu {
 903                         compatible = "ti,abb-v2";
 904                         regulator-name = "abb_mpu";
 905                         #address-cells = <0>;
 906                         #size-cells = <0>;
 907                         ti,tranxdone-status-mask = <0x80>;
 908                         clocks = <&sys_clkin_ck>;
 909                         ti,settling-time = <50>;
 910                         ti,clock-cycles = <16>;
 911
 912                         status = "disabled";
 913                 };
 914
 915                 abb_iva: regulator-abb-iva {
 916                         compatible = "ti,abb-v2";
 917                         regulator-name = "abb_iva";
 918                         #address-cells = <0>;
 919                         #size-cells = <0>;
 920                         ti,tranxdone-status-mask = <0x80000000>;
 921                         clocks = <&sys_clkin_ck>;
 922                         ti,settling-time = <50>;
 923                         ti,clock-cycles = <16>;
 924
 925                         status = "disabled";
 926                 };
 927
 928                 dss: dss@58000000 {
 929                         compatible = "ti,omap4-dss";
 930                         reg = <0x58000000 0x80>;
 931                         status = "disabled";
 932                         ti,hwmods = "dss_core";
 933                         clocks = <&dss_dss_clk>;
 934                         clock-names = "fck";
 935                         #address-cells = <1>;
 936                         #size-cells = <1>;
 937                         ranges;
 938
 939                         dispc@58001000 {
 940                                 compatible = "ti,omap4-dispc";
 941                                 reg = <0x58001000 0x1000>;
 942                                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 943                                 ti,hwmods = "dss_dispc";
 944                                 clocks = <&dss_dss_clk>;
 945                                 clock-names = "fck";
 946                         };
 947
 948                         rfbi: encoder@58002000  {
 949                                 compatible = "ti,omap4-rfbi";
 950                                 reg = <0x58002000 0x1000>;
 951                                 status = "disabled";
 952                                 ti,hwmods = "dss_rfbi";
 953                                 clocks = <&dss_dss_clk>, <&l3_div_ck>;
 954                                 clock-names = "fck", "ick";
 955                         };
 956
 957                         venc: encoder@58003000 {
 958                                 compatible = "ti,omap4-venc";
 959                                 reg = <0x58003000 0x1000>;
 960                                 status = "disabled";
 961                                 ti,hwmods = "dss_venc";
 962                                 clocks = <&dss_tv_clk>;
 963                                 clock-names = "fck";
 964                         };
 965
 966                         dsi1: encoder@58004000 {
 967                                 compatible = "ti,omap4-dsi";
 968                                 reg = <0x58004000 0x200>,
 969                                       <0x58004200 0x40>,
 970                                       <0x58004300 0x20>;
 971                                 reg-names = "proto", "phy", "pll";
 972                                 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
 973                                 status = "disabled";
 974                                 ti,hwmods = "dss_dsi1";
 975                                 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
 976                                 clock-names = "fck", "sys_clk";
 977                         };
 978
 979                         dsi2: encoder@58005000 {
 980                                 compatible = "ti,omap4-dsi";
 981                                 reg = <0x58005000 0x200>,
 982                                       <0x58005200 0x40>,
 983                                       <0x58005300 0x20>;
 984                                 reg-names = "proto", "phy", "pll";
 985                                 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 986                                 status = "disabled";
 987                                 ti,hwmods = "dss_dsi2";
 988                                 clocks = <&dss_dss_clk>, <&dss_sys_clk>;
 989                                 clock-names = "fck", "sys_clk";
 990                         };
 991
 992                         hdmi: encoder@58006000 {
 993                                 compatible = "ti,omap4-hdmi";
 994                                 reg = <0x58006000 0x200>,
 995                                       <0x58006200 0x100>,
 996                                       <0x58006300 0x100>,
 997                                       <0x58006400 0x1000>;
 998                                 reg-names = "wp", "pll", "phy", "core";
 999                                 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1000                                 status = "disabled";
1001                                 ti,hwmods = "dss_hdmi";
1002                                 clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
1003                                 clock-names = "fck", "sys_clk";
1004                                 dmas = <&sdma 76>;
1005                                 dma-names = "audio_tx";
1006                         };
1007                 };
1008         };
1009 };
1010
1011 /include/ "omap44xx-clocks.dtsi"