arch/arm/boot/dts/omap3.dtsi

   1 /*
   2  * Device Tree Source for OMAP3 SoC
   3  *
   4  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include <dt-bindings/interrupt-controller/irq.h>
  13 #include <dt-bindings/pinctrl/omap.h>
  14
  15 #include "skeleton.dtsi"
  16
  17 / {
  18         compatible = "ti,omap3430", "ti,omap3";
  19         interrupt-parent = <&intc>;
  20
  21         aliases {
  22                 i2c0 = &i2c1;
  23                 i2c1 = &i2c2;
  24                 i2c2 = &i2c3;
  25                 serial0 = &uart1;
  26                 serial1 = &uart2;
  27                 serial2 = &uart3;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 cpu@0 {
  35                         compatible = "arm,cortex-a8";
  36                         device_type = "cpu";
  37                         reg = <0x0>;
  38                 };
  39         };
  40
  41         pmu {
  42                 compatible = "arm,cortex-a8-pmu";
  43                 reg = <0x54000000 0x800000>;
  44                 interrupts = <3>;
  45                 ti,hwmods = "debugss";
  46         };
  47
  48         /*
  49          * The soc node represents the soc top level view. It is used for IPs
  50          * that are not memory mapped in the MPU view or for the MPU itself.
  51          */
  52         soc {
  53                 compatible = "ti,omap-infra";
  54                 mpu {
  55                         compatible = "ti,omap3-mpu";
  56                         ti,hwmods = "mpu";
  57                 };
  58
  59                 iva {
  60                         compatible = "ti,iva2.2";
  61                         ti,hwmods = "iva";
  62
  63                         dsp {
  64                                 compatible = "ti,omap3-c64";
  65                         };
  66                 };
  67         };
  68
  69         /*
  70          * XXX: Use a flat representation of the OMAP3 interconnect.
  71          * The real OMAP interconnect network is quite complex.
  72          * Since that will not bring real advantage to represent that in DT for
  73          * the moment, just use a fake OCP bus entry to represent the whole bus
  74          * hierarchy.
  75          */
  76         ocp {
  77                 compatible = "simple-bus";
  78                 reg = <0x68000000 0x10000>;
  79                 interrupts = <9 10>;
  80                 #address-cells = <1>;
  81                 #size-cells = <1>;
  82                 ranges;
  83                 ti,hwmods = "l3_main";
  84
  85                 aes: aes@480c5000 {
  86                         compatible = "ti,omap3-aes";
  87                         ti,hwmods = "aes";
  88                         reg = <0x480c5000 0x50>;
  89                         interrupts = <0>;
  90                 };
  91
  92                 counter32k: counter@48320000 {
  93                         compatible = "ti,omap-counter32k";
  94                         reg = <0x48320000 0x20>;
  95                         ti,hwmods = "counter_32k";
  96                 };
  97
  98                 intc: interrupt-controller@48200000 {
  99                         compatible = "ti,omap2-intc";
 100                         interrupt-controller;
 101                         #interrupt-cells = <1>;
 102                         ti,intc-size = <96>;
 103                         reg = <0x48200000 0x1000>;
 104                 };
 105
 106                 sdma: dma-controller@48056000 {
 107                         compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
 108                         reg = <0x48056000 0x1000>;
 109                         interrupts = <12>,
 110                                      <13>,
 111                                      <14>,
 112                                      <15>;
 113                         #dma-cells = <1>;
 114                         #dma-channels = <32>;
 115                         #dma-requests = <96>;
 116                 };
 117
 118                 omap3_pmx_core: pinmux@48002030 {
 119                         compatible = "ti,omap3-padconf", "pinctrl-single";
 120                         reg = <0x48002030 0x05cc>;
 121                         #address-cells = <1>;
 122                         #size-cells = <0>;
 123                         #interrupt-cells = <1>;
 124                         interrupt-controller;
 125                         pinctrl-single,register-width = <16>;
 126                         pinctrl-single,function-mask = <0xff1f>;
 127                 };
 128
 129                 omap3_pmx_wkup: pinmux@48002a00 {
 130                         compatible = "ti,omap3-padconf", "pinctrl-single";
 131                         reg = <0x48002a00 0x5c>;
 132                         #address-cells = <1>;
 133                         #size-cells = <0>;
 134                         #interrupt-cells = <1>;
 135                         interrupt-controller;
 136                         pinctrl-single,register-width = <16>;
 137                         pinctrl-single,function-mask = <0xff1f>;
 138                 };
 139
 140                 gpio1: gpio@48310000 {
 141                         compatible = "ti,omap3-gpio";
 142                         reg = <0x48310000 0x200>;
 143                         interrupts = <29>;
 144                         ti,hwmods = "gpio1";
 145                         ti,gpio-always-on;
 146                         gpio-controller;
 147                         #gpio-cells = <2>;
 148                         interrupt-controller;
 149                         #interrupt-cells = <2>;
 150                 };
 151
 152                 gpio2: gpio@49050000 {
 153                         compatible = "ti,omap3-gpio";
 154                         reg = <0x49050000 0x200>;
 155                         interrupts = <30>;
 156                         ti,hwmods = "gpio2";
 157                         gpio-controller;
 158                         #gpio-cells = <2>;
 159                         interrupt-controller;
 160                         #interrupt-cells = <2>;
 161                 };
 162
 163                 gpio3: gpio@49052000 {
 164                         compatible = "ti,omap3-gpio";
 165                         reg = <0x49052000 0x200>;
 166                         interrupts = <31>;
 167                         ti,hwmods = "gpio3";
 168                         gpio-controller;
 169                         #gpio-cells = <2>;
 170                         interrupt-controller;
 171                         #interrupt-cells = <2>;
 172                 };
 173
 174                 gpio4: gpio@49054000 {
 175                         compatible = "ti,omap3-gpio";
 176                         reg = <0x49054000 0x200>;
 177                         interrupts = <32>;
 178                         ti,hwmods = "gpio4";
 179                         gpio-controller;
 180                         #gpio-cells = <2>;
 181                         interrupt-controller;
 182                         #interrupt-cells = <2>;
 183                 };
 184
 185                 gpio5: gpio@49056000 {
 186                         compatible = "ti,omap3-gpio";
 187                         reg = <0x49056000 0x200>;
 188                         interrupts = <33>;
 189                         ti,hwmods = "gpio5";
 190                         gpio-controller;
 191                         #gpio-cells = <2>;
 192                         interrupt-controller;
 193                         #interrupt-cells = <2>;
 194                 };
 195
 196                 gpio6: gpio@49058000 {
 197                         compatible = "ti,omap3-gpio";
 198                         reg = <0x49058000 0x200>;
 199                         interrupts = <34>;
 200                         ti,hwmods = "gpio6";
 201                         gpio-controller;
 202                         #gpio-cells = <2>;
 203                         interrupt-controller;
 204                         #interrupt-cells = <2>;
 205                 };
 206
 207                 uart1: serial@4806a000 {
 208                         compatible = "ti,omap3-uart";
 209                         reg = <0x4806a000 0x2000>;
 210                         interrupts = <72>;
 211                         dmas = <&sdma 49 &sdma 50>;
 212                         dma-names = "tx", "rx";
 213                         ti,hwmods = "uart1";
 214                         clock-frequency = <48000000>;
 215                 };
 216
 217                 uart2: serial@4806c000 {
 218                         compatible = "ti,omap3-uart";
 219                         reg = <0x4806c000 0x400>;
 220                         interrupts = <73>;
 221                         dmas = <&sdma 51 &sdma 52>;
 222                         dma-names = "tx", "rx";
 223                         ti,hwmods = "uart2";
 224                         clock-frequency = <48000000>;
 225                 };
 226
 227                 uart3: serial@49020000 {
 228                         compatible = "ti,omap3-uart";
 229                         reg = <0x49020000 0x400>;
 230                         interrupts = <74>;
 231                         dmas = <&sdma 53 &sdma 54>;
 232                         dma-names = "tx", "rx";
 233                         ti,hwmods = "uart3";
 234                         clock-frequency = <48000000>;
 235                 };
 236
 237                 i2c1: i2c@48070000 {
 238                         compatible = "ti,omap3-i2c";
 239                         reg = <0x48070000 0x80>;
 240                         interrupts = <56>;
 241                         dmas = <&sdma 27 &sdma 28>;
 242                         dma-names = "tx", "rx";
 243                         #address-cells = <1>;
 244                         #size-cells = <0>;
 245                         ti,hwmods = "i2c1";
 246                 };
 247
 248                 i2c2: i2c@48072000 {
 249                         compatible = "ti,omap3-i2c";
 250                         reg = <0x48072000 0x80>;
 251                         interrupts = <57>;
 252                         dmas = <&sdma 29 &sdma 30>;
 253                         dma-names = "tx", "rx";
 254                         #address-cells = <1>;
 255                         #size-cells = <0>;
 256                         ti,hwmods = "i2c2";
 257                 };
 258
 259                 i2c3: i2c@48060000 {
 260                         compatible = "ti,omap3-i2c";
 261                         reg = <0x48060000 0x80>;
 262                         interrupts = <61>;
 263                         dmas = <&sdma 25 &sdma 26>;
 264                         dma-names = "tx", "rx";
 265                         #address-cells = <1>;
 266                         #size-cells = <0>;
 267                         ti,hwmods = "i2c3";
 268                 };
 269
 270                 mailbox: mailbox@48094000 {
 271                         compatible = "ti,omap3-mailbox";
 272                         ti,hwmods = "mailbox";
 273                         reg = <0x48094000 0x200>;
 274                         interrupts = <26>;
 275                 };
 276
 277                 mcspi1: spi@48098000 {
 278                         compatible = "ti,omap2-mcspi";
 279                         reg = <0x48098000 0x100>;
 280                         interrupts = <65>;
 281                         #address-cells = <1>;
 282                         #size-cells = <0>;
 283                         ti,hwmods = "mcspi1";
 284                         ti,spi-num-cs = <4>;
 285                         dmas = <&sdma 35>,
 286                                <&sdma 36>,
 287                                <&sdma 37>,
 288                                <&sdma 38>,
 289                                <&sdma 39>,
 290                                <&sdma 40>,
 291                                <&sdma 41>,
 292                                <&sdma 42>;
 293                         dma-names = "tx0", "rx0", "tx1", "rx1",
 294                                     "tx2", "rx2", "tx3", "rx3";
 295                 };
 296
 297                 mcspi2: spi@4809a000 {
 298                         compatible = "ti,omap2-mcspi";
 299                         reg = <0x4809a000 0x100>;
 300                         interrupts = <66>;
 301                         #address-cells = <1>;
 302                         #size-cells = <0>;
 303                         ti,hwmods = "mcspi2";
 304                         ti,spi-num-cs = <2>;
 305                         dmas = <&sdma 43>,
 306                                <&sdma 44>,
 307                                <&sdma 45>,
 308                                <&sdma 46>;
 309                         dma-names = "tx0", "rx0", "tx1", "rx1";
 310                 };
 311
 312                 mcspi3: spi@480b8000 {
 313                         compatible = "ti,omap2-mcspi";
 314                         reg = <0x480b8000 0x100>;
 315                         interrupts = <91>;
 316                         #address-cells = <1>;
 317                         #size-cells = <0>;
 318                         ti,hwmods = "mcspi3";
 319                         ti,spi-num-cs = <2>;
 320                         dmas = <&sdma 15>,
 321                                <&sdma 16>,
 322                                <&sdma 23>,
 323                                <&sdma 24>;
 324                         dma-names = "tx0", "rx0", "tx1", "rx1";
 325                 };
 326
 327                 mcspi4: spi@480ba000 {
 328                         compatible = "ti,omap2-mcspi";
 329                         reg = <0x480ba000 0x100>;
 330                         interrupts = <48>;
 331                         #address-cells = <1>;
 332                         #size-cells = <0>;
 333                         ti,hwmods = "mcspi4";
 334                         ti,spi-num-cs = <1>;
 335                         dmas = <&sdma 70>, <&sdma 71>;
 336                         dma-names = "tx0", "rx0";
 337                 };
 338
 339                 hdqw1w: 1w@480b2000 {
 340                         compatible = "ti,omap3-1w";
 341                         reg = <0x480b2000 0x1000>;
 342                         interrupts = <58>;
 343                         ti,hwmods = "hdq1w";
 344                 };
 345
 346                 mmc1: mmc@4809c000 {
 347                         compatible = "ti,omap3-hsmmc";
 348                         reg = <0x4809c000 0x200>;
 349                         interrupts = <83>;
 350                         ti,hwmods = "mmc1";
 351                         ti,dual-volt;
 352                         dmas = <&sdma 61>, <&sdma 62>;
 353                         dma-names = "tx", "rx";
 354                 };
 355
 356                 mmc2: mmc@480b4000 {
 357                         compatible = "ti,omap3-hsmmc";
 358                         reg = <0x480b4000 0x200>;
 359                         interrupts = <86>;
 360                         ti,hwmods = "mmc2";
 361                         dmas = <&sdma 47>, <&sdma 48>;
 362                         dma-names = "tx", "rx";
 363                 };
 364
 365                 mmc3: mmc@480ad000 {
 366                         compatible = "ti,omap3-hsmmc";
 367                         reg = <0x480ad000 0x200>;
 368                         interrupts = <94>;
 369                         ti,hwmods = "mmc3";
 370                         dmas = <&sdma 77>, <&sdma 78>;
 371                         dma-names = "tx", "rx";
 372                 };
 373
 374                 mmu_isp: mmu@480bd400 {
 375                         compatible = "ti,omap3-mmu-isp";
 376                         ti,hwmods = "mmu_isp";
 377                         reg = <0x480bd400 0x80>;
 378                         interrupts = <8>;
 379                 };
 380
 381                 wdt2: wdt@48314000 {
 382                         compatible = "ti,omap3-wdt";
 383                         reg = <0x48314000 0x80>;
 384                         ti,hwmods = "wd_timer2";
 385                 };
 386
 387                 mcbsp1: mcbsp@48074000 {
 388                         compatible = "ti,omap3-mcbsp";
 389                         reg = <0x48074000 0xff>;
 390                         reg-names = "mpu";
 391                         interrupts = <16>, /* OCP compliant interrupt */
 392                                      <59>, /* TX interrupt */
 393                                      <60>; /* RX interrupt */
 394                         interrupt-names = "common", "tx", "rx";
 395                         ti,buffer-size = <128>;
 396                         ti,hwmods = "mcbsp1";
 397                         dmas = <&sdma 31>,
 398                                <&sdma 32>;
 399                         dma-names = "tx", "rx";
 400                 };
 401
 402                 mcbsp2: mcbsp@49022000 {
 403                         compatible = "ti,omap3-mcbsp";
 404                         reg = <0x49022000 0xff>,
 405                               <0x49028000 0xff>;
 406                         reg-names = "mpu", "sidetone";
 407                         interrupts = <17>, /* OCP compliant interrupt */
 408                                      <62>, /* TX interrupt */
 409                                      <63>, /* RX interrupt */
 410                                      <4>;  /* Sidetone */
 411                         interrupt-names = "common", "tx", "rx", "sidetone";
 412                         ti,buffer-size = <1280>;
 413                         ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
 414                         dmas = <&sdma 33>,
 415                                <&sdma 34>;
 416                         dma-names = "tx", "rx";
 417                 };
 418
 419                 mcbsp3: mcbsp@49024000 {
 420                         compatible = "ti,omap3-mcbsp";
 421                         reg = <0x49024000 0xff>,
 422                               <0x4902a000 0xff>;
 423                         reg-names = "mpu", "sidetone";
 424                         interrupts = <22>, /* OCP compliant interrupt */
 425                                      <89>, /* TX interrupt */
 426                                      <90>, /* RX interrupt */
 427                                      <5>;  /* Sidetone */
 428                         interrupt-names = "common", "tx", "rx", "sidetone";
 429                         ti,buffer-size = <128>;
 430                         ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
 431                         dmas = <&sdma 17>,
 432                                <&sdma 18>;
 433                         dma-names = "tx", "rx";
 434                 };
 435
 436                 mcbsp4: mcbsp@49026000 {
 437                         compatible = "ti,omap3-mcbsp";
 438                         reg = <0x49026000 0xff>;
 439                         reg-names = "mpu";
 440                         interrupts = <23>, /* OCP compliant interrupt */
 441                                      <54>, /* TX interrupt */
 442                                      <55>; /* RX interrupt */
 443                         interrupt-names = "common", "tx", "rx";
 444                         ti,buffer-size = <128>;
 445                         ti,hwmods = "mcbsp4";
 446                         dmas = <&sdma 19>,
 447                                <&sdma 20>;
 448                         dma-names = "tx", "rx";
 449                 };
 450
 451                 mcbsp5: mcbsp@48096000 {
 452                         compatible = "ti,omap3-mcbsp";
 453                         reg = <0x48096000 0xff>;
 454                         reg-names = "mpu";
 455                         interrupts = <27>, /* OCP compliant interrupt */
 456                                      <81>, /* TX interrupt */
 457                                      <82>; /* RX interrupt */
 458                         interrupt-names = "common", "tx", "rx";
 459                         ti,buffer-size = <128>;
 460                         ti,hwmods = "mcbsp5";
 461                         dmas = <&sdma 21>,
 462                                <&sdma 22>;
 463                         dma-names = "tx", "rx";
 464                 };
 465
 466                 sham: sham@480c3000 {
 467                         compatible = "ti,omap3-sham";
 468                         ti,hwmods = "sham";
 469                         reg = <0x480c3000 0x64>;
 470                         interrupts = <49>;
 471                 };
 472
 473                 smartreflex_core: smartreflex@480cb000 {
 474                         compatible = "ti,omap3-smartreflex-core";
 475                         ti,hwmods = "smartreflex_core";
 476                         reg = <0x480cb000 0x400>;
 477                         interrupts = <19>;
 478                 };
 479
 480                 smartreflex_mpu_iva: smartreflex@480c9000 {
 481                         compatible = "ti,omap3-smartreflex-iva";
 482                         ti,hwmods = "smartreflex_mpu_iva";
 483                         reg = <0x480c9000 0x400>;
 484                         interrupts = <18>;
 485                 };
 486
 487                 timer1: timer@48318000 {
 488                         compatible = "ti,omap3430-timer";
 489                         reg = <0x48318000 0x400>;
 490                         interrupts = <37>;
 491                         ti,hwmods = "timer1";
 492                         ti,timer-alwon;
 493                 };
 494
 495                 timer2: timer@49032000 {
 496                         compatible = "ti,omap3430-timer";
 497                         reg = <0x49032000 0x400>;
 498                         interrupts = <38>;
 499                         ti,hwmods = "timer2";
 500                 };
 501
 502                 timer3: timer@49034000 {
 503                         compatible = "ti,omap3430-timer";
 504                         reg = <0x49034000 0x400>;
 505                         interrupts = <39>;
 506                         ti,hwmods = "timer3";
 507                 };
 508
 509                 timer4: timer@49036000 {
 510                         compatible = "ti,omap3430-timer";
 511                         reg = <0x49036000 0x400>;
 512                         interrupts = <40>;
 513                         ti,hwmods = "timer4";
 514                 };
 515
 516                 timer5: timer@49038000 {
 517                         compatible = "ti,omap3430-timer";
 518                         reg = <0x49038000 0x400>;
 519                         interrupts = <41>;
 520                         ti,hwmods = "timer5";
 521                         ti,timer-dsp;
 522                 };
 523
 524                 timer6: timer@4903a000 {
 525                         compatible = "ti,omap3430-timer";
 526                         reg = <0x4903a000 0x400>;
 527                         interrupts = <42>;
 528                         ti,hwmods = "timer6";
 529                         ti,timer-dsp;
 530                 };
 531
 532                 timer7: timer@4903c000 {
 533                         compatible = "ti,omap3430-timer";
 534                         reg = <0x4903c000 0x400>;
 535                         interrupts = <43>;
 536                         ti,hwmods = "timer7";
 537                         ti,timer-dsp;
 538                 };
 539
 540                 timer8: timer@4903e000 {
 541                         compatible = "ti,omap3430-timer";
 542                         reg = <0x4903e000 0x400>;
 543                         interrupts = <44>;
 544                         ti,hwmods = "timer8";
 545                         ti,timer-pwm;
 546                         ti,timer-dsp;
 547                 };
 548
 549                 timer9: timer@49040000 {
 550                         compatible = "ti,omap3430-timer";
 551                         reg = <0x49040000 0x400>;
 552                         interrupts = <45>;
 553                         ti,hwmods = "timer9";
 554                         ti,timer-pwm;
 555                 };
 556
 557                 timer10: timer@48086000 {
 558                         compatible = "ti,omap3430-timer";
 559                         reg = <0x48086000 0x400>;
 560                         interrupts = <46>;
 561                         ti,hwmods = "timer10";
 562                         ti,timer-pwm;
 563                 };
 564
 565                 timer11: timer@48088000 {
 566                         compatible = "ti,omap3430-timer";
 567                         reg = <0x48088000 0x400>;
 568                         interrupts = <47>;
 569                         ti,hwmods = "timer11";
 570                         ti,timer-pwm;
 571                 };
 572
 573                 timer12: timer@48304000 {
 574                         compatible = "ti,omap3430-timer";
 575                         reg = <0x48304000 0x400>;
 576                         interrupts = <95>;
 577                         ti,hwmods = "timer12";
 578                         ti,timer-alwon;
 579                         ti,timer-secure;
 580                 };
 581
 582                 usbhstll: usbhstll@48062000 {
 583                         compatible = "ti,usbhs-tll";
 584                         reg = <0x48062000 0x1000>;
 585                         interrupts = <78>;
 586                         ti,hwmods = "usb_tll_hs";
 587                 };
 588
 589                 usbhshost: usbhshost@48064000 {
 590                         compatible = "ti,usbhs-host";
 591                         reg = <0x48064000 0x400>;
 592                         ti,hwmods = "usb_host_hs";
 593                         #address-cells = <1>;
 594                         #size-cells = <1>;
 595                         ranges;
 596
 597                         usbhsohci: ohci@48064400 {
 598                                 compatible = "ti,ohci-omap3", "usb-ohci";
 599                                 reg = <0x48064400 0x400>;
 600                                 interrupt-parent = <&intc>;
 601                                 interrupts = <76>;
 602                         };
 603
 604                         usbhsehci: ehci@48064800 {
 605                                 compatible = "ti,ehci-omap", "usb-ehci";
 606                                 reg = <0x48064800 0x400>;
 607                                 interrupt-parent = <&intc>;
 608                                 interrupts = <77>;
 609                         };
 610                 };
 611
 612                 gpmc: gpmc@6e000000 {
 613                         compatible = "ti,omap3430-gpmc";
 614                         ti,hwmods = "gpmc";
 615                         reg = <0x6e000000 0x02d0>;
 616                         interrupts = <20>;
 617                         gpmc,num-cs = <8>;
 618                         gpmc,num-waitpins = <4>;
 619                         #address-cells = <2>;
 620                         #size-cells = <1>;
 621                 };
 622
 623                 usb_otg_hs: usb_otg_hs@480ab000 {
 624                         compatible = "ti,omap3-musb";
 625                         reg = <0x480ab000 0x1000>;
 626                         interrupts = <92>, <93>;
 627                         interrupt-names = "mc", "dma";
 628                         ti,hwmods = "usb_otg_hs";
 629                         multipoint = <1>;
 630                         num-eps = <16>;
 631                         ram-bits = <12>;
 632                 };
 633         };
 634 };