arch/arm/boot/dts/omap3-igep0020.dts

   1 /*
   2  * Device Tree Source for IGEPv2 board
   3  *
   4  * Copyright (C) 2012 Javier Martinez Canillas <javier@collabora.co.uk>
   5  * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include "omap3-igep.dtsi"
  13 #include "omap-gpmc-smsc911x.dtsi"
  14
  15 / {
  16         model = "IGEPv2";
  17         compatible = "isee,omap3-igep0020", "ti,omap3";
  18
  19         leds {
  20                 pinctrl-names = "default";
  21                 pinctrl-0 = <&leds_pins>;
  22                 compatible = "gpio-leds";
  23
  24                 boot {
  25                          label = "omap3:green:boot";
  26                          gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
  27                          default-state = "on";
  28                 };
  29
  30                 user0 {
  31                          label = "omap3:red:user0";
  32                          gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
  33                          default-state = "off";
  34                 };
  35
  36                 user1 {
  37                          label = "omap3:red:user1";
  38                          gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
  39                          default-state = "off";
  40                 };
  41
  42                 user2 {
  43                         label = "omap3:green:user1";
  44                         gpios = <&twl_gpio 19 GPIO_ACTIVE_LOW>;
  45                 };
  46         };
  47
  48        /* HS USB Port 1 Power */
  49        hsusb1_power: hsusb1_power_reg {
  50                compatible = "regulator-fixed";
  51                regulator-name = "hsusb1_vbus";
  52                regulator-min-microvolt = <3300000>;
  53                regulator-max-microvolt = <3300000>;
  54                gpio = <&twl_gpio 18 GPIO_ACTIVE_LOW>;   /* GPIO LEDA */
  55                startup-delay-us = <70000>;
  56        };
  57
  58         /* HS USB Host PHY on PORT 1 */
  59         hsusb1_phy: hsusb1_phy {
  60                 compatible = "usb-nop-xceiv";
  61                 reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */
  62                 vcc-supply = <&hsusb1_power>;
  63         };
  64 };
  65
  66 &omap3_pmx_core {
  67         pinctrl-names = "default";
  68         pinctrl-0 = <
  69                 &hsusbb1_pins
  70         >;
  71
  72         hsusbb1_pins: pinmux_hsusbb1_pins {
  73                 pinctrl-single,pins = <
  74                         0x5aa (PIN_OUTPUT | MUX_MODE3)          /* etk_ctl.hsusb1_clk */
  75                         0x5a8 (PIN_OUTPUT | MUX_MODE3)          /* etk_clk.hsusb1_stp */
  76                         0x5bc (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d8.hsusb1_dir */
  77                         0x5be (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d9.hsusb1_nxt */
  78                         0x5ac (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d0.hsusb1_data0 */
  79                         0x5ae (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d1.hsusb1_data1 */
  80                         0x5b0 (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d2.hsusb1_data2 */
  81                         0x5b2 (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d3.hsusb1_data7 */
  82                         0x5b4 (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d4.hsusb1_data4 */
  83                         0x5b6 (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d5.hsusb1_data5 */
  84                         0x5b8 (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d6.hsusb1_data6 */
  85                         0x5ba (PIN_INPUT_PULLDOWN | MUX_MODE3)  /* etk_d7.hsusb1_data3 */
  86                 >;
  87         };
  88 };
  89
  90 &leds_pins {
  91         pinctrl-single,pins = <
  92                 0x5c4 (PIN_OUTPUT | MUX_MODE4) /* etk_d12.gpio_26 */
  93                 0x5c6 (PIN_OUTPUT | MUX_MODE4) /* etk_d13.gpio_27 */
  94                 0x5c8 (PIN_OUTPUT | MUX_MODE4) /* etk_d14.gpio_28 */
  95         >;
  96 };
  97
  98 &i2c3 {
  99         clock-frequency = <100000>;
 100
 101         /*
 102          * Display monitor features are burnt in the EEPROM
 103          * as EDID data.
 104          */
 105         eeprom@50 {
 106                 compatible = "ti,eeprom";
 107                 reg = <0x50>;
 108         };
 109 };
 110
 111 &gpmc {
 112         ranges = <0 0 0x00000000 0x20000000>,
 113                  <5 0 0x2c000000 0x01000000>;
 114
 115         nand@0,0 {
 116                 linux,mtd-name= "micron,mt29c4g96maz";
 117                 reg = <0 0 0>;
 118                 nand-bus-width = <16>;
 119                 ti,nand-ecc-opt = "bch8";
 120
 121                 gpmc,sync-clk-ps = <0>;
 122                 gpmc,cs-on-ns = <0>;
 123                 gpmc,cs-rd-off-ns = <44>;
 124                 gpmc,cs-wr-off-ns = <44>;
 125                 gpmc,adv-on-ns = <6>;
 126                 gpmc,adv-rd-off-ns = <34>;
 127                 gpmc,adv-wr-off-ns = <44>;
 128                 gpmc,we-off-ns = <40>;
 129                 gpmc,oe-off-ns = <54>;
 130                 gpmc,access-ns = <64>;
 131                 gpmc,rd-cycle-ns = <82>;
 132                 gpmc,wr-cycle-ns = <82>;
 133                 gpmc,wr-access-ns = <40>;
 134                 gpmc,wr-data-mux-bus-ns = <0>;
 135
 136                 #address-cells = <1>;
 137                 #size-cells = <1>;
 138
 139                 partition@0 {
 140                         label = "SPL";
 141                         reg = <0 0x100000>;
 142                 };
 143                 partition@80000 {
 144                         label = "U-Boot";
 145                         reg = <0x100000 0x180000>;
 146                 };
 147                 partition@1c0000 {
 148                         label = "Environment";
 149                         reg = <0x280000 0x100000>;
 150                 };
 151                 partition@280000 {
 152                         label = "Kernel";
 153                         reg = <0x380000 0x300000>;
 154                 };
 155                 partition@780000 {
 156                         label = "Filesystem";
 157                         reg = <0x680000 0x1f980000>;
 158                 };
 159         };
 160
 161         ethernet@gpmc {
 162                 pinctrl-names = "default";
 163                 pinctrl-0 = <&smsc911x_pins>;
 164                 reg = <5 0 0xff>;
 165                 interrupt-parent = <&gpio6>;
 166                 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
 167         };
 168 };
 169
 170 &usbhshost {
 171         port1-mode = "ehci-phy";
 172 };
 173
 174 &usbhsehci {
 175         phys = <&hsusb1_phy>;
 176 };