arch/arm/boot/dts/exynos4.dtsi

   1 /*
   2  * Samsung's Exynos4 SoC series common device tree source
   3  *
   4  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  * Copyright (c) 2010-2011 Linaro Ltd.
   7  *              www.linaro.org
   8  *
   9  * Samsung's Exynos4 SoC series device nodes are listed in this file.  Particular
  10  * SoCs from Exynos4 series can include this file and provide values for SoCs
  11  * specfic bindings.
  12  *
  13  * Note: This file does not include device nodes for all the controllers in
  14  * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
  15  * nodes can be added to this file.
  16  *
  17  * This program is free software; you can redistribute it and/or modify
  18  * it under the terms of the GNU General Public License version 2 as
  19  * published by the Free Software Foundation.
  20  */
  21
  22 #include <dt-bindings/clock/exynos4.h>
  23 #include <dt-bindings/clock/exynos-audss-clk.h>
  24 #include "skeleton.dtsi"
  25
  26 / {
  27         interrupt-parent = <&gic>;
  28
  29         aliases {
  30                 spi0 = &spi_0;
  31                 spi1 = &spi_1;
  32                 spi2 = &spi_2;
  33                 i2c0 = &i2c_0;
  34                 i2c1 = &i2c_1;
  35                 i2c2 = &i2c_2;
  36                 i2c3 = &i2c_3;
  37                 i2c4 = &i2c_4;
  38                 i2c5 = &i2c_5;
  39                 i2c6 = &i2c_6;
  40                 i2c7 = &i2c_7;
  41                 csis0 = &csis_0;
  42                 csis1 = &csis_1;
  43                 fimc0 = &fimc_0;
  44                 fimc1 = &fimc_1;
  45                 fimc2 = &fimc_2;
  46                 fimc3 = &fimc_3;
  47                 serial0 = &serial_0;
  48                 serial1 = &serial_1;
  49                 serial2 = &serial_2;
  50                 serial3 = &serial_3;
  51         };
  52
  53         clock_audss: clock-controller@03810000 {
  54                 compatible = "samsung,exynos4210-audss-clock";
  55                 reg = <0x03810000 0x0C>;
  56                 #clock-cells = <1>;
  57         };
  58
  59         i2s0: i2s@03830000 {
  60                 compatible = "samsung,s5pv210-i2s";
  61                 reg = <0x03830000 0x100>;
  62                 clocks = <&clock_audss EXYNOS_I2S_BUS>;
  63                 clock-names = "iis";
  64                 dmas = <&pdma0 12>, <&pdma0 11>, <&pdma0 10>;
  65                 dma-names = "tx", "rx", "tx-sec";
  66                 samsung,idma-addr = <0x03000000>;
  67                 status = "disabled";
  68         };
  69
  70         chipid@10000000 {
  71                 compatible = "samsung,exynos4210-chipid";
  72                 reg = <0x10000000 0x100>;
  73         };
  74
  75         mipi_phy: video-phy@10020710 {
  76                 compatible = "samsung,s5pv210-mipi-video-phy";
  77                 reg = <0x10020710 8>;
  78                 #phy-cells = <1>;
  79         };
  80
  81         pd_mfc: mfc-power-domain@10023C40 {
  82                 compatible = "samsung,exynos4210-pd";
  83                 reg = <0x10023C40 0x20>;
  84         };
  85
  86         pd_g3d: g3d-power-domain@10023C60 {
  87                 compatible = "samsung,exynos4210-pd";
  88                 reg = <0x10023C60 0x20>;
  89         };
  90
  91         pd_lcd0: lcd0-power-domain@10023C80 {
  92                 compatible = "samsung,exynos4210-pd";
  93                 reg = <0x10023C80 0x20>;
  94         };
  95
  96         pd_tv: tv-power-domain@10023C20 {
  97                 compatible = "samsung,exynos4210-pd";
  98                 reg = <0x10023C20 0x20>;
  99         };
 100
 101         pd_cam: cam-power-domain@10023C00 {
 102                 compatible = "samsung,exynos4210-pd";
 103                 reg = <0x10023C00 0x20>;
 104         };
 105
 106         pd_gps: gps-power-domain@10023CE0 {
 107                 compatible = "samsung,exynos4210-pd";
 108                 reg = <0x10023CE0 0x20>;
 109         };
 110
 111         pd_gps_alive: gps-alive-power-domain@10023D00 {
 112                 compatible = "samsung,exynos4210-pd";
 113                 reg = <0x10023D00 0x20>;
 114         };
 115
 116         gic: interrupt-controller@10490000 {
 117                 compatible = "arm,cortex-a9-gic";
 118                 #interrupt-cells = <3>;
 119                 interrupt-controller;
 120                 reg = <0x10490000 0x10000>, <0x10480000 0x10000>;
 121         };
 122
 123         combiner: interrupt-controller@10440000 {
 124                 compatible = "samsung,exynos4210-combiner";
 125                 #interrupt-cells = <2>;
 126                 interrupt-controller;
 127                 reg = <0x10440000 0x1000>;
 128         };
 129
 130         pmu {
 131                 compatible = "arm,cortex-a9-pmu";
 132                 interrupt-parent = <&combiner>;
 133                 interrupts = <2 2>, <3 2>;
 134         };
 135
 136         sys_reg: syscon@10010000 {
 137                 compatible = "samsung,exynos4-sysreg", "syscon";
 138                 reg = <0x10010000 0x400>;
 139         };
 140
 141         pmu_system_controller: system-controller@10020000 {
 142                 compatible = "samsung,exynos4210-pmu", "syscon";
 143                 reg = <0x10020000 0x4000>;
 144         };
 145
 146         dsi_0: dsi@11C80000 {
 147                 compatible = "samsung,exynos4210-mipi-dsi";
 148                 reg = <0x11C80000 0x10000>;
 149                 interrupts = <0 79 0>;
 150                 samsung,power-domain = <&pd_lcd0>;
 151                 phys = <&mipi_phy 1>;
 152                 phy-names = "dsim";
 153                 clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
 154                 clock-names = "bus_clk", "pll_clk";
 155                 status = "disabled";
 156                 #address-cells = <1>;
 157                 #size-cells = <0>;
 158         };
 159
 160         camera {
 161                 compatible = "samsung,fimc", "simple-bus";
 162                 status = "disabled";
 163                 #address-cells = <1>;
 164                 #size-cells = <1>;
 165                 #clock-cells = <1>;
 166                 clock-output-names = "cam_a_clkout", "cam_b_clkout";
 167                 ranges;
 168
 169                 fimc_0: fimc@11800000 {
 170                         compatible = "samsung,exynos4210-fimc";
 171                         reg = <0x11800000 0x1000>;
 172                         interrupts = <0 84 0>;
 173                         clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
 174                         clock-names = "fimc", "sclk_fimc";
 175                         samsung,power-domain = <&pd_cam>;
 176                         samsung,sysreg = <&sys_reg>;
 177                         status = "disabled";
 178                 };
 179
 180                 fimc_1: fimc@11810000 {
 181                         compatible = "samsung,exynos4210-fimc";
 182                         reg = <0x11810000 0x1000>;
 183                         interrupts = <0 85 0>;
 184                         clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
 185                         clock-names = "fimc", "sclk_fimc";
 186                         samsung,power-domain = <&pd_cam>;
 187                         samsung,sysreg = <&sys_reg>;
 188                         status = "disabled";
 189                 };
 190
 191                 fimc_2: fimc@11820000 {
 192                         compatible = "samsung,exynos4210-fimc";
 193                         reg = <0x11820000 0x1000>;
 194                         interrupts = <0 86 0>;
 195                         clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
 196                         clock-names = "fimc", "sclk_fimc";
 197                         samsung,power-domain = <&pd_cam>;
 198                         samsung,sysreg = <&sys_reg>;
 199                         status = "disabled";
 200                 };
 201
 202                 fimc_3: fimc@11830000 {
 203                         compatible = "samsung,exynos4210-fimc";
 204                         reg = <0x11830000 0x1000>;
 205                         interrupts = <0 87 0>;
 206                         clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
 207                         clock-names = "fimc", "sclk_fimc";
 208                         samsung,power-domain = <&pd_cam>;
 209                         samsung,sysreg = <&sys_reg>;
 210                         status = "disabled";
 211                 };
 212
 213                 csis_0: csis@11880000 {
 214                         compatible = "samsung,exynos4210-csis";
 215                         reg = <0x11880000 0x4000>;
 216                         interrupts = <0 78 0>;
 217                         clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
 218                         clock-names = "csis", "sclk_csis";
 219                         bus-width = <4>;
 220                         samsung,power-domain = <&pd_cam>;
 221                         phys = <&mipi_phy 0>;
 222                         phy-names = "csis";
 223                         status = "disabled";
 224                         #address-cells = <1>;
 225                         #size-cells = <0>;
 226                 };
 227
 228                 csis_1: csis@11890000 {
 229                         compatible = "samsung,exynos4210-csis";
 230                         reg = <0x11890000 0x4000>;
 231                         interrupts = <0 80 0>;
 232                         clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
 233                         clock-names = "csis", "sclk_csis";
 234                         bus-width = <2>;
 235                         samsung,power-domain = <&pd_cam>;
 236                         phys = <&mipi_phy 2>;
 237                         phy-names = "csis";
 238                         status = "disabled";
 239                         #address-cells = <1>;
 240                         #size-cells = <0>;
 241                 };
 242         };
 243
 244         watchdog@10060000 {
 245                 compatible = "samsung,s3c2410-wdt";
 246                 reg = <0x10060000 0x100>;
 247                 interrupts = <0 43 0>;
 248                 clocks = <&clock CLK_WDT>;
 249                 clock-names = "watchdog";
 250                 status = "disabled";
 251         };
 252
 253         rtc@10070000 {
 254                 compatible = "samsung,s3c6410-rtc";
 255                 reg = <0x10070000 0x100>;
 256                 interrupts = <0 44 0>, <0 45 0>;
 257                 clocks = <&clock CLK_RTC>;
 258                 clock-names = "rtc";
 259                 status = "disabled";
 260         };
 261
 262         keypad@100A0000 {
 263                 compatible = "samsung,s5pv210-keypad";
 264                 reg = <0x100A0000 0x100>;
 265                 interrupts = <0 109 0>;
 266                 clocks = <&clock CLK_KEYIF>;
 267                 clock-names = "keypad";
 268                 status = "disabled";
 269         };
 270
 271         sdhci@12510000 {
 272                 compatible = "samsung,exynos4210-sdhci";
 273                 reg = <0x12510000 0x100>;
 274                 interrupts = <0 73 0>;
 275                 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
 276                 clock-names = "hsmmc", "mmc_busclk.2";
 277                 status = "disabled";
 278         };
 279
 280         sdhci@12520000 {
 281                 compatible = "samsung,exynos4210-sdhci";
 282                 reg = <0x12520000 0x100>;
 283                 interrupts = <0 74 0>;
 284                 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
 285                 clock-names = "hsmmc", "mmc_busclk.2";
 286                 status = "disabled";
 287         };
 288
 289         sdhci@12530000 {
 290                 compatible = "samsung,exynos4210-sdhci";
 291                 reg = <0x12530000 0x100>;
 292                 interrupts = <0 75 0>;
 293                 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
 294                 clock-names = "hsmmc", "mmc_busclk.2";
 295                 status = "disabled";
 296         };
 297
 298         sdhci@12540000 {
 299                 compatible = "samsung,exynos4210-sdhci";
 300                 reg = <0x12540000 0x100>;
 301                 interrupts = <0 76 0>;
 302                 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
 303                 clock-names = "hsmmc", "mmc_busclk.2";
 304                 status = "disabled";
 305         };
 306
 307         exynos_usbphy: exynos-usbphy@125B0000 {
 308                 compatible = "samsung,exynos4210-usb2-phy";
 309                 reg = <0x125B0000 0x100>;
 310                 samsung,pmureg-phandle = <&pmu_system_controller>;
 311                 clocks = <&clock CLK_USB_DEVICE>, <&clock CLK_XUSBXTI>;
 312                 clock-names = "phy", "ref";
 313                 #phy-cells = <1>;
 314                 status = "disabled";
 315         };
 316
 317         hsotg@12480000 {
 318                 compatible = "samsung,s3c6400-hsotg";
 319                 reg = <0x12480000 0x20000>;
 320                 interrupts = <0 71 0>;
 321                 clocks = <&clock CLK_USB_DEVICE>;
 322                 clock-names = "otg";
 323                 phys = <&exynos_usbphy 0>;
 324                 phy-names = "usb2-phy";
 325                 status = "disabled";
 326         };
 327
 328         ehci@12580000 {
 329                 compatible = "samsung,exynos4210-ehci";
 330                 reg = <0x12580000 0x100>;
 331                 interrupts = <0 70 0>;
 332                 clocks = <&clock CLK_USB_HOST>;
 333                 clock-names = "usbhost";
 334                 status = "disabled";
 335                 #address-cells = <1>;
 336                 #size-cells = <0>;
 337                 port@0 {
 338                     reg = <0>;
 339                     phys = <&exynos_usbphy 1>;
 340                     status = "disabled";
 341                 };
 342                 port@1 {
 343                     reg = <1>;
 344                     phys = <&exynos_usbphy 2>;
 345                     status = "disabled";
 346                 };
 347                 port@2 {
 348                     reg = <2>;
 349                     phys = <&exynos_usbphy 3>;
 350                     status = "disabled";
 351                 };
 352         };
 353
 354         ohci@12590000 {
 355                 compatible = "samsung,exynos4210-ohci";
 356                 reg = <0x12590000 0x100>;
 357                 interrupts = <0 70 0>;
 358                 clocks = <&clock CLK_USB_HOST>;
 359                 clock-names = "usbhost";
 360                 status = "disabled";
 361                 #address-cells = <1>;
 362                 #size-cells = <0>;
 363                 port@0 {
 364                     reg = <0>;
 365                     phys = <&exynos_usbphy 1>;
 366                     status = "disabled";
 367                 };
 368         };
 369
 370         i2s1: i2s@13960000 {
 371                 compatible = "samsung,s3c6410-i2s";
 372                 reg = <0x13960000 0x100>;
 373                 clocks = <&clock CLK_I2S1>;
 374                 clock-names = "iis";
 375                 dmas = <&pdma1 12>, <&pdma1 11>;
 376                 dma-names = "tx", "rx";
 377                 status = "disabled";
 378         };
 379
 380         i2s2: i2s@13970000 {
 381                 compatible = "samsung,s3c6410-i2s";
 382                 reg = <0x13970000 0x100>;
 383                 clocks = <&clock CLK_I2S2>;
 384                 clock-names = "iis";
 385                 dmas = <&pdma0 14>, <&pdma0 13>;
 386                 dma-names = "tx", "rx";
 387                 status = "disabled";
 388         };
 389
 390         mfc: codec@13400000 {
 391                 compatible = "samsung,mfc-v5";
 392                 reg = <0x13400000 0x10000>;
 393                 interrupts = <0 94 0>;
 394                 samsung,power-domain = <&pd_mfc>;
 395                 clocks = <&clock CLK_MFC>, <&clock CLK_SCLK_MFC>;
 396                 clock-names = "mfc", "sclk_mfc";
 397                 status = "disabled";
 398         };
 399
 400         serial_0: serial@13800000 {
 401                 compatible = "samsung,exynos4210-uart";
 402                 reg = <0x13800000 0x100>;
 403                 interrupts = <0 52 0>;
 404                 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
 405                 clock-names = "uart", "clk_uart_baud0";
 406                 status = "disabled";
 407         };
 408
 409         serial_1: serial@13810000 {
 410                 compatible = "samsung,exynos4210-uart";
 411                 reg = <0x13810000 0x100>;
 412                 interrupts = <0 53 0>;
 413                 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
 414                 clock-names = "uart", "clk_uart_baud0";
 415                 status = "disabled";
 416         };
 417
 418         serial_2: serial@13820000 {
 419                 compatible = "samsung,exynos4210-uart";
 420                 reg = <0x13820000 0x100>;
 421                 interrupts = <0 54 0>;
 422                 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
 423                 clock-names = "uart", "clk_uart_baud0";
 424                 status = "disabled";
 425         };
 426
 427         serial_3: serial@13830000 {
 428                 compatible = "samsung,exynos4210-uart";
 429                 reg = <0x13830000 0x100>;
 430                 interrupts = <0 55 0>;
 431                 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
 432                 clock-names = "uart", "clk_uart_baud0";
 433                 status = "disabled";
 434         };
 435
 436         i2c_0: i2c@13860000 {
 437                 #address-cells = <1>;
 438                 #size-cells = <0>;
 439                 compatible = "samsung,s3c2440-i2c";
 440                 reg = <0x13860000 0x100>;
 441                 interrupts = <0 58 0>;
 442                 clocks = <&clock CLK_I2C0>;
 443                 clock-names = "i2c";
 444                 pinctrl-names = "default";
 445                 pinctrl-0 = <&i2c0_bus>;
 446                 status = "disabled";
 447         };
 448
 449         i2c_1: i2c@13870000 {
 450                 #address-cells = <1>;
 451                 #size-cells = <0>;
 452                 compatible = "samsung,s3c2440-i2c";
 453                 reg = <0x13870000 0x100>;
 454                 interrupts = <0 59 0>;
 455                 clocks = <&clock CLK_I2C1>;
 456                 clock-names = "i2c";
 457                 pinctrl-names = "default";
 458                 pinctrl-0 = <&i2c1_bus>;
 459                 status = "disabled";
 460         };
 461
 462         i2c_2: i2c@13880000 {
 463                 #address-cells = <1>;
 464                 #size-cells = <0>;
 465                 compatible = "samsung,s3c2440-i2c";
 466                 reg = <0x13880000 0x100>;
 467                 interrupts = <0 60 0>;
 468                 clocks = <&clock CLK_I2C2>;
 469                 clock-names = "i2c";
 470                 pinctrl-names = "default";
 471                 pinctrl-0 = <&i2c2_bus>;
 472                 status = "disabled";
 473         };
 474
 475         i2c_3: i2c@13890000 {
 476                 #address-cells = <1>;
 477                 #size-cells = <0>;
 478                 compatible = "samsung,s3c2440-i2c";
 479                 reg = <0x13890000 0x100>;
 480                 interrupts = <0 61 0>;
 481                 clocks = <&clock CLK_I2C3>;
 482                 clock-names = "i2c";
 483                 pinctrl-names = "default";
 484                 pinctrl-0 = <&i2c3_bus>;
 485                 status = "disabled";
 486         };
 487
 488         i2c_4: i2c@138A0000 {
 489                 #address-cells = <1>;
 490                 #size-cells = <0>;
 491                 compatible = "samsung,s3c2440-i2c";
 492                 reg = <0x138A0000 0x100>;
 493                 interrupts = <0 62 0>;
 494                 clocks = <&clock CLK_I2C4>;
 495                 clock-names = "i2c";
 496                 pinctrl-names = "default";
 497                 pinctrl-0 = <&i2c4_bus>;
 498                 status = "disabled";
 499         };
 500
 501         i2c_5: i2c@138B0000 {
 502                 #address-cells = <1>;
 503                 #size-cells = <0>;
 504                 compatible = "samsung,s3c2440-i2c";
 505                 reg = <0x138B0000 0x100>;
 506                 interrupts = <0 63 0>;
 507                 clocks = <&clock CLK_I2C5>;
 508                 clock-names = "i2c";
 509                 pinctrl-names = "default";
 510                 pinctrl-0 = <&i2c5_bus>;
 511                 status = "disabled";
 512         };
 513
 514         i2c_6: i2c@138C0000 {
 515                 #address-cells = <1>;
 516                 #size-cells = <0>;
 517                 compatible = "samsung,s3c2440-i2c";
 518                 reg = <0x138C0000 0x100>;
 519                 interrupts = <0 64 0>;
 520                 clocks = <&clock CLK_I2C6>;
 521                 clock-names = "i2c";
 522                 pinctrl-names = "default";
 523                 pinctrl-0 = <&i2c6_bus>;
 524                 status = "disabled";
 525         };
 526
 527         i2c_7: i2c@138D0000 {
 528                 #address-cells = <1>;
 529                 #size-cells = <0>;
 530                 compatible = "samsung,s3c2440-i2c";
 531                 reg = <0x138D0000 0x100>;
 532                 interrupts = <0 65 0>;
 533                 clocks = <&clock CLK_I2C7>;
 534                 clock-names = "i2c";
 535                 pinctrl-names = "default";
 536                 pinctrl-0 = <&i2c7_bus>;
 537                 status = "disabled";
 538         };
 539
 540         spi_0: spi@13920000 {
 541                 compatible = "samsung,exynos4210-spi";
 542                 reg = <0x13920000 0x100>;
 543                 interrupts = <0 66 0>;
 544                 dmas = <&pdma0 7>, <&pdma0 6>;
 545                 dma-names = "tx", "rx";
 546                 #address-cells = <1>;
 547                 #size-cells = <0>;
 548                 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
 549                 clock-names = "spi", "spi_busclk0";
 550                 pinctrl-names = "default";
 551                 pinctrl-0 = <&spi0_bus>;
 552                 status = "disabled";
 553         };
 554
 555         spi_1: spi@13930000 {
 556                 compatible = "samsung,exynos4210-spi";
 557                 reg = <0x13930000 0x100>;
 558                 interrupts = <0 67 0>;
 559                 dmas = <&pdma1 7>, <&pdma1 6>;
 560                 dma-names = "tx", "rx";
 561                 #address-cells = <1>;
 562                 #size-cells = <0>;
 563                 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
 564                 clock-names = "spi", "spi_busclk0";
 565                 pinctrl-names = "default";
 566                 pinctrl-0 = <&spi1_bus>;
 567                 status = "disabled";
 568         };
 569
 570         spi_2: spi@13940000 {
 571                 compatible = "samsung,exynos4210-spi";
 572                 reg = <0x13940000 0x100>;
 573                 interrupts = <0 68 0>;
 574                 dmas = <&pdma0 9>, <&pdma0 8>;
 575                 dma-names = "tx", "rx";
 576                 #address-cells = <1>;
 577                 #size-cells = <0>;
 578                 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
 579                 clock-names = "spi", "spi_busclk0";
 580                 pinctrl-names = "default";
 581                 pinctrl-0 = <&spi2_bus>;
 582                 status = "disabled";
 583         };
 584
 585         pwm@139D0000 {
 586                 compatible = "samsung,exynos4210-pwm";
 587                 reg = <0x139D0000 0x1000>;
 588                 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
 589                 clocks = <&clock CLK_PWM>;
 590                 clock-names = "timers";
 591                 #pwm-cells = <3>;
 592                 status = "disabled";
 593         };
 594
 595         amba {
 596                 #address-cells = <1>;
 597                 #size-cells = <1>;
 598                 compatible = "arm,amba-bus";
 599                 interrupt-parent = <&gic>;
 600                 ranges;
 601
 602                 pdma0: pdma@12680000 {
 603                         compatible = "arm,pl330", "arm,primecell";
 604                         reg = <0x12680000 0x1000>;
 605                         interrupts = <0 35 0>;
 606                         clocks = <&clock CLK_PDMA0>;
 607                         clock-names = "apb_pclk";
 608                         #dma-cells = <1>;
 609                         #dma-channels = <8>;
 610                         #dma-requests = <32>;
 611                 };
 612
 613                 pdma1: pdma@12690000 {
 614                         compatible = "arm,pl330", "arm,primecell";
 615                         reg = <0x12690000 0x1000>;
 616                         interrupts = <0 36 0>;
 617                         clocks = <&clock CLK_PDMA1>;
 618                         clock-names = "apb_pclk";
 619                         #dma-cells = <1>;
 620                         #dma-channels = <8>;
 621                         #dma-requests = <32>;
 622                 };
 623
 624                 mdma1: mdma@12850000 {
 625                         compatible = "arm,pl330", "arm,primecell";
 626                         reg = <0x12850000 0x1000>;
 627                         interrupts = <0 34 0>;
 628                         clocks = <&clock CLK_MDMA>;
 629                         clock-names = "apb_pclk";
 630                         #dma-cells = <1>;
 631                         #dma-channels = <8>;
 632                         #dma-requests = <1>;
 633                 };
 634         };
 635
 636         fimd: fimd@11c00000 {
 637                 compatible = "samsung,exynos4210-fimd";
 638                 interrupt-parent = <&combiner>;
 639                 reg = <0x11c00000 0x20000>;
 640                 interrupt-names = "fifo", "vsync", "lcd_sys";
 641                 interrupts = <11 0>, <11 1>, <11 2>;
 642                 clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
 643                 clock-names = "sclk_fimd", "fimd";
 644                 samsung,power-domain = <&pd_lcd0>;
 645                 samsung,sysreg = <&sys_reg>;
 646                 status = "disabled";
 647         };
 648 };