arch/arm/boot/dts/ecx-common.dtsi

   1 /*
   2  * Copyright 2011-2012 Calxeda, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16
  17 / {
  18         chosen {
  19                 bootargs = "console=ttyAMA0";
  20         };
  21
  22         psci {
  23                 compatible      = "arm,psci";
  24                 method          = "smc";
  25                 cpu_suspend     = <0x84000002>;
  26                 cpu_off         = <0x84000004>;
  27                 cpu_on          = <0x84000006>;
  28         };
  29
  30         soc {
  31                 #address-cells = <1>;
  32                 #size-cells = <1>;
  33                 compatible = "simple-bus";
  34                 interrupt-parent = <&intc>;
  35
  36                 sata@ffe08000 {
  37                         compatible = "calxeda,hb-ahci";
  38                         reg = <0xffe08000 0x10000>;
  39                         interrupts = <0 83 4>;
  40                         dma-coherent;
  41                         calxeda,port-phys = <&combophy5 0 &combophy0 0
  42                                              &combophy0 1 &combophy0 2
  43                                              &combophy0 3>;
  44                         calxeda,sgpio-gpio =<&gpioh 5 1 &gpioh 6 1 &gpioh 7 1>;
  45                         calxeda,led-order = <4 0 1 2 3>;
  46                 };
  47
  48                 sdhci@ffe0e000 {
  49                         compatible = "calxeda,hb-sdhci";
  50                         reg = <0xffe0e000 0x1000>;
  51                         interrupts = <0 90 4>;
  52                         clocks = <&eclk>;
  53                         status = "disabled";
  54                 };
  55
  56                 ipc@fff20000 {
  57                         compatible = "arm,pl320", "arm,primecell";
  58                         reg = <0xfff20000 0x1000>;
  59                         interrupts = <0 7 4>;
  60                         clocks = <&pclk>;
  61                         clock-names = "apb_pclk";
  62                 };
  63
  64                 gpioe: gpio@fff30000 {
  65                         #gpio-cells = <2>;
  66                         compatible = "arm,pl061", "arm,primecell";
  67                         gpio-controller;
  68                         reg = <0xfff30000 0x1000>;
  69                         interrupts = <0 14 4>;
  70                         clocks = <&pclk>;
  71                         clock-names = "apb_pclk";
  72                         status = "disabled";
  73                 };
  74
  75                 gpiof: gpio@fff31000 {
  76                         #gpio-cells = <2>;
  77                         compatible = "arm,pl061", "arm,primecell";
  78                         gpio-controller;
  79                         reg = <0xfff31000 0x1000>;
  80                         interrupts = <0 15 4>;
  81                         clocks = <&pclk>;
  82                         clock-names = "apb_pclk";
  83                         status = "disabled";
  84                 };
  85
  86                 gpiog: gpio@fff32000 {
  87                         #gpio-cells = <2>;
  88                         compatible = "arm,pl061", "arm,primecell";
  89                         gpio-controller;
  90                         reg = <0xfff32000 0x1000>;
  91                         interrupts = <0 16 4>;
  92                         clocks = <&pclk>;
  93                         clock-names = "apb_pclk";
  94                         status = "disabled";
  95                 };
  96
  97                 gpioh: gpio@fff33000 {
  98                         #gpio-cells = <2>;
  99                         compatible = "arm,pl061", "arm,primecell";
 100                         gpio-controller;
 101                         reg = <0xfff33000 0x1000>;
 102                         interrupts = <0 17 4>;
 103                         clocks = <&pclk>;
 104                         clock-names = "apb_pclk";
 105                         status = "disabled";
 106                 };
 107
 108                 timer@fff34000 {
 109                         compatible = "arm,sp804", "arm,primecell";
 110                         reg = <0xfff34000 0x1000>;
 111                         interrupts = <0 18 4>;
 112                         clocks = <&pclk>;
 113                         clock-names = "apb_pclk";
 114                 };
 115
 116                 rtc@fff35000 {
 117                         compatible = "arm,pl031", "arm,primecell";
 118                         reg = <0xfff35000 0x1000>;
 119                         interrupts = <0 19 4>;
 120                         clocks = <&pclk>;
 121                         clock-names = "apb_pclk";
 122                 };
 123
 124                 serial@fff36000 {
 125                         compatible = "arm,pl011", "arm,primecell";
 126                         reg = <0xfff36000 0x1000>;
 127                         interrupts = <0 20 4>;
 128                         clocks = <&pclk>;
 129                         clock-names = "apb_pclk";
 130                 };
 131
 132                 smic@fff3a000 {
 133                         compatible = "ipmi-smic";
 134                         device_type = "ipmi";
 135                         reg = <0xfff3a000 0x1000>;
 136                         interrupts = <0 24 4>;
 137                         reg-size = <4>;
 138                         reg-spacing = <4>;
 139                 };
 140
 141                 sregs@fff3c000 {
 142                         compatible = "calxeda,hb-sregs";
 143                         reg = <0xfff3c000 0x1000>;
 144
 145                         clocks {
 146                                 #address-cells = <1>;
 147                                 #size-cells = <0>;
 148
 149                                 osc: oscillator {
 150                                         #clock-cells = <0>;
 151                                         compatible = "fixed-clock";
 152                                         clock-frequency = <33333000>;
 153                                 };
 154
 155                                 ddrpll: ddrpll {
 156                                         #clock-cells = <0>;
 157                                         compatible = "calxeda,hb-pll-clock";
 158                                         clocks = <&osc>;
 159                                         reg = <0x108>;
 160                                 };
 161
 162                                 a9pll: a9pll {
 163                                         #clock-cells = <0>;
 164                                         compatible = "calxeda,hb-pll-clock";
 165                                         clocks = <&osc>;
 166                                         reg = <0x100>;
 167                                 };
 168
 169                                 a9periphclk: a9periphclk {
 170                                         #clock-cells = <0>;
 171                                         compatible = "calxeda,hb-a9periph-clock";
 172                                         clocks = <&a9pll>;
 173                                         reg = <0x104>;
 174                                 };
 175
 176                                 a9bclk: a9bclk {
 177                                         #clock-cells = <0>;
 178                                         compatible = "calxeda,hb-a9bus-clock";
 179                                         clocks = <&a9pll>;
 180                                         reg = <0x104>;
 181                                 };
 182
 183                                 emmcpll: emmcpll {
 184                                         #clock-cells = <0>;
 185                                         compatible = "calxeda,hb-pll-clock";
 186                                         clocks = <&osc>;
 187                                         reg = <0x10C>;
 188                                 };
 189
 190                                 eclk: eclk {
 191                                         #clock-cells = <0>;
 192                                         compatible = "calxeda,hb-emmc-clock";
 193                                         clocks = <&emmcpll>;
 194                                         reg = <0x114>;
 195                                 };
 196
 197                                 pclk: pclk {
 198                                         #clock-cells = <0>;
 199                                         compatible = "fixed-clock";
 200                                         clock-frequency = <150000000>;
 201                                 };
 202                         };
 203                 };
 204
 205                 dma@fff3d000 {
 206                         compatible = "arm,pl330", "arm,primecell";
 207                         reg = <0xfff3d000 0x1000>;
 208                         interrupts = <0 92 4>;
 209                         clocks = <&pclk>;
 210                         clock-names = "apb_pclk";
 211                 };
 212
 213                 ethernet@fff50000 {
 214                         compatible = "calxeda,hb-xgmac";
 215                         reg = <0xfff50000 0x1000>;
 216                         interrupts = <0 77 4  0 78 4  0 79 4>;
 217                         dma-coherent;
 218                 };
 219
 220                 ethernet@fff51000 {
 221                         compatible = "calxeda,hb-xgmac";
 222                         reg = <0xfff51000 0x1000>;
 223                         interrupts = <0 80 4  0 81 4  0 82 4>;
 224                         dma-coherent;
 225                 };
 226
 227                 combophy0: combo-phy@fff58000 {
 228                         compatible = "calxeda,hb-combophy";
 229                         #phy-cells = <1>;
 230                         reg = <0xfff58000 0x1000>;
 231                         phydev = <5>;
 232                 };
 233
 234                 combophy5: combo-phy@fff5d000 {
 235                         compatible = "calxeda,hb-combophy";
 236                         #phy-cells = <1>;
 237                         reg = <0xfff5d000 0x1000>;
 238                         phydev = <31>;
 239                 };
 240         };
 241 };