arch/arm/boot/dts/bcm2835.dtsi

   1 /include/ "skeleton.dtsi"
   2
   3 / {
   4         compatible = "brcm,bcm2835";
   5         model = "BCM2835";
   6         interrupt-parent = <&intc>;
   7
   8         chosen {
   9                 bootargs = "earlyprintk console=ttyAMA0";
  10         };
  11
  12         soc {
  13                 compatible = "simple-bus";
  14                 #address-cells = <1>;
  15                 #size-cells = <1>;
  16                 ranges = <0x7e000000 0x20000000 0x02000000>;
  17
  18                 timer {
  19                         compatible = "brcm,bcm2835-system-timer";
  20                         reg = <0x7e003000 0x1000>;
  21                         interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
  22                         clock-frequency = <1000000>;
  23                 };
  24
  25                 intc: interrupt-controller {
  26                         compatible = "brcm,bcm2835-armctrl-ic";
  27                         reg = <0x7e00b200 0x200>;
  28                         interrupt-controller;
  29                         #interrupt-cells = <2>;
  30                 };
  31
  32                 watchdog {
  33                         compatible = "brcm,bcm2835-pm-wdt";
  34                         reg = <0x7e100000 0x28>;
  35                 };
  36
  37                 rng {
  38                         compatible = "brcm,bcm2835-rng";
  39                         reg = <0x7e104000 0x10>;
  40                 };
  41
  42                 uart@20201000 {
  43                         compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
  44                         reg = <0x7e201000 0x1000>;
  45                         interrupts = <2 25>;
  46                         clock-frequency = <3000000>;
  47                         arm,primecell-periphid = <0x00241011>;
  48                 };
  49
  50                 gpio: gpio {
  51                         compatible = "brcm,bcm2835-gpio";
  52                         reg = <0x7e200000 0xb4>;
  53                         /*
  54                          * The GPIO IP block is designed for 3 banks of GPIOs.
  55                          * Each bank has a GPIO interrupt for itself.
  56                          * There is an overall "any bank" interrupt.
  57                          * In order, these are GIC interrupts 17, 18, 19, 20.
  58                          * Since the BCM2835 only has 2 banks, the 2nd bank
  59                          * interrupt output appears to be mirrored onto the
  60                          * 3rd bank's interrupt signal.
  61                          * So, a bank0 interrupt shows up on 17, 20, and
  62                          * a bank1 interrupt shows up on 18, 19, 20!
  63                          */
  64                         interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
  65
  66                         gpio-controller;
  67                         #gpio-cells = <2>;
  68
  69                         interrupt-controller;
  70                         #interrupt-cells = <2>;
  71                 };
  72
  73                 spi: spi@20204000 {
  74                         compatible = "brcm,bcm2835-spi";
  75                         reg = <0x7e204000 0x1000>;
  76                         interrupts = <2 22>;
  77                         clocks = <&clk_spi>;
  78                         #address-cells = <1>;
  79                         #size-cells = <0>;
  80                         status = "disabled";
  81                 };
  82
  83                 i2c0: i2c@20205000 {
  84                         compatible = "brcm,bcm2835-i2c";
  85                         reg = <0x7e205000 0x1000>;
  86                         interrupts = <2 21>;
  87                         clocks = <&clk_i2c>;
  88                         #address-cells = <1>;
  89                         #size-cells = <0>;
  90                         status = "disabled";
  91                 };
  92
  93                 i2c1: i2c@20804000 {
  94                         compatible = "brcm,bcm2835-i2c";
  95                         reg = <0x7e804000 0x1000>;
  96                         interrupts = <2 21>;
  97                         clocks = <&clk_i2c>;
  98                         #address-cells = <1>;
  99                         #size-cells = <0>;
 100                         status = "disabled";
 101                 };
 102
 103                 sdhci: sdhci {
 104                         compatible = "brcm,bcm2835-sdhci";
 105                         reg = <0x7e300000 0x100>;
 106                         interrupts = <2 30>;
 107                         clocks = <&clk_mmc>;
 108                         status = "disabled";
 109                 };
 110         };
 111
 112         clocks {
 113                 compatible = "simple-bus";
 114                 #address-cells = <1>;
 115                 #size-cells = <0>;
 116
 117                 clk_mmc: mmc {
 118                         compatible = "fixed-clock";
 119                         reg = <0>;
 120                         #clock-cells = <0>;
 121                         clock-frequency = <100000000>;
 122                 };
 123
 124                 clk_i2c: i2c {
 125                         compatible = "fixed-clock";
 126                         reg = <1>;
 127                         #clock-cells = <0>;
 128                         clock-frequency = <250000000>;
 129                 };
 130
 131                 clk_spi: spi {
 132                         compatible = "fixed-clock";
 133                         reg = <2>;
 134                         #clock-cells = <0>;
 135                         clock-frequency = <250000000>;
 136                 };
 137         };
 138 };