arch/arm/boot/dts/bcm2835.dtsi

   1 #include <dt-bindings/pinctrl/bcm2835.h>
   2 #include "skeleton.dtsi"
   3
   4 / {
   5         compatible = "brcm,bcm2835";
   6         model = "BCM2835";
   7         interrupt-parent = <&intc>;
   8
   9         chosen {
  10                 bootargs = "earlyprintk console=ttyAMA0";
  11         };
  12
  13         soc {
  14                 compatible = "simple-bus";
  15                 #address-cells = <1>;
  16                 #size-cells = <1>;
  17                 ranges = <0x7e000000 0x20000000 0x02000000>;
  18                 dma-ranges = <0x40000000 0x00000000 0x20000000>;
  19
  20                 timer@7e003000 {
  21                         compatible = "brcm,bcm2835-system-timer";
  22                         reg = <0x7e003000 0x1000>;
  23                         interrupts = <1 0>, <1 1>, <1 2>, <1 3>;
  24                         clock-frequency = <1000000>;
  25                 };
  26
  27                 dma: dma@7e007000 {
  28                         compatible = "brcm,bcm2835-dma";
  29                         reg = <0x7e007000 0xf00>;
  30                         interrupts = <1 16>,
  31                                      <1 17>,
  32                                      <1 18>,
  33                                      <1 19>,
  34                                      <1 20>,
  35                                      <1 21>,
  36                                      <1 22>,
  37                                      <1 23>,
  38                                      <1 24>,
  39                                      <1 25>,
  40                                      <1 26>,
  41                                      <1 27>,
  42                                      <1 28>;
  43
  44                         #dma-cells = <1>;
  45                         brcm,dma-channel-mask = <0x7f35>;
  46                 };
  47
  48                 intc: interrupt-controller@7e00b200 {
  49                         compatible = "brcm,bcm2835-armctrl-ic";
  50                         reg = <0x7e00b200 0x200>;
  51                         interrupt-controller;
  52                         #interrupt-cells = <2>;
  53                 };
  54
  55                 watchdog@7e100000 {
  56                         compatible = "brcm,bcm2835-pm-wdt";
  57                         reg = <0x7e100000 0x28>;
  58                 };
  59
  60                 rng@7e104000 {
  61                         compatible = "brcm,bcm2835-rng";
  62                         reg = <0x7e104000 0x10>;
  63                 };
  64
  65                 mailbox: mailbox@7e00b800 {
  66                         compatible = "brcm,bcm2835-mbox";
  67                         reg = <0x7e00b880 0x40>;
  68                         interrupts = <0 1>;
  69                         #mbox-cells = <0>;
  70                 };
  71
  72                 gpio: gpio@7e200000 {
  73                         compatible = "brcm,bcm2835-gpio";
  74                         reg = <0x7e200000 0xb4>;
  75                         /*
  76                          * The GPIO IP block is designed for 3 banks of GPIOs.
  77                          * Each bank has a GPIO interrupt for itself.
  78                          * There is an overall "any bank" interrupt.
  79                          * In order, these are GIC interrupts 17, 18, 19, 20.
  80                          * Since the BCM2835 only has 2 banks, the 2nd bank
  81                          * interrupt output appears to be mirrored onto the
  82                          * 3rd bank's interrupt signal.
  83                          * So, a bank0 interrupt shows up on 17, 20, and
  84                          * a bank1 interrupt shows up on 18, 19, 20!
  85                          */
  86                         interrupts = <2 17>, <2 18>, <2 19>, <2 20>;
  87
  88                         gpio-controller;
  89                         #gpio-cells = <2>;
  90
  91                         interrupt-controller;
  92                         #interrupt-cells = <2>;
  93                 };
  94
  95                 uart@7e201000 {
  96                         compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
  97                         reg = <0x7e201000 0x1000>;
  98                         interrupts = <2 25>;
  99                         clock-frequency = <3000000>;
 100                         arm,primecell-periphid = <0x00241011>;
 101                 };
 102
 103                 i2s: i2s@7e203000 {
 104                         compatible = "brcm,bcm2835-i2s";
 105                         reg = <0x7e203000 0x20>,
 106                               <0x7e101098 0x02>;
 107
 108                         dmas = <&dma 2>,
 109                                <&dma 3>;
 110                         dma-names = "tx", "rx";
 111                         status = "disabled";
 112                 };
 113
 114                 spi: spi@7e204000 {
 115                         compatible = "brcm,bcm2835-spi";
 116                         reg = <0x7e204000 0x1000>;
 117                         interrupts = <2 22>;
 118                         clocks = <&clk_spi>;
 119                         #address-cells = <1>;
 120                         #size-cells = <0>;
 121                         status = "disabled";
 122                 };
 123
 124                 i2c0: i2c@7e205000 {
 125                         compatible = "brcm,bcm2835-i2c";
 126                         reg = <0x7e205000 0x1000>;
 127                         interrupts = <2 21>;
 128                         clocks = <&clk_i2c>;
 129                         #address-cells = <1>;
 130                         #size-cells = <0>;
 131                         status = "disabled";
 132                 };
 133
 134                 sdhci: sdhci@7e300000 {
 135                         compatible = "brcm,bcm2835-sdhci";
 136                         reg = <0x7e300000 0x100>;
 137                         interrupts = <2 30>;
 138                         clocks = <&clk_mmc>;
 139                         status = "disabled";
 140                 };
 141
 142                 i2c1: i2c@7e804000 {
 143                         compatible = "brcm,bcm2835-i2c";
 144                         reg = <0x7e804000 0x1000>;
 145                         interrupts = <2 21>;
 146                         clocks = <&clk_i2c>;
 147                         #address-cells = <1>;
 148                         #size-cells = <0>;
 149                         status = "disabled";
 150                 };
 151
 152                 usb@7e980000 {
 153                         compatible = "brcm,bcm2835-usb";
 154                         reg = <0x7e980000 0x10000>;
 155                         interrupts = <1 9>;
 156                 };
 157
 158                 arm-pmu {
 159                         compatible = "arm,arm1176-pmu";
 160                 };
 161         };
 162
 163         clocks {
 164                 compatible = "simple-bus";
 165                 #address-cells = <1>;
 166                 #size-cells = <0>;
 167
 168                 clk_mmc: clock@0 {
 169                         compatible = "fixed-clock";
 170                         reg = <0>;
 171                         #clock-cells = <0>;
 172                         clock-output-names = "mmc";
 173                         clock-frequency = <100000000>;
 174                 };
 175
 176                 clk_i2c: clock@1 {
 177                         compatible = "fixed-clock";
 178                         reg = <1>;
 179                         #clock-cells = <0>;
 180                         clock-output-names = "i2c";
 181                         clock-frequency = <250000000>;
 182                 };
 183
 184                 clk_spi: clock@2 {
 185                         compatible = "fixed-clock";
 186                         reg = <2>;
 187                         #clock-cells = <0>;
 188                         clock-output-names = "spi";
 189                         clock-frequency = <250000000>;
 190                 };
 191         };
 192 };