arch/arm/boot/dts/at91sam9x5.dtsi

   1 /*
   2  * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
   3  *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
   4  *                   AT91SAM9X25, AT91SAM9X35 SoC
   5  *
   6  *  Copyright (C) 2012 Atmel,
   7  *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
   8  *
   9  * Licensed under GPLv2 or later.
  10  */
  11
  12 #include "skeleton.dtsi"
  13 #include <dt-bindings/dma/at91.h>
  14 #include <dt-bindings/pinctrl/at91.h>
  15 #include <dt-bindings/interrupt-controller/irq.h>
  16 #include <dt-bindings/gpio/gpio.h>
  17
  18 / {
  19         model = "Atmel AT91SAM9x5 family SoC";
  20         compatible = "atmel,at91sam9x5";
  21         interrupt-parent = <&aic>;
  22
  23         aliases {
  24                 serial0 = &dbgu;
  25                 serial1 = &usart0;
  26                 serial2 = &usart1;
  27                 serial3 = &usart2;
  28                 gpio0 = &pioA;
  29                 gpio1 = &pioB;
  30                 gpio2 = &pioC;
  31                 gpio3 = &pioD;
  32                 tcb0 = &tcb0;
  33                 tcb1 = &tcb1;
  34                 i2c0 = &i2c0;
  35                 i2c1 = &i2c1;
  36                 i2c2 = &i2c2;
  37                 ssc0 = &ssc0;
  38         };
  39         cpus {
  40                 #address-cells = <0>;
  41                 #size-cells = <0>;
  42
  43                 cpu {
  44                         compatible = "arm,arm926ej-s";
  45                         device_type = "cpu";
  46                 };
  47         };
  48
  49         memory {
  50                 reg = <0x20000000 0x10000000>;
  51         };
  52
  53         ahb {
  54                 compatible = "simple-bus";
  55                 #address-cells = <1>;
  56                 #size-cells = <1>;
  57                 ranges;
  58
  59                 apb {
  60                         compatible = "simple-bus";
  61                         #address-cells = <1>;
  62                         #size-cells = <1>;
  63                         ranges;
  64
  65                         aic: interrupt-controller@fffff000 {
  66                                 #interrupt-cells = <3>;
  67                                 compatible = "atmel,at91rm9200-aic";
  68                                 interrupt-controller;
  69                                 reg = <0xfffff000 0x200>;
  70                                 atmel,external-irqs = <31>;
  71                         };
  72
  73                         ramc0: ramc@ffffe800 {
  74                                 compatible = "atmel,at91sam9g45-ddramc";
  75                                 reg = <0xffffe800 0x200>;
  76                         };
  77
  78                         pmc: pmc@fffffc00 {
  79                                 compatible = "atmel,at91rm9200-pmc";
  80                                 reg = <0xfffffc00 0x100>;
  81                         };
  82
  83                         rstc@fffffe00 {
  84                                 compatible = "atmel,at91sam9g45-rstc";
  85                                 reg = <0xfffffe00 0x10>;
  86                         };
  87
  88                         shdwc@fffffe10 {
  89                                 compatible = "atmel,at91sam9x5-shdwc";
  90                                 reg = <0xfffffe10 0x10>;
  91                         };
  92
  93                         pit: timer@fffffe30 {
  94                                 compatible = "atmel,at91sam9260-pit";
  95                                 reg = <0xfffffe30 0xf>;
  96                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
  97                         };
  98
  99                         tcb0: timer@f8008000 {
 100                                 compatible = "atmel,at91sam9x5-tcb";
 101                                 reg = <0xf8008000 0x100>;
 102                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 103                         };
 104
 105                         tcb1: timer@f800c000 {
 106                                 compatible = "atmel,at91sam9x5-tcb";
 107                                 reg = <0xf800c000 0x100>;
 108                                 interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
 109                         };
 110
 111                         dma0: dma-controller@ffffec00 {
 112                                 compatible = "atmel,at91sam9g45-dma";
 113                                 reg = <0xffffec00 0x200>;
 114                                 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
 115                                 #dma-cells = <2>;
 116                         };
 117
 118                         dma1: dma-controller@ffffee00 {
 119                                 compatible = "atmel,at91sam9g45-dma";
 120                                 reg = <0xffffee00 0x200>;
 121                                 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
 122                                 #dma-cells = <2>;
 123                         };
 124
 125                         pinctrl@fffff400 {
 126                                 #address-cells = <1>;
 127                                 #size-cells = <1>;
 128                                 compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
 129                                 ranges = <0xfffff400 0xfffff400 0x800>;
 130
 131                                 /* shared pinctrl settings */
 132                                 dbgu {
 133                                         pinctrl_dbgu: dbgu-0 {
 134                                                 atmel,pins =
 135                                                         <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PA9 periph A */
 136                                                          AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA10 periph A with pullup */
 137                                         };
 138                                 };
 139
 140                                 usart0 {
 141                                         pinctrl_usart0: usart0-0 {
 142                                                 atmel,pins =
 143                                                         <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
 144                                                          AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA1 periph A */
 145                                         };
 146
 147                                         pinctrl_usart0_rts: usart0_rts-0 {
 148                                                 atmel,pins =
 149                                                         <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA2 periph A */
 150                                         };
 151
 152                                         pinctrl_usart0_cts: usart0_cts-0 {
 153                                                 atmel,pins =
 154                                                         <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA3 periph A */
 155                                         };
 156
 157                                         pinctrl_usart0_sck: usart0_sck-0 {
 158                                                 atmel,pins =
 159                                                         <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA4 periph A */
 160                                         };
 161                                 };
 162
 163                                 usart1 {
 164                                         pinctrl_usart1: usart1-0 {
 165                                                 atmel,pins =
 166                                                         <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
 167                                                          AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA6 periph A */
 168                                         };
 169
 170                                         pinctrl_usart1_rts: usart1_rts-0 {
 171                                                 atmel,pins =
 172                                                         <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
 173                                         };
 174
 175                                         pinctrl_usart1_cts: usart1_cts-0 {
 176                                                 atmel,pins =
 177                                                         <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
 178                                         };
 179
 180                                         pinctrl_usart1_sck: usart1_sck-0 {
 181                                                 atmel,pins =
 182                                                         <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
 183                                         };
 184                                 };
 185
 186                                 usart2 {
 187                                         pinctrl_usart2: usart2-0 {
 188                                                 atmel,pins =
 189                                                         <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
 190                                                          AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;  /* PA8 periph A */
 191                                         };
 192
 193                                         pinctrl_usart2_rts: usart2_rts-0 {
 194                                                 atmel,pins =
 195                                                         <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB0 periph B */
 196                                         };
 197
 198                                         pinctrl_usart2_cts: usart2_cts-0 {
 199                                                 atmel,pins =
 200                                                         <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB1 periph B */
 201                                         };
 202
 203                                         pinctrl_usart2_sck: usart2_sck-0 {
 204                                                 atmel,pins =
 205                                                         <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB2 periph B */
 206                                         };
 207                                 };
 208
 209                                 uart0 {
 210                                         pinctrl_uart0: uart0-0 {
 211                                                 atmel,pins =
 212                                                         <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE    /* PC8 periph C */
 213                                                          AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;       /* PC9 periph C with pullup */
 214                                         };
 215                                 };
 216
 217                                 uart1 {
 218                                         pinctrl_uart1: uart1-0 {
 219                                                 atmel,pins =
 220                                                         <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PC16 periph C */
 221                                                          AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>;      /* PC17 periph C with pullup */
 222                                         };
 223                                 };
 224
 225                                 nand {
 226                                         pinctrl_nand: nand-0 {
 227                                                 atmel,pins =
 228                                                         <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD0 periph A Read Enable */
 229                                                          AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD1 periph A Write Enable */
 230                                                          AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD2 periph A Address Latch Enable */
 231                                                          AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD3 periph A Command Latch Enable */
 232                                                          AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP      /* PD4 gpio Chip Enable pin pull_up */
 233                                                          AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP      /* PD5 gpio RDY/BUSY pin pull_up */
 234                                                          AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD6 periph A Data bit 0 */
 235                                                          AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD7 periph A Data bit 1 */
 236                                                          AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD8 periph A Data bit 2 */
 237                                                          AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE    /* PD9 periph A Data bit 3 */
 238                                                          AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD10 periph A Data bit 4 */
 239                                                          AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD11 periph A Data bit 5 */
 240                                                          AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD12 periph A Data bit 6 */
 241                                                          AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
 242                                         };
 243
 244                                         pinctrl_nand_16bits: nand_16bits-0 {
 245                                                 atmel,pins =
 246                                                         <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD14 periph A Data bit 8 */
 247                                                          AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD15 periph A Data bit 9 */
 248                                                          AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD16 periph A Data bit 10 */
 249                                                          AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD17 periph A Data bit 11 */
 250                                                          AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD18 periph A Data bit 12 */
 251                                                          AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD19 periph A Data bit 13 */
 252                                                          AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PD20 periph A Data bit 14 */
 253                                                          AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */
 254                                         };
 255                                 };
 256
 257                                 mmc0 {
 258                                         pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
 259                                                 atmel,pins =
 260                                                         <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA17 periph A */
 261                                                          AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA16 periph A with pullup */
 262                                                          AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA15 periph A with pullup */
 263                                         };
 264
 265                                         pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
 266                                                 atmel,pins =
 267                                                         <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA18 periph A with pullup */
 268                                                          AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP        /* PA19 periph A with pullup */
 269                                                          AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;      /* PA20 periph A with pullup */
 270                                         };
 271                                 };
 272
 273                                 mmc1 {
 274                                         pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
 275                                                 atmel,pins =
 276                                                         <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA13 periph B */
 277                                                          AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP        /* PA12 periph B with pullup */
 278                                                          AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;      /* PA11 periph B with pullup */
 279                                         };
 280
 281                                         pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
 282                                                 atmel,pins =
 283                                                         <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
 284                                                          AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
 285                                                          AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>;       /* PA4 periph B with pullup */
 286                                         };
 287                                 };
 288
 289                                 ssc0 {
 290                                         pinctrl_ssc0_tx: ssc0_tx-0 {
 291                                                 atmel,pins =
 292                                                         <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA24 periph B */
 293                                                          AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA25 periph B */
 294                                                          AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
 295                                         };
 296
 297                                         pinctrl_ssc0_rx: ssc0_rx-0 {
 298                                                 atmel,pins =
 299                                                         <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA27 periph B */
 300                                                          AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA28 periph B */
 301                                                          AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
 302                                         };
 303                                 };
 304
 305                                 spi0 {
 306                                         pinctrl_spi0: spi0-0 {
 307                                                 atmel,pins =
 308                                                         <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA11 periph A SPI0_MISO pin */
 309                                                          AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA12 periph A SPI0_MOSI pin */
 310                                                          AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
 311                                         };
 312                                 };
 313
 314                                 spi1 {
 315                                         pinctrl_spi1: spi1-0 {
 316                                                 atmel,pins =
 317                                                         <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA21 periph B SPI1_MISO pin */
 318                                                          AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PA22 periph B SPI1_MOSI pin */
 319                                                          AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
 320                                         };
 321                                 };
 322
 323                                 i2c0 {
 324                                         pinctrl_i2c0: i2c0-0 {
 325                                                 atmel,pins =
 326                                                         <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE   /* PA30 periph A I2C0 data */
 327                                                          AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
 328                                         };
 329                                 };
 330
 331                                 i2c1 {
 332                                         pinctrl_i2c1: i2c1-0 {
 333                                                 atmel,pins =
 334                                                         <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE    /* PC0 periph C I2C1 data */
 335                                                          AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>;  /* PC1 periph C I2C1 clock */
 336                                         };
 337                                 };
 338
 339                                 i2c2 {
 340                                         pinctrl_i2c2: i2c2-0 {
 341                                                 atmel,pins =
 342                                                         <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE    /* PB4 periph B I2C2 data */
 343                                                          AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;  /* PB5 periph B I2C2 clock */
 344                                         };
 345                                 };
 346
 347                                 i2c_gpio0 {
 348                                         pinctrl_i2c_gpio0: i2c_gpio0-0 {
 349                                                 atmel,pins =
 350                                                         <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
 351                                                          AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;       /* PA31 gpio multidrive I2C0 clock */
 352                                         };
 353                                 };
 354
 355                                 i2c_gpio1 {
 356                                         pinctrl_i2c_gpio1: i2c_gpio1-0 {
 357                                                 atmel,pins =
 358                                                         <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE  /* PC0 gpio multidrive I2C1 data */
 359                                                          AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;        /* PC1 gpio multidrive I2C1 clock */
 360                                         };
 361                                 };
 362
 363                                 i2c_gpio2 {
 364                                         pinctrl_i2c_gpio2: i2c_gpio2-0 {
 365                                                 atmel,pins =
 366                                                         <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE  /* PB4 gpio multidrive I2C2 data */
 367                                                          AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;        /* PB5 gpio multidrive I2C2 clock */
 368                                         };
 369                                 };
 370
 371                                 tcb0 {
 372                                         pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
 373                                                 atmel,pins = <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 374                                         };
 375
 376                                         pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
 377                                                 atmel,pins = <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 378                                         };
 379
 380                                         pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
 381                                                 atmel,pins = <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 382                                         };
 383
 384                                         pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
 385                                                 atmel,pins = <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 386                                         };
 387
 388                                         pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
 389                                                 atmel,pins = <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 390                                         };
 391
 392                                         pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
 393                                                 atmel,pins = <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 394                                         };
 395
 396                                         pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
 397                                                 atmel,pins = <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 398                                         };
 399
 400                                         pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
 401                                                 atmel,pins = <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 402                                         };
 403
 404                                         pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
 405                                                 atmel,pins = <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
 406                                         };
 407                                 };
 408
 409                                 tcb1 {
 410                                         pinctrl_tcb1_tclk0: tcb1_tclk0-0 {
 411                                                 atmel,pins = <AT91_PIOC 4 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 412                                         };
 413
 414                                         pinctrl_tcb1_tclk1: tcb1_tclk1-0 {
 415                                                 atmel,pins = <AT91_PIOC 7 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 416                                         };
 417
 418                                         pinctrl_tcb1_tclk2: tcb1_tclk2-0 {
 419                                                 atmel,pins = <AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 420                                         };
 421
 422                                         pinctrl_tcb1_tioa0: tcb1_tioa0-0 {
 423                                                 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 424                                         };
 425
 426                                         pinctrl_tcb1_tioa1: tcb1_tioa1-0 {
 427                                                 atmel,pins = <AT91_PIOC 5 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 428                                         };
 429
 430                                         pinctrl_tcb1_tioa2: tcb1_tioa2-0 {
 431                                                 atmel,pins = <AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 432                                         };
 433
 434                                         pinctrl_tcb1_tiob0: tcb1_tiob0-0 {
 435                                                 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 436                                         };
 437
 438                                         pinctrl_tcb1_tiob1: tcb1_tiob1-0 {
 439                                                 atmel,pins = <AT91_PIOC 6 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 440                                         };
 441
 442                                         pinctrl_tcb1_tiob2: tcb1_tiob2-0 {
 443                                                 atmel,pins = <AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE>;
 444                                         };
 445                                 };
 446
 447                                 pioA: gpio@fffff400 {
 448                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 449                                         reg = <0xfffff400 0x200>;
 450                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 451                                         #gpio-cells = <2>;
 452                                         gpio-controller;
 453                                         interrupt-controller;
 454                                         #interrupt-cells = <2>;
 455                                 };
 456
 457                                 pioB: gpio@fffff600 {
 458                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 459                                         reg = <0xfffff600 0x200>;
 460                                         interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
 461                                         #gpio-cells = <2>;
 462                                         gpio-controller;
 463                                         #gpio-lines = <19>;
 464                                         interrupt-controller;
 465                                         #interrupt-cells = <2>;
 466                                 };
 467
 468                                 pioC: gpio@fffff800 {
 469                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 470                                         reg = <0xfffff800 0x200>;
 471                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 472                                         #gpio-cells = <2>;
 473                                         gpio-controller;
 474                                         interrupt-controller;
 475                                         #interrupt-cells = <2>;
 476                                 };
 477
 478                                 pioD: gpio@fffffa00 {
 479                                         compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
 480                                         reg = <0xfffffa00 0x200>;
 481                                         interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
 482                                         #gpio-cells = <2>;
 483                                         gpio-controller;
 484                                         #gpio-lines = <22>;
 485                                         interrupt-controller;
 486                                         #interrupt-cells = <2>;
 487                                 };
 488                         };
 489
 490                         ssc0: ssc@f0010000 {
 491                                 compatible = "atmel,at91sam9g45-ssc";
 492                                 reg = <0xf0010000 0x4000>;
 493                                 interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
 494                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(13)>,
 495                                        <&dma0 1 AT91_DMA_CFG_PER_ID(14)>;
 496                                 dma-names = "tx", "rx";
 497                                 pinctrl-names = "default";
 498                                 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
 499                                 status = "disabled";
 500                         };
 501
 502                         mmc0: mmc@f0008000 {
 503                                 compatible = "atmel,hsmci";
 504                                 reg = <0xf0008000 0x600>;
 505                                 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
 506                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(0)>;
 507                                 dma-names = "rxtx";
 508                                 pinctrl-names = "default";
 509                                 #address-cells = <1>;
 510                                 #size-cells = <0>;
 511                                 status = "disabled";
 512                         };
 513
 514                         mmc1: mmc@f000c000 {
 515                                 compatible = "atmel,hsmci";
 516                                 reg = <0xf000c000 0x600>;
 517                                 interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
 518                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(0)>;
 519                                 dma-names = "rxtx";
 520                                 pinctrl-names = "default";
 521                                 #address-cells = <1>;
 522                                 #size-cells = <0>;
 523                                 status = "disabled";
 524                         };
 525
 526                         dbgu: serial@fffff200 {
 527                                 compatible = "atmel,at91sam9260-usart";
 528                                 reg = <0xfffff200 0x200>;
 529                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 530                                 pinctrl-names = "default";
 531                                 pinctrl-0 = <&pinctrl_dbgu>;
 532                                 status = "disabled";
 533                         };
 534
 535                         usart0: serial@f801c000 {
 536                                 compatible = "atmel,at91sam9260-usart";
 537                                 reg = <0xf801c000 0x200>;
 538                                 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
 539                                 pinctrl-names = "default";
 540                                 pinctrl-0 = <&pinctrl_usart0>;
 541                                 status = "disabled";
 542                         };
 543
 544                         usart1: serial@f8020000 {
 545                                 compatible = "atmel,at91sam9260-usart";
 546                                 reg = <0xf8020000 0x200>;
 547                                 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
 548                                 pinctrl-names = "default";
 549                                 pinctrl-0 = <&pinctrl_usart1>;
 550                                 status = "disabled";
 551                         };
 552
 553                         usart2: serial@f8024000 {
 554                                 compatible = "atmel,at91sam9260-usart";
 555                                 reg = <0xf8024000 0x200>;
 556                                 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
 557                                 pinctrl-names = "default";
 558                                 pinctrl-0 = <&pinctrl_usart2>;
 559                                 status = "disabled";
 560                         };
 561
 562                         i2c0: i2c@f8010000 {
 563                                 compatible = "atmel,at91sam9x5-i2c";
 564                                 reg = <0xf8010000 0x100>;
 565                                 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
 566                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(7)>,
 567                                        <&dma0 1 AT91_DMA_CFG_PER_ID(8)>;
 568                                 dma-names = "tx", "rx";
 569                                 #address-cells = <1>;
 570                                 #size-cells = <0>;
 571                                 pinctrl-names = "default";
 572                                 pinctrl-0 = <&pinctrl_i2c0>;
 573                                 status = "disabled";
 574                         };
 575
 576                         i2c1: i2c@f8014000 {
 577                                 compatible = "atmel,at91sam9x5-i2c";
 578                                 reg = <0xf8014000 0x100>;
 579                                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
 580                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(5)>,
 581                                        <&dma1 1 AT91_DMA_CFG_PER_ID(6)>;
 582                                 dma-names = "tx", "rx";
 583                                 #address-cells = <1>;
 584                                 #size-cells = <0>;
 585                                 pinctrl-names = "default";
 586                                 pinctrl-0 = <&pinctrl_i2c1>;
 587                                 status = "disabled";
 588                         };
 589
 590                         i2c2: i2c@f8018000 {
 591                                 compatible = "atmel,at91sam9x5-i2c";
 592                                 reg = <0xf8018000 0x100>;
 593                                 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
 594                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(9)>,
 595                                        <&dma0 1 AT91_DMA_CFG_PER_ID(10)>;
 596                                 dma-names = "tx", "rx";
 597                                 #address-cells = <1>;
 598                                 #size-cells = <0>;
 599                                 pinctrl-names = "default";
 600                                 pinctrl-0 = <&pinctrl_i2c2>;
 601                                 status = "disabled";
 602                         };
 603
 604                         uart0: serial@f8040000 {
 605                                 compatible = "atmel,at91sam9260-usart";
 606                                 reg = <0xf8040000 0x200>;
 607                                 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
 608                                 pinctrl-names = "default";
 609                                 pinctrl-0 = <&pinctrl_uart0>;
 610                                 status = "disabled";
 611                         };
 612
 613                         uart1: serial@f8044000 {
 614                                 compatible = "atmel,at91sam9260-usart";
 615                                 reg = <0xf8044000 0x200>;
 616                                 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
 617                                 pinctrl-names = "default";
 618                                 pinctrl-0 = <&pinctrl_uart1>;
 619                                 status = "disabled";
 620                         };
 621
 622                         adc0: adc@f804c000 {
 623                                 compatible = "atmel,at91sam9260-adc";
 624                                 reg = <0xf804c000 0x100>;
 625                                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
 626                                 atmel,adc-use-external;
 627                                 atmel,adc-channels-used = <0xffff>;
 628                                 atmel,adc-vref = <3300>;
 629                                 atmel,adc-num-channels = <12>;
 630                                 atmel,adc-startup-time = <40>;
 631                                 atmel,adc-channel-base = <0x50>;
 632                                 atmel,adc-drdy-mask = <0x1000000>;
 633                                 atmel,adc-status-register = <0x30>;
 634                                 atmel,adc-trigger-register = <0xc0>;
 635                                 atmel,adc-res = <8 10>;
 636                                 atmel,adc-res-names = "lowres", "highres";
 637                                 atmel,adc-use-res = "highres";
 638
 639                                 trigger@0 {
 640                                         trigger-name = "external-rising";
 641                                         trigger-value = <0x1>;
 642                                         trigger-external;
 643                                 };
 644
 645                                 trigger@1 {
 646                                         trigger-name = "external-falling";
 647                                         trigger-value = <0x2>;
 648                                         trigger-external;
 649                                 };
 650
 651                                 trigger@2 {
 652                                         trigger-name = "external-any";
 653                                         trigger-value = <0x3>;
 654                                         trigger-external;
 655                                 };
 656
 657                                 trigger@3 {
 658                                         trigger-name = "continuous";
 659                                         trigger-value = <0x6>;
 660                                 };
 661                         };
 662
 663                         spi0: spi@f0000000 {
 664                                 #address-cells = <1>;
 665                                 #size-cells = <0>;
 666                                 compatible = "atmel,at91rm9200-spi";
 667                                 reg = <0xf0000000 0x100>;
 668                                 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
 669                                 dmas = <&dma0 1 AT91_DMA_CFG_PER_ID(1)>,
 670                                        <&dma0 1 AT91_DMA_CFG_PER_ID(2)>;
 671                                 dma-names = "tx", "rx";
 672                                 pinctrl-names = "default";
 673                                 pinctrl-0 = <&pinctrl_spi0>;
 674                                 status = "disabled";
 675                         };
 676
 677                         spi1: spi@f0004000 {
 678                                 #address-cells = <1>;
 679                                 #size-cells = <0>;
 680                                 compatible = "atmel,at91rm9200-spi";
 681                                 reg = <0xf0004000 0x100>;
 682                                 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
 683                                 dmas = <&dma1 1 AT91_DMA_CFG_PER_ID(1)>,
 684                                        <&dma1 1 AT91_DMA_CFG_PER_ID(2)>;
 685                                 dma-names = "tx", "rx";
 686                                 pinctrl-names = "default";
 687                                 pinctrl-0 = <&pinctrl_spi1>;
 688                                 status = "disabled";
 689                         };
 690
 691                         usb2: gadget@f803c000 {
 692                                 #address-cells = <1>;
 693                                 #size-cells = <0>;
 694                                 compatible = "atmel,at91sam9rl-udc";
 695                                 reg = <0x00500000 0x80000
 696                                        0xf803c000 0x400>;
 697                                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
 698                                 status = "disabled";
 699
 700                                 ep0 {
 701                                         reg = <0>;
 702                                         atmel,fifo-size = <64>;
 703                                         atmel,nb-banks = <1>;
 704                                 };
 705
 706                                 ep1 {
 707                                         reg = <1>;
 708                                         atmel,fifo-size = <1024>;
 709                                         atmel,nb-banks = <2>;
 710                                         atmel,can-dma;
 711                                         atmel,can-isoc;
 712                                 };
 713
 714                                 ep2 {
 715                                         reg = <2>;
 716                                         atmel,fifo-size = <1024>;
 717                                         atmel,nb-banks = <2>;
 718                                         atmel,can-dma;
 719                                         atmel,can-isoc;
 720                                 };
 721
 722                                 ep3 {
 723                                         reg = <3>;
 724                                         atmel,fifo-size = <1024>;
 725                                         atmel,nb-banks = <3>;
 726                                         atmel,can-dma;
 727                                 };
 728
 729                                 ep4 {
 730                                         reg = <4>;
 731                                         atmel,fifo-size = <1024>;
 732                                         atmel,nb-banks = <3>;
 733                                         atmel,can-dma;
 734                                 };
 735
 736                                 ep5 {
 737                                         reg = <5>;
 738                                         atmel,fifo-size = <1024>;
 739                                         atmel,nb-banks = <3>;
 740                                         atmel,can-dma;
 741                                         atmel,can-isoc;
 742                                 };
 743
 744                                 ep6 {
 745                                         reg = <6>;
 746                                         atmel,fifo-size = <1024>;
 747                                         atmel,nb-banks = <3>;
 748                                         atmel,can-dma;
 749                                         atmel,can-isoc;
 750                                 };
 751                         };
 752
 753                         watchdog@fffffe40 {
 754                                 compatible = "atmel,at91sam9260-wdt";
 755                                 reg = <0xfffffe40 0x10>;
 756                                 status = "disabled";
 757                         };
 758
 759                         rtc@fffffeb0 {
 760                                 compatible = "atmel,at91sam9x5-rtc";
 761                                 reg = <0xfffffeb0 0x40>;
 762                                 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
 763                                 status = "disabled";
 764                         };
 765                 };
 766
 767                 nand0: nand@40000000 {
 768                         compatible = "atmel,at91rm9200-nand";
 769                         #address-cells = <1>;
 770                         #size-cells = <1>;
 771                         reg = <0x40000000 0x10000000
 772                                0xffffe000 0x600         /* PMECC Registers */
 773                                0xffffe600 0x200         /* PMECC Error Location Registers */
 774                                0x00108000 0x18000       /* PMECC looup table in ROM code  */
 775                               >;
 776                         atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
 777                         atmel,nand-addr-offset = <21>;
 778                         atmel,nand-cmd-offset = <22>;
 779                         pinctrl-names = "default";
 780                         pinctrl-0 = <&pinctrl_nand>;
 781                         gpios = <&pioD 5 GPIO_ACTIVE_HIGH
 782                                  &pioD 4 GPIO_ACTIVE_HIGH
 783                                  0
 784                                 >;
 785                         status = "disabled";
 786                 };
 787
 788                 usb0: ohci@00600000 {
 789                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
 790                         reg = <0x00600000 0x100000>;
 791                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
 792                         status = "disabled";
 793                 };
 794
 795                 usb1: ehci@00700000 {
 796                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
 797                         reg = <0x00700000 0x100000>;
 798                         interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
 799                         status = "disabled";
 800                 };
 801         };
 802
 803         i2c@0 {
 804                 compatible = "i2c-gpio";
 805                 gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
 806                          &pioA 31 GPIO_ACTIVE_HIGH /* scl */
 807                         >;
 808                 i2c-gpio,sda-open-drain;
 809                 i2c-gpio,scl-open-drain;
 810                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 811                 #address-cells = <1>;
 812                 #size-cells = <0>;
 813                 pinctrl-names = "default";
 814                 pinctrl-0 = <&pinctrl_i2c_gpio0>;
 815                 status = "disabled";
 816         };
 817
 818         i2c@1 {
 819                 compatible = "i2c-gpio";
 820                 gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
 821                          &pioC 1 GPIO_ACTIVE_HIGH /* scl */
 822                         >;
 823                 i2c-gpio,sda-open-drain;
 824                 i2c-gpio,scl-open-drain;
 825                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 826                 #address-cells = <1>;
 827                 #size-cells = <0>;
 828                 pinctrl-names = "default";
 829                 pinctrl-0 = <&pinctrl_i2c_gpio1>;
 830                 status = "disabled";
 831         };
 832
 833         i2c@2 {
 834                 compatible = "i2c-gpio";
 835                 gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
 836                          &pioB 5 GPIO_ACTIVE_HIGH /* scl */
 837                         >;
 838                 i2c-gpio,sda-open-drain;
 839                 i2c-gpio,scl-open-drain;
 840                 i2c-gpio,delay-us = <2>;        /* ~100 kHz */
 841                 #address-cells = <1>;
 842                 #size-cells = <0>;
 843                 pinctrl-names = "default";
 844                 pinctrl-0 = <&pinctrl_i2c_gpio2>;
 845                 status = "disabled";
 846         };
 847 };