arch/arm/boot/dts/armada-370-xp.dtsi

   1 /*
   2  * Device Tree Include file for Marvell Armada 370 and Armada XP SoC
   3  *
   4  * Copyright (C) 2012 Marvell
   5  *
   6  * Lior Amsalem <alior@marvell.com>
   7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
   9  * Ben Dooks <ben.dooks@codethink.co.uk>
  10  *
  11  * This file is licensed under the terms of the GNU General Public
  12  * License version 2.  This program is licensed "as is" without any
  13  * warranty of any kind, whether express or implied.
  14  *
  15  * This file contains the definitions that are common to the Armada
  16  * 370 and Armada XP SoC.
  17  */
  18
  19 /include/ "skeleton64.dtsi"
  20
  21 #define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
  22
  23 / {
  24         model = "Marvell Armada 370 and XP SoC";
  25         compatible = "marvell,armada-370-xp";
  26
  27         aliases {
  28                 eth0 = &eth0;
  29                 eth1 = &eth1;
  30         };
  31
  32         cpus {
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35                 cpu@0 {
  36                         compatible = "marvell,sheeva-v7";
  37                         device_type = "cpu";
  38                         reg = <0>;
  39                 };
  40         };
  41
  42         soc {
  43                 #address-cells = <2>;
  44                 #size-cells = <1>;
  45                 controller = <&mbusc>;
  46                 interrupt-parent = <&mpic>;
  47                 pcie-mem-aperture = <0xe0000000 0x8000000>;
  48                 pcie-io-aperture  = <0xe8000000 0x100000>;
  49
  50                 devbus-bootcs {
  51                         compatible = "marvell,mvebu-devbus";
  52                         reg = <MBUS_ID(0xf0, 0x01) 0x10400 0x8>;
  53                         ranges = <0 MBUS_ID(0x01, 0x2f) 0 0xffffffff>;
  54                         #address-cells = <1>;
  55                         #size-cells = <1>;
  56                         clocks = <&coreclk 0>;
  57                         status = "disabled";
  58                 };
  59
  60                 devbus-cs0 {
  61                         compatible = "marvell,mvebu-devbus";
  62                         reg = <MBUS_ID(0xf0, 0x01) 0x10408 0x8>;
  63                         ranges = <0 MBUS_ID(0x01, 0x3e) 0 0xffffffff>;
  64                         #address-cells = <1>;
  65                         #size-cells = <1>;
  66                         clocks = <&coreclk 0>;
  67                         status = "disabled";
  68                 };
  69
  70                 devbus-cs1 {
  71                         compatible = "marvell,mvebu-devbus";
  72                         reg = <MBUS_ID(0xf0, 0x01) 0x10410 0x8>;
  73                         ranges = <0 MBUS_ID(0x01, 0x3d) 0 0xffffffff>;
  74                         #address-cells = <1>;
  75                         #size-cells = <1>;
  76                         clocks = <&coreclk 0>;
  77                         status = "disabled";
  78                 };
  79
  80                 devbus-cs2 {
  81                         compatible = "marvell,mvebu-devbus";
  82                         reg = <MBUS_ID(0xf0, 0x01) 0x10418 0x8>;
  83                         ranges = <0 MBUS_ID(0x01, 0x3b) 0 0xffffffff>;
  84                         #address-cells = <1>;
  85                         #size-cells = <1>;
  86                         clocks = <&coreclk 0>;
  87                         status = "disabled";
  88                 };
  89
  90                 devbus-cs3 {
  91                         compatible = "marvell,mvebu-devbus";
  92                         reg = <MBUS_ID(0xf0, 0x01) 0x10420 0x8>;
  93                         ranges = <0 MBUS_ID(0x01, 0x37) 0 0xffffffff>;
  94                         #address-cells = <1>;
  95                         #size-cells = <1>;
  96                         clocks = <&coreclk 0>;
  97                         status = "disabled";
  98                 };
  99
 100                 internal-regs {
 101                         compatible = "simple-bus";
 102                         #address-cells = <1>;
 103                         #size-cells = <1>;
 104                         ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
 105
 106                         mbusc: mbus-controller@20000 {
 107                                 compatible = "marvell,mbus-controller";
 108                                 reg = <0x20000 0x100>, <0x20180 0x20>;
 109                         };
 110
 111                         mpic: interrupt-controller@20000 {
 112                                 compatible = "marvell,mpic";
 113                                 #interrupt-cells = <1>;
 114                                 #size-cells = <1>;
 115                                 interrupt-controller;
 116                                 msi-controller;
 117                         };
 118
 119                         coherency-fabric@20200 {
 120                                 compatible = "marvell,coherency-fabric";
 121                                 reg = <0x20200 0xb0>, <0x21810 0x1c>;
 122                         };
 123
 124                         serial@12000 {
 125                                 compatible = "snps,dw-apb-uart";
 126                                 reg = <0x12000 0x100>;
 127                                 reg-shift = <2>;
 128                                 interrupts = <41>;
 129                                 reg-io-width = <1>;
 130                                 status = "disabled";
 131                         };
 132                         serial@12100 {
 133                                 compatible = "snps,dw-apb-uart";
 134                                 reg = <0x12100 0x100>;
 135                                 reg-shift = <2>;
 136                                 interrupts = <42>;
 137                                 reg-io-width = <1>;
 138                                 status = "disabled";
 139                         };
 140
 141                         coredivclk: corediv-clock@18740 {
 142                                 compatible = "marvell,armada-370-corediv-clock";
 143                                 reg = <0x18740 0xc>;
 144                                 #clock-cells = <1>;
 145                                 clocks = <&mainpll>;
 146                                 clock-output-names = "nand";
 147                         };
 148
 149                         timer@20300 {
 150                                 reg = <0x20300 0x30>, <0x21040 0x30>;
 151                                 interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
 152                         };
 153
 154                         sata@a0000 {
 155                                 compatible = "marvell,orion-sata";
 156                                 reg = <0xa0000 0x5000>;
 157                                 interrupts = <55>;
 158                                 clocks = <&gateclk 15>, <&gateclk 30>;
 159                                 clock-names = "0", "1";
 160                                 status = "disabled";
 161                         };
 162
 163                         mdio {
 164                                 #address-cells = <1>;
 165                                 #size-cells = <0>;
 166                                 compatible = "marvell,orion-mdio";
 167                                 reg = <0x72004 0x4>;
 168                         };
 169
 170                         eth0: ethernet@70000 {
 171                                 compatible = "marvell,armada-370-neta";
 172                                 reg = <0x70000 0x4000>;
 173                                 interrupts = <8>;
 174                                 clocks = <&gateclk 4>;
 175                                 status = "disabled";
 176                         };
 177
 178                         eth1: ethernet@74000 {
 179                                 compatible = "marvell,armada-370-neta";
 180                                 reg = <0x74000 0x4000>;
 181                                 interrupts = <10>;
 182                                 clocks = <&gateclk 3>;
 183                                 status = "disabled";
 184                         };
 185
 186                         i2c0: i2c@11000 {
 187                                 compatible = "marvell,mv64xxx-i2c";
 188                                 #address-cells = <1>;
 189                                 #size-cells = <0>;
 190                                 interrupts = <31>;
 191                                 timeout-ms = <1000>;
 192                                 clocks = <&coreclk 0>;
 193                                 status = "disabled";
 194                         };
 195
 196                         i2c1: i2c@11100 {
 197                                 compatible = "marvell,mv64xxx-i2c";
 198                                 #address-cells = <1>;
 199                                 #size-cells = <0>;
 200                                 interrupts = <32>;
 201                                 timeout-ms = <1000>;
 202                                 clocks = <&coreclk 0>;
 203                                 status = "disabled";
 204                         };
 205
 206                         rtc@10300 {
 207                                 compatible = "marvell,orion-rtc";
 208                                 reg = <0x10300 0x20>;
 209                                 interrupts = <50>;
 210                         };
 211
 212                         mvsdio@d4000 {
 213                                 compatible = "marvell,orion-sdio";
 214                                 reg = <0xd4000 0x200>;
 215                                 interrupts = <54>;
 216                                 clocks = <&gateclk 17>;
 217                                 bus-width = <4>;
 218                                 cap-sdio-irq;
 219                                 cap-sd-highspeed;
 220                                 cap-mmc-highspeed;
 221                                 status = "disabled";
 222                         };
 223
 224                         usb@50000 {
 225                                 compatible = "marvell,orion-ehci";
 226                                 reg = <0x50000 0x500>;
 227                                 interrupts = <45>;
 228                                 status = "disabled";
 229                         };
 230
 231                         usb@51000 {
 232                                 compatible = "marvell,orion-ehci";
 233                                 reg = <0x51000 0x500>;
 234                                 interrupts = <46>;
 235                                 status = "disabled";
 236                         };
 237
 238                         spi0: spi@10600 {
 239                                 compatible = "marvell,orion-spi";
 240                                 reg = <0x10600 0x28>;
 241                                 #address-cells = <1>;
 242                                 #size-cells = <0>;
 243                                 cell-index = <0>;
 244                                 interrupts = <30>;
 245                                 clocks = <&coreclk 0>;
 246                                 status = "disabled";
 247                         };
 248
 249                         spi1: spi@10680 {
 250                                 compatible = "marvell,orion-spi";
 251                                 reg = <0x10680 0x28>;
 252                                 #address-cells = <1>;
 253                                 #size-cells = <0>;
 254                                 cell-index = <1>;
 255                                 interrupts = <92>;
 256                                 clocks = <&coreclk 0>;
 257                                 status = "disabled";
 258                         };
 259
 260                 };
 261         };
 262
 263         clocks {
 264                 /* 2 GHz fixed main PLL */
 265                 mainpll: mainpll {
 266                         compatible = "fixed-clock";
 267                         #clock-cells = <0>;
 268                         clock-frequency = <2000000000>;
 269                 };
 270         };
 271  };