2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <linux/seq_file.h>
11 #include <linux/delay.h>
12 #include <linux/root_dev.h>
13 #include <linux/console.h>
14 #include <linux/module.h>
15 #include <linux/cpu.h>
16 #include <linux/clk-provider.h>
17 #include <linux/of_fdt.h>
18 #include <linux/of_platform.h>
19 #include <linux/cache.h>
20 #include <asm/sections.h>
21 #include <asm/arcregs.h>
23 #include <asm/setup.h>
26 #include <asm/unwind.h>
28 #include <asm/mach_desc.h>
31 #define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
33 unsigned int intr_to_DE_cnt;
35 /* Part of U-boot ABI: see head.S */
36 int __initdata uboot_tag;
37 char __initdata *uboot_arg;
39 const struct machine_desc *machine_desc;
41 struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
43 struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
45 static void read_arc_build_cfg_regs(void)
47 struct bcr_perip uncached_space;
48 struct bcr_generic bcr;
49 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
52 READ_BCR(AUX_IDENTITY, cpu->core);
53 READ_BCR(ARC_REG_ISA_CFG_BCR, cpu->isa);
55 READ_BCR(ARC_REG_TIMERS_BCR, cpu->timers);
56 cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
58 READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
59 BUG_ON((uncached_space.start << 24) != ARC_UNCACHED_ADDR_SPACE);
61 READ_BCR(ARC_REG_MUL_BCR, cpu->extn_mpy);
63 cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR) > 1 ? 1 : 0; /* 2,3 */
64 cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR) > 1 ? 1 : 0; /* 2,3 */
65 cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
66 cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
67 cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
69 /* Note that we read the CCM BCRs independent of kernel config
70 * This is to catch the cases where user doesn't know that
71 * CCMs are present in hardware build
76 struct bcr_dccm_base dccm_base;
77 unsigned int bcr_32bit_val;
79 bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
81 iccm = *((struct bcr_iccm *)&bcr_32bit_val);
82 cpu->iccm.base_addr = iccm.base << 16;
83 cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
86 bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
88 dccm = *((struct bcr_dccm *)&bcr_32bit_val);
89 cpu->dccm.sz = 0x800 << (dccm.sz);
91 READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
92 cpu->dccm.base_addr = dccm_base.addr << 8;
96 READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
98 read_decode_mmu_bcr();
99 read_decode_cache_bcr();
101 if (is_isa_arcompact()) {
102 struct bcr_fp_arcompact sp, dp;
103 struct bcr_bpu_arcompact bpu;
105 READ_BCR(ARC_REG_FP_BCR, sp);
106 READ_BCR(ARC_REG_DPFP_BCR, dp);
107 cpu->extn.fpu_sp = sp.ver ? 1 : 0;
108 cpu->extn.fpu_dp = dp.ver ? 1 : 0;
110 READ_BCR(ARC_REG_BPU_BCR, bpu);
111 cpu->bpu.ver = bpu.ver;
112 cpu->bpu.full = bpu.fam ? 1 : 0;
114 cpu->bpu.num_cache = 256 << (bpu.ent - 1);
115 cpu->bpu.num_pred = 256 << (bpu.ent - 1);
118 struct bcr_fp_arcv2 spdp;
119 struct bcr_bpu_arcv2 bpu;
121 READ_BCR(ARC_REG_FP_V2_BCR, spdp);
122 cpu->extn.fpu_sp = spdp.sp ? 1 : 0;
123 cpu->extn.fpu_dp = spdp.dp ? 1 : 0;
125 READ_BCR(ARC_REG_BPU_BCR, bpu);
126 cpu->bpu.ver = bpu.ver;
127 cpu->bpu.full = bpu.ft;
128 cpu->bpu.num_cache = 256 << bpu.bce;
129 cpu->bpu.num_pred = 2048 << bpu.pte;
132 READ_BCR(ARC_REG_AP_BCR, bcr);
133 cpu->extn.ap = bcr.ver ? 1 : 0;
135 READ_BCR(ARC_REG_SMART_BCR, bcr);
136 cpu->extn.smart = bcr.ver ? 1 : 0;
138 READ_BCR(ARC_REG_RTT_BCR, bcr);
139 cpu->extn.rtt = bcr.ver ? 1 : 0;
141 cpu->extn.debug = cpu->extn.ap | cpu->extn.smart | cpu->extn.rtt;
144 static const struct cpuinfo_data arc_cpu_tbl[] = {
145 #ifdef CONFIG_ISA_ARCOMPACT
146 { {0x20, "ARC 600" }, 0x2F},
147 { {0x30, "ARC 700" }, 0x33},
148 { {0x34, "ARC 700 R4.10"}, 0x34},
149 { {0x35, "ARC 700 R4.11"}, 0x35},
151 { {0x50, "ARC HS38 R2.0"}, 0x51},
152 { {0x52, "ARC HS38 R2.1"}, 0x52},
157 #define IS_AVAIL1(v, s) ((v) ? s : "")
158 #define IS_USED_RUN(v) ((v) ? "" : "(not used) ")
159 #define IS_USED_CFG(cfg) IS_USED_RUN(IS_ENABLED(cfg))
160 #define IS_AVAIL2(v, s, cfg) IS_AVAIL1(v, s), IS_AVAIL1(v, IS_USED_CFG(cfg))
162 static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
164 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
165 struct bcr_identity *core = &cpu->core;
166 const struct cpuinfo_data *tbl;
173 if (is_isa_arcompact()) {
174 isa_nm = "ARCompact";
175 be = IS_ENABLED(CONFIG_CPU_BIG_ENDIAN);
177 atomic = cpu->isa.atomic1;
178 if (!cpu->isa.ver) /* ISA BCR absent, use Kconfig info */
179 atomic = IS_ENABLED(CONFIG_ARC_HAS_LLSC);
183 atomic = cpu->isa.atomic;
186 n += scnprintf(buf + n, len - n,
187 "\nIDENTITY\t: ARCVER [%#02x] ARCNUM [%#02x] CHIPID [%#4x]\n",
188 core->family, core->cpu_id, core->chip_id);
190 for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
191 if ((core->family >= tbl->info.id) &&
192 (core->family <= tbl->up_range)) {
193 n += scnprintf(buf + n, len - n,
194 "processor [%d]\t: %s (%s ISA) %s\n",
195 cpu_id, tbl->info.str, isa_nm,
196 IS_AVAIL1(be, "[Big-Endian]"));
201 if (tbl->info.id == 0)
202 n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
204 n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
205 (unsigned int)(arc_get_core_freq() / 1000000),
206 (unsigned int)(arc_get_core_freq() / 10000) % 100);
208 n += scnprintf(buf + n, len - n, "Timers\t\t: %s%s%s%s\nISA Extn\t: ",
209 IS_AVAIL1(cpu->timers.t0, "Timer0 "),
210 IS_AVAIL1(cpu->timers.t1, "Timer1 "),
211 IS_AVAIL2(cpu->timers.rtc, "64-bit RTC ",
212 CONFIG_ARC_HAS_RTC));
214 n += i = scnprintf(buf + n, len - n, "%s%s%s%s%s",
215 IS_AVAIL2(atomic, "atomic ", CONFIG_ARC_HAS_LLSC),
216 IS_AVAIL2(cpu->isa.ldd, "ll64 ", CONFIG_ARC_HAS_LL64),
217 IS_AVAIL1(cpu->isa.unalign, "unalign (not used)"));
220 n += scnprintf(buf + n, len - n, "\n\t\t: ");
222 if (cpu->extn_mpy.ver) {
223 if (cpu->extn_mpy.ver <= 0x2) { /* ARCompact */
224 n += scnprintf(buf + n, len - n, "mpy ");
226 int opt = 2; /* stock MPY/MPYH */
228 if (cpu->extn_mpy.dsp) /* OPT 7-9 */
229 opt = cpu->extn_mpy.dsp + 6;
231 n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
233 n += scnprintf(buf + n, len - n, "%s",
234 IS_USED_CFG(CONFIG_ARC_HAS_HW_MPY));
237 n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",
238 IS_AVAIL1(cpu->isa.div_rem, "div_rem "),
239 IS_AVAIL1(cpu->extn.norm, "norm "),
240 IS_AVAIL1(cpu->extn.barrel, "barrel-shift "),
241 IS_AVAIL1(cpu->extn.swap, "swap "),
242 IS_AVAIL1(cpu->extn.minmax, "minmax "),
243 IS_AVAIL1(cpu->extn.crc, "crc "),
244 IS_AVAIL2(1, "swape", CONFIG_ARC_HAS_SWAPE));
247 n += scnprintf(buf + n, len - n,
248 "BPU\t\t: %s%s match, cache:%d, Predict Table:%d\n",
249 IS_AVAIL1(cpu->bpu.full, "full"),
250 IS_AVAIL1(!cpu->bpu.full, "partial"),
251 cpu->bpu.num_cache, cpu->bpu.num_pred);
256 static char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
259 struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
263 n += scnprintf(buf + n, len - n,
264 "Vector Table\t: %#x\nUncached Base\t: %#x\n",
265 cpu->vec_base, ARC_UNCACHED_ADDR_SPACE);
267 if (cpu->extn.fpu_sp || cpu->extn.fpu_dp)
268 n += scnprintf(buf + n, len - n, "FPU\t\t: %s%s\n",
269 IS_AVAIL1(cpu->extn.fpu_sp, "SP "),
270 IS_AVAIL1(cpu->extn.fpu_dp, "DP "));
273 n += scnprintf(buf + n, len - n, "DEBUG\t\t: %s%s%s\n",
274 IS_AVAIL1(cpu->extn.ap, "ActionPoint "),
275 IS_AVAIL1(cpu->extn.smart, "smaRT "),
276 IS_AVAIL1(cpu->extn.rtt, "RTT "));
278 if (cpu->dccm.sz || cpu->iccm.sz)
279 n += scnprintf(buf + n, len - n, "Extn [CCM]\t: DCCM @ %x, %d KB / ICCM: @ %x, %d KB\n",
280 cpu->dccm.base_addr, TO_KB(cpu->dccm.sz),
281 cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
283 n += scnprintf(buf + n, len - n,
284 "OS ABI [v3]\t: no-legacy-syscalls\n");
289 static void arc_chk_core_config(void)
291 struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
295 panic("Timer0 is not present!\n");
298 panic("Timer1 is not present!\n");
300 if (IS_ENABLED(CONFIG_ARC_HAS_RTC) && !cpu->timers.rtc)
301 panic("RTC is not present\n");
303 #ifdef CONFIG_ARC_HAS_DCCM
305 * DCCM can be arbit placed in hardware.
306 * Make sure it's placement/sz matches what Linux is built with
308 if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
309 panic("Linux built with incorrect DCCM Base address\n");
311 if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
312 panic("Linux built with incorrect DCCM Size\n");
315 #ifdef CONFIG_ARC_HAS_ICCM
316 if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
317 panic("Linux built with incorrect ICCM Size\n");
321 * FP hardware/software config sanity
322 * -If hardware contains DPFP, kernel needs to save/restore FPU state
323 * -If not, it will crash trying to save/restore the non-existant regs
325 * (only DPDP checked since SP has no arch visible regs)
327 fpu_enabled = IS_ENABLED(CONFIG_ARC_FPU_SAVE_RESTORE);
329 if (cpu->extn.fpu_dp && !fpu_enabled)
330 pr_warn("CONFIG_ARC_FPU_SAVE_RESTORE needed for working apps\n");
331 else if (!cpu->extn.fpu_dp && fpu_enabled)
332 panic("FPU non-existent, disable CONFIG_ARC_FPU_SAVE_RESTORE\n");
336 * Initialize and setup the processor core
337 * This is called by all the CPUs thus should not do special case stuff
338 * such as only for boot CPU etc
341 void setup_processor(void)
344 int cpu_id = smp_processor_id();
346 read_arc_build_cfg_regs();
349 printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
354 printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
355 printk(arc_platform_smp_cpuinfo());
357 arc_chk_core_config();
360 static inline int is_kernel(unsigned long addr)
362 if (addr >= (unsigned long)_stext && addr <= (unsigned long)_end)
367 void __init setup_arch(char **cmdline_p)
369 #ifdef CONFIG_ARC_UBOOT_SUPPORT
370 /* make sure that uboot passed pointer to cmdline/dtb is valid */
371 if (uboot_tag && is_kernel((unsigned long)uboot_arg))
372 panic("Invalid uboot arg\n");
374 /* See if u-boot passed an external Device Tree blob */
375 machine_desc = setup_machine_fdt(uboot_arg); /* uboot_tag == 2 */
379 /* No, so try the embedded one */
380 machine_desc = setup_machine_fdt(__dtb_start);
382 panic("Embedded DT invalid\n");
385 * If we are here, it is established that @uboot_arg didn't
386 * point to DT blob. Instead if u-boot says it is cmdline,
387 * Appent to embedded DT cmdline.
388 * setup_machine_fdt() would have populated @boot_command_line
390 if (uboot_tag == 1) {
391 /* Ensure a whitespace between the 2 cmdlines */
392 strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
393 strlcat(boot_command_line, uboot_arg,
398 /* Save unparsed command line copy for /proc/cmdline */
399 *cmdline_p = boot_command_line;
401 /* To force early parsing of things like mem=xxx */
404 /* Platform/board specific: e.g. early console registration */
405 if (machine_desc->init_early)
406 machine_desc->init_early();
412 /* copy flat DT out of .init and then unflatten it */
413 unflatten_and_copy_device_tree();
415 /* Can be issue if someone passes cmd line arg "ro"
416 * But that is unlikely so keeping it as it is
418 root_mountflags &= ~MS_RDONLY;
420 #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
421 conswitchp = &dummy_con;
428 static int __init customize_machine(void)
432 * Traverses flattened DeviceTree - registering platform devices
433 * (if any) complete with their resources
435 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
437 if (machine_desc->init_machine)
438 machine_desc->init_machine();
442 arch_initcall(customize_machine);
444 static int __init init_late_machine(void)
446 if (machine_desc->init_late)
447 machine_desc->init_late();
451 late_initcall(init_late_machine);
453 * Get CPU information for use by the procfs.
456 #define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
457 #define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
459 static int show_cpuinfo(struct seq_file *m, void *v)
462 int cpu_id = ptr_to_cpu(v);
464 if (!cpu_online(cpu_id)) {
465 seq_printf(m, "processor [%d]\t: Offline\n", cpu_id);
469 str = (char *)__get_free_page(GFP_TEMPORARY);
473 seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
475 seq_printf(m, "Bogo MIPS\t: %lu.%02lu\n",
476 loops_per_jiffy / (500000 / HZ),
477 (loops_per_jiffy / (5000 / HZ)) % 100);
479 seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
480 seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
481 seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
482 seq_printf(m, arc_platform_smp_cpuinfo());
484 free_page((unsigned long)str);
491 static void *c_start(struct seq_file *m, loff_t *pos)
494 * Callback returns cpu-id to iterator for show routine, NULL to stop.
495 * However since NULL is also a valid cpu-id (0), we use a round-about
496 * way to pass it w/o having to kmalloc/free a 2 byte string.
497 * Encode cpu-id as 0xFFcccc, which is decoded by show routine.
499 return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
502 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
505 return c_start(m, pos);
508 static void c_stop(struct seq_file *m, void *v)
512 const struct seq_operations cpuinfo_op = {
519 static DEFINE_PER_CPU(struct cpu, cpu_topology);
521 static int __init topology_init(void)
525 for_each_present_cpu(cpu)
526 register_cpu(&per_cpu(cpu_topology, cpu), cpu);
531 subsys_initcall(topology_init);