arch/arc/boot/dts/vdk_axs10x_mb.dtsi

   1 /*
   2  * Support for peripherals on the AXS10x mainboard (VDK version)
   3  *
   4  * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com)
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 / {
  12         axs10x_mb_vdk {
  13                 compatible = "simple-bus";
  14                 #address-cells = <1>;
  15                 #size-cells = <1>;
  16                 ranges = <0x00000000 0xe0000000 0x10000000>;
  17                 interrupt-parent = <&mb_intc>;
  18
  19                 clocks {
  20                         apbclk: apbclk {
  21                                 compatible = "fixed-clock";
  22                                 clock-frequency = <50000000>;
  23                                 #clock-cells = <0>;
  24                         };
  25
  26                 };
  27
  28                 ethernet@0x18000 {
  29                         #interrupt-cells = <1>;
  30                         compatible = "snps,dwmac";
  31                         reg = < 0x18000 0x2000 >;
  32                         interrupts = < 4 >;
  33                         interrupt-names = "macirq";
  34                         phy-mode = "rgmii";
  35                         snps,phy-addr = < 0 >;  // VDK model phy address is 0
  36                         snps,pbl = < 32 >;
  37                         clocks = <&apbclk>;
  38                         clock-names = "stmmaceth";
  39                 };
  40
  41                 ehci@0x40000 {
  42                         compatible = "generic-ehci";
  43                         reg = < 0x40000 0x100 >;
  44                         interrupts = < 8 >;
  45                 };
  46
  47                 uart@0x20000 {
  48                         compatible = "snps,dw-apb-uart";
  49                         reg = <0x20000 0x100>;
  50                         clock-frequency = <2403200>;
  51                         interrupts = <17>;
  52                         baud = <115200>;
  53                         reg-shift = <2>;
  54                         reg-io-width = <4>;
  55                 };
  56
  57                 uart@0x21000 {
  58                         compatible = "snps,dw-apb-uart";
  59                         reg = <0x21000 0x100>;
  60                         clock-frequency = <2403200>;
  61                         interrupts = <18>;
  62                         baud = <115200>;
  63                         reg-shift = <2>;
  64                         reg-io-width = <4>;
  65                 };
  66
  67                 uart@0x22000 {
  68                         compatible = "snps,dw-apb-uart";
  69                         reg = <0x22000 0x100>;
  70                         clock-frequency = <2403200>;
  71                         interrupts = <19>;
  72                         baud = <115200>;
  73                         reg-shift = <2>;
  74                         reg-io-width = <4>;
  75                 };
  76
  77 /* PGU output directly sent to virtual LCD screen; hdmi controller not modelled */
  78                 pgu@0x17000 {
  79                         compatible = "snps,arcpgufb";
  80                         reg = <0x17000 0x400>;
  81                         clock-frequency = <51000000>; /* PGU'clock is initated in init function */
  82                         /* interrupts = <5>;   PGU interrupts not used, this vector is used for ps2 below */
  83                 };
  84
  85 /* VDK has additional ps2 keyboard/mouse interface integrated in LCD screen model */
  86                 ps2: ps2@e0017400 {
  87                         compatible = "snps,arc_ps2";
  88                         reg = <0x17400 0x14>;
  89                         interrupts = <5>;
  90                         interrupt-names = "arc_ps2_irq";
  91                 };
  92         };
  93 };