Documentation/devicetree/bindings/mtd/gpmc-nand.txt

   1 Device tree bindings for GPMC connected NANDs
   2
   3 GPMC connected NAND (found on OMAP boards) are represented as child nodes of
   4 the GPMC controller with a name of "nand".
   5
   6 All timing relevant properties as well as generic gpmc child properties are
   7 explained in a separate documents - please refer to
   8 Documentation/devicetree/bindings/bus/ti-gpmc.txt
   9
  10 For NAND specific properties such as ECC modes or bus width, please refer to
  11 Documentation/devicetree/bindings/mtd/nand.txt
  12
  13
  14 Required properties:
  15
  16  - reg:         The CS line the peripheral is connected to
  17
  18 Optional properties:
  19
  20  - nand-bus-width:              Set this numeric value to 16 if the hardware
  21                                 is wired that way. If not specified, a bus
  22                                 width of 8 is assumed.
  23
  24  - ti,nand-ecc-opt:             A string setting the ECC layout to use. One of:
  25                 "sw"            <deprecated> use "ham1" instead
  26                 "hw"            <deprecated> use "ham1" instead
  27                 "hw-romcode"    <deprecated> use "ham1" instead
  28                 "ham1"          1-bit Hamming ecc code
  29                 "bch4"          4-bit BCH ecc code
  30                 "bch8"          8-bit BCH ecc code
  31
  32  - ti,nand-xfer-type:           A string setting the data transfer type. One of:
  33
  34                 "prefetch-polled"       Prefetch polled mode (default)
  35                 "polled"                Polled mode, without prefetch
  36                 "prefetch-dma"          Prefetch enabled sDMA mode
  37                 "prefetch-irq"          Prefetch enabled irq mode
  38
  39  - elm_id:      <deprecated> use "ti,elm-id" instead
  40  - ti,elm-id:   Specifies phandle of the ELM devicetree node.
  41                 ELM is an on-chip hardware engine on TI SoC which is used for
  42                 locating ECC errors for BCHx algorithms. SoC devices which have
  43                 ELM hardware engines should specify this device node in .dtsi
  44                 Using ELM for ECC error correction frees some CPU cycles.
  45
  46 For inline partiton table parsing (optional):
  47
  48  - #address-cells: should be set to 1
  49  - #size-cells: should be set to 1
  50
  51 Example for an AM33xx board:
  52
  53         gpmc: gpmc@50000000 {
  54                 compatible = "ti,am3352-gpmc";
  55                 ti,hwmods = "gpmc";
  56                 reg = <0x50000000 0x1000000>;
  57                 interrupts = <100>;
  58                 gpmc,num-cs = <8>;
  59                 gpmc,num-waitpins = <2>;
  60                 #address-cells = <2>;
  61                 #size-cells = <1>;
  62                 ranges = <0 0 0x08000000 0x2000>;       /* CS0: NAND */
  63                 elm_id = <&elm>;
  64
  65                 nand@0,0 {
  66                         reg = <0 0 0>; /* CS0, offset 0 */
  67                         nand-bus-width = <16>;
  68                         ti,nand-ecc-opt = "bch8";
  69                         ti,nand-xfer-type = "polled";
  70
  71                         gpmc,sync-clk-ps = <0>;
  72                         gpmc,cs-on-ns = <0>;
  73                         gpmc,cs-rd-off-ns = <44>;
  74                         gpmc,cs-wr-off-ns = <44>;
  75                         gpmc,adv-on-ns = <6>;
  76                         gpmc,adv-rd-off-ns = <34>;
  77                         gpmc,adv-wr-off-ns = <44>;
  78                         gpmc,we-off-ns = <40>;
  79                         gpmc,oe-off-ns = <54>;
  80                         gpmc,access-ns = <64>;
  81                         gpmc,rd-cycle-ns = <82>;
  82                         gpmc,wr-cycle-ns = <82>;
  83                         gpmc,wr-access-ns = <40>;
  84                         gpmc,wr-data-mux-bus-ns = <0>;
  85
  86                         #address-cells = <1>;
  87                         #size-cells = <1>;
  88
  89                         /* partitions go here */
  90                 };
  91         };
  92