MIPS: ATH79: Add irq chip ar7240-misc-intc
[linux-drm-fsl-dcu.git] / Documentation / devicetree / bindings / interrupt-controller / ti,omap-intc-irq.txt
1 Omap2/3 intc controller
2
3 On TI omap2 and 3 the intc interrupt controller can provide
4 96 or 128 IRQ signals to the ARM host depending on the SoC.
5
6 Required Properties:
7 - compatible: should be one of
8                         "ti,omap2-intc"
9                         "ti,omap3-intc"
10                         "ti,dm814-intc"
11                         "ti,dm816-intc"
12                         "ti,am33xx-intc"
13
14 - interrupt-controller : Identifies the node as an interrupt controller
15 - #interrupt-cells : Specifies the number of cells needed to encode interrupt
16                      source, should be 1 for intc
17 - interrupts: interrupt reference to primary interrupt controller
18
19 Please refer to interrupts.txt in this directory for details of the common
20 Interrupt Controllers bindings used by client devices.
21
22 Example:
23         intc: interrupt-controller@48200000 {
24                 compatible = "ti,omap3-intc";
25                 interrupt-controller;
26                 #interrupt-cells = <1>;
27                 reg = <0x48200000 0x1000>;
28         };