Shengjiu Wang [Mon, 14 Apr 2014 07:19:54 +0000 (15:19 +0800)]
ENGR00307835-3 ASoC: fsl: implement the ESAI xrun handler.
When esai xrun happened, there is possibility of channel swap. So ESAI
need to be reset.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
Shengjiu Wang [Mon, 14 Apr 2014 06:58:05 +0000 (14:58 +0800)]
ENGR00307835-2 ASoC: dmaengine: Add two function for dmaengine_pcm
Add check_xrun and device_reset for dmaengine_pcm
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
Shengjiu Wang [Thu, 10 Apr 2014 06:50:15 +0000 (14:50 +0800)]
ENGR00307835-1 ASoC: fsl: refine esai driver for sync mode
1. PCRC and PRRC should be set after the setting of control register
according the RM. Then no need init TCCR and RCCR in init function.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
Loren Huang [Fri, 11 Apr 2014 09:14:21 +0000 (17:14 +0800)]
ENGR00308066 [#1091]Use spinlock_irqsave instead of spinlock in gpu
Gpu kernel driver used spinlock in inerrupt context for debug
purpose. So when enabled debug mode in gpu kernel driver, it may
cause gpu kernel driver deadlock.
Changed spinlock to spinlock_irqsave to resolve this issue.
Patch from vivante.
Date: Apr 11, 2014
Signed-off-by: Loren Huang <b02279@freescale.com>
Liu Ying [Thu, 27 Mar 2014 09:20:56 +0000 (17:20 +0800)]
ENGR00306783 video: mxsfb: Add a new 32bit RGB fb pix fmt for 18bit display
This patch adds a new 32bit RGB framebuffer pixel format support for
18bit display. The pixel format's components can be described by the
following table:
-----------------------------
| | length | offset |
-----------------------------
| red | 8bit | 16bit |
-----------------------------
| green | 8bit | 8bit |
-----------------------------
| blue | 8bit | 0 |
-----------------------------
| transp | 0 | N/A |
-----------------------------
Userland should specify each component's length and offset to use
this pixel format, otherwise the default 32bit pixel format which
can be described by the following table will be active:
-----------------------------
| | length | offset |
-----------------------------
| red | 6bit | 16bit |
-----------------------------
| green | 6bit | 8bit |
-----------------------------
| blue | 6bit | 0 |
-----------------------------
| transp | 0 | N/A |
-----------------------------
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Fugang Duan [Tue, 1 Apr 2014 05:55:09 +0000 (13:55 +0800)]
ENGR00305366-04 net: fec: optimize imx6sx enet performance
The patch do below changes for the enet performance improvement:
- Enable GRO in default. The feature can be accessed by ethtool.
- In enet napi callback, check interrupt to call tx/rx clean ring
function.
- For high rate register access, use __raw_writel/__raw_readl instead
of writel/readl. When write trigger register for tx/rx, add dmb()
to make sure the order.
After the optimizition, and below condition:
- cpu frequency is 996Mhz, cpufreq goverment is performance.
- Connect to FPGA board.
The imx6sx enet tcp performance result:
TX: 867Mbps, cpu loading near to 100%.
RX: 940Mbps, cpu loading near to 92%.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Fugang Duan [Mon, 31 Mar 2014 02:30:12 +0000 (10:30 +0800)]
ENGR00305366-03 net: fec: remove memory copy for rx path
Re-allocate skb instead of memory copy skb in rx path to improve
imx6sx enet rx performance. After the patch, rx performance can
reach at 940Mbps (cpu loading is near to 100%) with below interrupt
coalescing setting and cpu frequency is 996Mhz.
enet reg 0x021880F0=
C4000B00
enet reg 0x02188100=
C5000900
Signed-off-by: Fugang Duan <B38611@freescale.com>
Fugang Duan [Wed, 26 Mar 2014 09:40:12 +0000 (17:40 +0800)]
ENGR00305366-02 net: fec: disable txf interrupt in napi
Disable txf interrupt in napi, which can take about 20Mbps
improvement for imx6sx enet tx bandwidth.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Fugang Duan [Mon, 31 Mar 2014 05:46:23 +0000 (13:46 +0800)]
ENGR00305366-01 net: fec: disable netfilter in default
Disable netfilter feature for enet can increase 30Mbps bandwidth
for imx6sx enet tx path.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Julien Olivain [Thu, 10 Apr 2014 09:18:50 +0000 (11:18 +0200)]
ENGR00307848 MXC IPUv3 fb: Fix MXCFB_CSC_UPDATE ioctl()
Add a missing 'break' in the MXCFB_CSC_UPDATE case in mxcfb_ioctl(),
to prevent it to always return EINVAL (Invalid argument).
Acked-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Julien Olivain <julien.olivain@freescale.com>
Nicolin Chen [Tue, 8 Apr 2014 11:14:14 +0000 (19:14 +0800)]
ENGR00307635-8 ARM: imx6sx: Add SAI support to each board level dts
SAI has pin conflicts with other moudles on all current boards of Solo X
and two sdma event conflicts with UART5.
Thus this patch adds new dtbs for SAI cases that occupy the pins and the
event IDs of SDMA.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Tue, 8 Apr 2014 11:09:29 +0000 (19:09 +0800)]
ENGR00307635-7 ARM: imx6sx: Update SAI DT bindings and its pinctrl groups
Since we adds clock controls to SAI driver, we should also update its DTB
to support it.
This patch also appends two essential pinctrl groups to the DTB.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Wed, 9 Apr 2014 09:12:12 +0000 (17:12 +0800)]
ENGR00307635-6 ASoC: fsl: Enable SAI for imx-sgtl5000 and imx-wm8962
Since we are able to link SAI and sgtl5000 and wm8962, we should update
the Kconfig to make it build-in if enabling their machine drivers.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Tue, 8 Apr 2014 11:13:15 +0000 (19:13 +0800)]
ENGR00307635-5 ASoC: imx-wm8962: Add non-SSI cpu dai support
The current imx-wm8962 machine driver is designed for SSI as CPU DAI only
while as its name we should make the driver more generic to any other CPU
DAI on i.MX serires -- ESAI, SAI for example.
So this patch makes the driver more general so as to support those non-SSI
cases.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Tue, 8 Apr 2014 11:10:25 +0000 (19:10 +0800)]
ENGR00307635-4 ARM: imx6sx: Use 24.576MHz for both SSI and SAI clocks
SAI derives its mclk from SSI_CLK, so this patch sets a default value for them.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Tue, 8 Apr 2014 10:39:52 +0000 (18:39 +0800)]
ENGR00307635-3 ARM: imx6sx: Update sdma DT binding
Since we've created a new compatible for imx6sx-sdma, we here update its dtsi
accordingly.
Acked-by: Robin Gong <b38343@freescale.com>
Acked-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Tue, 8 Apr 2014 10:34:56 +0000 (18:34 +0800)]
ENGR00307635-2 dmaengine: imx-sdma: Add imx6sx platform support
The new Solo X has more requirements for SDMA events. So it creates a event mux
to remap most of event numbers in GPR (General Purpose Register). If we want to
use SDMA support for those module who do not get the even number as default, we
need to configure GPR first.
Thus this patch adds this support of GPR event remapping configuration to the
SDMA driver.
Acked-by: Robin Gong <b38343@freescale.com>
Acked-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Tue, 8 Apr 2014 10:46:10 +0000 (18:46 +0800)]
ENGR00307635-1 ASoC: fsl_sai: Specify buffer size for SAI
Add a new micro for SAI so as to make further define flexible.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Thu, 10 Apr 2014 15:26:15 +0000 (23:26 +0800)]
ASoC: fsl_sai: Add clock controls for SAI
The SAI mainly has the following clocks:
bus clock
control and configure registers and to generate synchronous
interrupts and DMA requests.
mclk1, mclk2, mclk3
to generate the bit clock when the receiver or transmitter is
configured for an internally generated bit clock.
So this patch adds these clocks and their clock controls to the driver.
[ To concern the old DTB cases, I've added a bit of extra code to make
the driver compatible with them. And by marking clock NULL if failed
to get, the clk_prepare() or clk_get_rate() would easily return 0
so no further path should be broken. -- by Nicolin ]
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Acked-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit
17d1eb6628e70488c44c46003dcfe583696bb7b7)
Thierry Reding [Fri, 18 Oct 2013 08:46:24 +0000 (10:46 +0200)]
pwm-backlight: Fix brightness adjustment
Split adjustment of the brightness (by changing the PWM duty cycle) from
the power on sequence. This fixes an issue where the brightness can no
longer be updated once the backlight has been enabled.
Reported-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit
e4bfeda96872bfe6015cd360008b77cd3b981b2b)
Conflicts:
drivers/video/backlight/pwm_bl.c
Mike Dunn [Sun, 22 Sep 2013 16:59:56 +0000 (09:59 -0700)]
pwm-backlight: Allow for non-increasing brightness levels
Currently the driver assumes that the values specified in the
brightness-levels device tree property increase as they are parsed from
left to right. But boards that invert the signal between the PWM output
and the backlight will need to specify decreasing brightness-levels.
This patch removes the assumption that the last element of the array is
the maximum value, and instead searches the array for the maximum value
and uses that in the duty cycle calculation.
Signed-off-by: Mike Dunn <mikedunn@newsguy.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit
8f43e18e2769b3b28383903d501b4da29e388aad)
Conflicts:
drivers/video/backlight/pwm_bl.c
Thierry Reding [Fri, 30 Aug 2013 10:32:18 +0000 (12:32 +0200)]
pwm-backlight: Use new enable_gpio field
Make use of the new enable_gpio field and allow it to be set from DT as
well. Now that all legacy users of platform data have been converted to
initialize this field to an invalid value, it is safe to use the field
from the driver.
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit
8265b2e4e62632b01f998095d1bbda4d281629fe)
Thierry Reding [Fri, 30 Aug 2013 09:51:22 +0000 (11:51 +0200)]
pwm-backlight: Add optional enable GPIO
To support a wider variety of backlight setups, introduce an optional
enable GPIO. Legacy users of the platform data already have a means of
supporting GPIOs by using the .init(), .exit() and .notify() hooks. DT
users however cannot use those, so an alternative method is required.
In order to ease the introduction of the optional enable GPIO, make it
available in the platform data first, so that existing users can be
converted. Once that has happened a second patch will add code to make
use of it in the driver.
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit
2b9b1620349e325f184c68cddf3b484499c163c0)
Thierry Reding [Wed, 2 Oct 2013 16:01:02 +0000 (18:01 +0200)]
pwm-backlight: Track enable state
Follow up patches will add support for more complex means of powering
the backlight on and off such as using a regulator. To prevent calls to
the regulator API from becoming unbalanced, keep track of the enabled
state internally.
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit
97c38437115aa0c3fb2d50c488814b503ba529e0)
Thierry Reding [Mon, 7 Oct 2013 09:32:02 +0000 (11:32 +0200)]
pwm-backlight: Refactor backlight power on/off
In preparation for adding an optional regulator and enable GPIO to the
driver, split the power on and power off sequences into separate
functions to reduce code duplication at the multiple call sites.
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit
62b744a87c1170b339f993aa3cfb22465974816a)
Thierry Reding [Mon, 7 Oct 2013 09:30:50 +0000 (11:30 +0200)]
pwm-backlight: Improve readability
Add more blank lines to increase readability. While at it, remove a
trailing blank line at the end of the file.
Signed-off-by: Thierry Reding <treding@nvidia.com>
(cherry picked from commit
668e63c6701d486c68b49ffffc0e5b7de1a2e95c)
Nicolin Chen [Wed, 9 Apr 2014 03:24:51 +0000 (11:24 +0800)]
ENGR00307592 ASoC: fsl_asrc: Add delay after enabling ASRC p2p
When using ASRC p2p as a for-end with other back-end modules like ESAI,
it'd be safer to add 1ms delay, less might be futile for extreme cases,
after enabling ASRC so as to keep ASRC output FIFO with enough data to
content the DMA burstsize of back-ends and accordingly prevent underrun
that might happen to them.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Fri, 4 Apr 2014 07:09:47 +0000 (15:09 +0800)]
ASoC: fsl_sai: Fix Bit Clock Polarity configurations
The BCP bit in TCR4/RCR4 register rules as followings:
0 Bit clock is active high with drive outputs on rising edge
and sample inputs on falling edge.
1 Bit clock is active low with drive outputs on falling edge
and sample inputs on rising edge.
For all formats currently supported in the fsl_sai driver, they're exactly
sending data on the falling edge and sampling on the rising edge.
However, the driver clears this BCP bit for all of them which results click
noise when working with SGTL5000 and big noise with WM8962.
Thus this patch corrects the BCP settings for all the formats here to fix
the nosie issue.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Acked-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit
ef33bc3217c7aa9868f497c4f797cc50ad3ce357)
Ranjani Vaidyanathan [Thu, 3 Apr 2014 19:14:10 +0000 (14:14 -0500)]
ENGR00306955-2 ARM:dts:im6x: Add device tree for IRAM used by low power code.
Ensure that fsl,lpm-sram is only set for the memory that is
used by low power code in the dts files.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
Ranjani Vaidyanathan [Thu, 3 Apr 2014 19:02:21 +0000 (14:02 -0500)]
ENGR00306955-1 ARM:imx6x Ensure that both IRAM and OCRAM_S can be mapped in the IRAM page table
To prevent a page table walk in the DDR, its required that the low
power code use a minimal set of page tables that are stored in IRAM.
This IRAM page table needs to have a known virtual address so the
mapping needs to be created at the beginning of boot using iotable_init().
This patch fixes the following issues:
1. Ensure that OCRAM_S, IRAM, AIPS1 and AIPS2 can all be mapped by the
IMX_IO_P2V macro.
2. Ensure Section mapping is used for the required addresses in the IRAM
page table.
3. Obtain the address of the IRAM/OCRAM_S to be used by low power code
from the device tree. Since the device tree is not setup early in the boot,
use the flat device tree apis to get the address.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
Shengjiu Wang [Thu, 3 Apr 2014 08:05:40 +0000 (16:05 +0800)]
ENGR00306857 pulseaudio5.0 mute Headphone volume when Headphone plugged
Pulseaudio will detect the Headphone Jack, then swith to Headphone.
So register new Jack for Headphone, the iface=CARD.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
Robin Gong [Thu, 3 Apr 2014 09:10:24 +0000 (17:10 +0800)]
ENGR00307017: input: keyboard: snvs_pwrkey: fix system crash sometimes during boot
If there is one ONOFF power key interrupt pending before RESET key pushed. system will
crash as below in the next boot cycle, because the pending interrupt will be serviced
after devm_request_irq while the driver probe has not finished and the drvdata is NULL.
So clear the meaningless irq status in the probe.
ousedev: PS/2 mouse device common for all mice
Unable to handle kernel NULL pointer dereference at virtual address
00000000
pgd =
80004000
[
00000000] *pgd=
00000000
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Not tainted
3.10.17-01631-g6b7b681-dirty #343
task:
a806c000 ti:
a806e000 task.ti:
a806e000
PC is at imx_snvs_pwrkey_interrupt+0x10/0x4c
LR is at imx_snvs_pwrkey_interrupt+0xc/0x4c
pc : [<
803f0594>] lr : [<
803f0590>] psr:
a0000193
sp :
a806fd10 ip :
fffffffa fp :
00000001
r10:
80cb630e r9 :
a8006b40 r8 :
00000024
r7 :
00000000 r6 :
00000000 r5 :
a8006b90 r4 :
a83b5340
r3 :
803f0584 r2 :
a806fd48 r1 :
a80ad000 r0 :
00000000
Flags: NzCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel
Control:
10c53c7d Table:
8000404a DAC:
00000015
Process swapper/0 (pid: 1, stack limit = 0xa806e238)
Stack: (0xa806fd10 to 0xa8070000)
fd00:
a83b5340 a8006b90 00000000 8007363c
fd20:
80cb6000 80090604 00000001 a8006b40 a8006b90 a83b5340 c0802100 60000113
fd40:
a8006b70 00000000 00000000 800737a0 a8006b40 a8006b90 00000000 8007646c
fd60:
800763e8 00000024 00000024 80072e04 80c5fef0 8000e948 c080210c 80c6a904
fd80:
a806fda0 80008558 80074b94 8063c75c 60000113 ffffffff a806fdd4 8000dc80
fda0:
a8006b90 60000113 a806fdb8 00000007 a8006b40 a83b5340 a8006b90 00000024
fdc0:
60000113 a8006b70 00000000 00000000 000000ff a806fde8 80074b94 8063c75c
fde0:
60000113 ffffffff 00000000 80074b94 80c6f688 020cc000 00000000 00000001
fe00:
a83b5340 a8006b40 803f0584 00000004 00000024 a80ad000 00000000 80074f50
fe20:
a83b5310 a80ad000 00000024 803f0584 00000000 a80ad010 80c53804 80076a40
fe40:
a80ab880 a80ad000 a836e990 a836e990 a80ad010 8152696c a80ad000 80cb6480
fe60:
80c44f90 803f0774 00000004 a80ab880 a80ad000 00000000 80d0ba0c a80ad010
fe80:
00000000 80c9a1f0 80cb6480 803099c0 803099a8 8030876c 00000000 a80ad010
fea0:
80c9a1f0 a80ad044 00000000 80308958 00000000 80c9a1f0 803088cc 80306c88
fec0:
a804055c a80ac1b4 80c9a1f0 a836e680 80c89a30 80307f30 80b82af4 80c9a1f0
fee0:
00000006 80c9a1f0 00000006 80cb6480 80cb6480 80308f34 80c5e688 00000006
ff00:
80cb6480 80cb6480 80cb6480 80008704 000000f2 80041d60 80c537dc a806e010
ff20:
80b81e6c 80be5e54 00000006 00000006 800415cc 80041624 00000000 80c5e688
ff40:
00000006 80cb6480 80cb6480 80c194dc 000000f2 80c53804 80c537f8 80c19be0
ff60:
00000006 00000006 80c194dc 900ff07c ab86ff79 08012008 a806ff9c 00000000
ff80:
80631050 00000000 00000000 00000000 00000000 00000000 00000000 80631058
ffa0:
00000000 00000000 80631050 8000e118 00000000 00000000 00000000 00000000
ffc0:
00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
ffe0:
00000000 00000000 00000000 00000000 00000013 00000000 fdfe5bba dbfe26ba
[<
803f0594>] (imx_snvs_pwrkey_interrupt+0x10/0x4c) from [<
8007363c>] (handle_irq_event_percpu+0x54/0x17c)
[<
8007363c>] (handle_irq_event_percpu+0x54/0x17c) from [<
800737a0>] (handle_irq_event+0x3c/0x5c)
[<
800737a0>] (handle_irq_event+0x3c/0x5c) from [<
8007646c>] (handle_fasteoi_irq+0x84/0x14c)
[<
8007646c>] (handle_fasteoi_irq+0x84/0x14c) from [<
80072e04>] (generic_handle_irq+0x2c/0x3c)
[<
80072e04>] (generic_handle_irq+0x2c/0x3c) from [<
8000e948>] (handle_IRQ+0x40/0x90)
[<
8000e948>] (handle_IRQ+0x40/0x90) from [<
80008558>] (gic_handle_irq+0x2c/0x5c)
[<
80008558>] (gic_handle_irq+0x2c/0x5c) from [<
8000dc80>] (__irq_svc+0x40/0x70)
Exception stack(0xa806fda0 to 0xa806fde8)
fda0:
a8006b90 60000113 a806fdb8 00000007 a8006b40 a83b5340 a8006b90 00000024
fdc0:
60000113 a8006b70 00000000 00000000 000000ff a806fde8 80074b94 8063c75c
fde0:
60000113 ffffffff
[<
8000dc80>] (__irq_svc+0x40/0x70) from [<
8063c75c>] (_raw_spin_unlock_irqrestore+0x20/0x48)
[<
8063c75c>] (_raw_spin_unlock_irqrestore+0x20/0x48) from [<
80074b94>] (__setup_irq+0x1b4/0x440)
[<
80074b94>] (__setup_irq+0x1b4/0x440) from [<
80074f50>] (request_threaded_irq+0xa8/0x128)
[<
80074f50>] (request_threaded_irq+0xa8/0x128) from [<
80076a40>] (devm_request_threaded_irq+0x58/0x9c)
[<
80076a40>] (devm_request_threaded_irq+0x58/0x9c) from [<
803f0774>] (imx_snvs_pwrkey_probe+0x118/0x250)
[<
803f0774>] (imx_snvs_pwrkey_probe+0x118/0x250) from [<
803099c0>] (platform_drv_probe+0x18/0x1c)
[<
803099c0>] (platform_drv_probe+0x18/0x1c) from [<
8030876c>] (driver_probe_device+0x10c/0x228)
[<
8030876c>] (driver_probe_device+0x10c/0x228) from [<
80308958>] (__driver_attach+0x8c/0x90)
[<
80308958>] (__driver_attach+0x8c/0x90) from [<
80306c88>] (bus_for_each_dev+0x60/0x94)
[<
80306c88>] (bus_for_each_dev+0x60/0x94) from [<
80307f30>] (bus_add_driver+0x1c0/0x24c)
[<
80307f30>] (bus_add_driver+0x1c0/0x24c) from [<
80308f34>] (driver_register+0x78/0x140)
[<
80308f34>] (driver_register+0x78/0x140) from [<
80008704>] (do_one_initcall+0x108/0x158)
[<
80008704>] (do_one_initcall+0x108/0x158) from [<
80c19be0>] (kernel_init_freeable+0x138/0x1d8)
[<
80c19be0>] (kernel_init_freeable+0x138/0x1d8) from [<
80631058>] (kernel_init+0x8/0x158)
[<
80631058>] (kernel_init+0x8/0x158) from [<
8000e118>] (ret_from_fork+0x14/0x3c)
Code:
e92d4070 e2810010 ebfc5ebe e1a06000 (
e5904000)
---[ end trace
bd5e3234432334c1 ]---
Kernel panic - not syncing: Fatal exception in interrupt
Signed-off-by: Robin Gong <b38343@freescale.com>
Sandor Yu [Thu, 3 Apr 2014 07:46:59 +0000 (15:46 +0800)]
ENGR00306832 mxsfb: xres_virtual should not larger than xres
eLCDIF did not support stride buffer, check the xres_virtual
in function mxfb_check_var, return false
if the value larger than xres.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Nicolin Chen [Thu, 3 Apr 2014 12:36:55 +0000 (20:36 +0800)]
ENGR00306875-2 video: mxc_hdmi: Set hdmi cable state a bit earilier
During hdmi hotplug test, there's a possibility that X-server unblanks
the frame buffer while HDMI-audio just gets the signal to start playback.
Then audio would get an unblanked state right before the playback and
bypassed the DMA enabling code. So this issue is caused by the race
between unblank and set_cable_state().
This patch sets the hdmi cable state a bit earilier so as to let audio
play first. If unblank happens later, the hdmi core and hdmi audio would
be robust enough to handle that case as long as it's not racing with the
other parts.
Acked-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit
2917061c498a97e3c3b99ac616b6f3202f8a0499)
Nicolin Chen [Thu, 3 Apr 2014 07:52:14 +0000 (15:52 +0800)]
ENGR00306875-1 Revert "ENGR00305624-2 ASoC: imx-hdmi-dma: Correct the appl pointer"
After change the pointer, ALSA lib would re-copy the initial data to
DMA buffer because the pointer is pointing the zero position at the
beginning, which results an audiable duplicated playback at the first
eight periods.
Even though dropping this patch would cause pointer being incorrectly
estimated. But to maintain the sanity of basic playback, we revert
the previous patch.
This reverts commit
5d0d4e1558fa0c235691436e1c5d26d9c8950775.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit
cb6cd68b00fbb52852101ca2f3bc93ae45310b66)
Robin Gong [Wed, 2 Apr 2014 09:00:17 +0000 (17:00 +0800)]
ENGR00306653-3: ARM: imx_v7_defconfig enable snvs_pwrkey driver by default
enable snvs_pwrkey driver by default
Signed-off-by: Robin Gong <b38343@freescale.com>
Robin Gong [Wed, 2 Apr 2014 08:55:31 +0000 (16:55 +0800)]
ENGR00306653-2 input: keyboad: snvs_pwrkey: add snvs power key driver
add snvs power key driver since ic team has fix some issues of SNVS on i.mx6sx
Signed-off-by: Robin Gong <b38343@freescale.com>
Robin Gong [Wed, 2 Apr 2014 08:49:59 +0000 (16:49 +0800)]
ENGR00306653-1: ARM: dts: imx6sx: add snvs power key node
Put snvs-pwrkey device node in imx6sx.dtsi since all boards with i.mx6sx were
designed with ONOFF as power key and it's a function at soc level.
Signed-off-by: Robin Gong <b38343@freescale.com>
Fancy Fang [Mon, 31 Mar 2014 09:56:53 +0000 (17:56 +0800)]
ENGR00304418 [V4l2][PXP] Add some rotation cases support for V4L app.
Some V4L2 apps require that playing rotated fullscreen video on
the screen. In recent PXP driver, this is not supported yet. So
this patch adds it on through combining rotation and resize together.
Signed-off-by: Fancy Fang <chen.fang@freescale.com>
Fancy Fang [Wed, 2 Apr 2014 06:51:16 +0000 (14:51 +0800)]
ENGR00301270 [V4L2 Capture] PXP V4L2 output can't report absolute physical address.
Add absolute physical address report by V4L2 driver after
this buffer has been mapped, which is requested by some
multimedia applications.
Signed-off-by: Fancy Fang <chen.fang@freescale.com>
Denis Carikli [Tue, 19 Nov 2013 19:56:04 +0000 (11:56 -0800)]
Input: tsc2007 - add device tree support.
Signed-off-by: Denis Carikli <denis@eukrea.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Loren HUANG [Wed, 2 Apr 2014 09:19:05 +0000 (17:19 +0800)]
ENGR00306443-2 dts:Add QoS description in imx6sx dts
Add QoS description in imx6sx dts for gc400t QoS adjustment.
Signed-off-by: Loren HUANG <b02279@freescale.com>
Loren HUANG [Wed, 2 Apr 2014 09:15:12 +0000 (17:15 +0800)]
ENGR00306443-1 mx6sx:Update the gc400t QoS
Per SoC team recommandation, update the gc400t QoS value to write 2
and Read 8. It can improve gpu performance in most case.
3d fill: 165->172Mpixel/s
2d fill: 190->228Mpixel/s
Signed-off-by: Loren HUANG <b02279@freescale.com>
Nicolin Chen [Tue, 1 Apr 2014 11:34:09 +0000 (19:34 +0800)]
ASoC: fsl_sai: Add imx6sx platform support
The next coming i.MX6 Solo X SoC also contains SAI module while we use
imp_pcm_init() for i.MX platform.
So this patch adds one compatible route for imx6sx and updates the DT
doc accordingly.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit
30c35252aadb460e009ca8a3fdc8891903bdfc66)
[ Added essential parameters to imx_pcm_init() calling due to build error,
resulted from the define change of the function on the upstream. ]
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Dan Douglass [Wed, 2 Apr 2014 19:01:26 +0000 (14:01 -0500)]
ENGR00298286 arm: dts: imx6qdl: add clock to CAAM.
CAAM depends on the clock used by WEIM interface. This patch supplied by
Haung Shijie corrects the issue by adding the clock as a resource for
the CAAM driver.
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Dan Douglass [Wed, 2 Apr 2014 19:00:08 +0000 (14:00 -0500)]
ENGR00298286 arm: dts: imx6qdl: add clock to CAAM.
CAAM depends on the clock used by WEIM interface. This patch supplied by
Haung Shijie corrects the issue by adding the clock to the device tree
entry for CAAM.
Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
Luwei Zhou [Wed, 2 Apr 2014 05:36:22 +0000 (13:36 +0800)]
ENGR00306569: ARM: dts: imx6sx-sdb: Add mma8451 sensor dts support
This patch add mma8451 sensor device tree support on i.MX6SX-SDB
platform.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
Liu Ying [Fri, 21 Mar 2014 07:44:29 +0000 (15:44 +0800)]
ENGR00305369 video: mxc ldb: disable channel in setup callback
In order to avoid any pixelation issue, we should disable a LVDS
channel before its relevant display controlled is enabled. This
patch adds logics to disable the LVDS channel in the setup()
callback which is invoked before the IPUv3 display controller is
disabled and re-enabled.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Ming Lei [Mon, 11 Mar 2013 12:52:12 +0000 (13:52 +0100)]
ARM: 7669/1: keep __my_cpu_offset consistent with generic one
Commit
14318efb(ARM: 7587/1: implement optimized percpu variable access)
introduces arm's __my_cpu_offset to optimize percpu vaiable access,
which really works well on hackbench, but will cause __my_cpu_offset
to return garbage value before it is initialized in cpu_init() called
by setup_arch, so accessing percpu variable before setup_arch may cause
kernel hang. But generic __my_cpu_offset always returns zero before
percpu area is brought up, and won't hang kernel.
So the patch tries to clear __my_cpu_offset on boot CPU early
to avoid boot hang.
At least now percpu variable is accessed by lockdep before
setup_arch(), and enabling CONFIG_LOCK_STAT or CONFIG_DEBUG_LOCKDEP
can trigger kernel hang.
Signed-off-by: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
(cherry picked from commit
9394c1c65e61eb6f4c1c99f342b49e451ec337b6)
Lars-Peter Clausen [Mon, 22 Apr 2013 08:33:32 +0000 (10:33 +0200)]
dma: of: Remove restriction that #dma-cells can't be 0
There is no sensible reason why #dma-cells shouldn't be allowed to be 0. It is
completely up to the DMA controller how many additional parameters, besides the
phandle, it needs to identify a channel. E.g. for DMA controller with only one
channel or for DMA controllers which don't have a restriction on which channel
can be used for which peripheral it completely legitimate to not require any
additional parameters.
Also fixes the following warning:
drivers/dma/of-dma.c: In function 'of_dma_controller_register':
drivers/dma/of-dma.c:67:7: warning: 'nbcells' may be used uninitialized in this function
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
(cherry picked from commit
ff0e0f4f568e8d7593e0035c0c58067bcaf4ab07)
Robin Gong [Wed, 2 Apr 2014 02:19:44 +0000 (10:19 +0800)]
ENGR00300157: ARM: dts: imx6sl-evk-common: correct the pad setting of EPDC_PWRCTRL3
align with the same setting with v3.0.35, otherwise, cause 'POR' reset
if EPDC daughter board attached sometimes.
Signed-off-by: Robin Gong <b38343@freescale.com>
Nicolin Chen [Tue, 1 Apr 2014 03:17:07 +0000 (11:17 +0800)]
ASoC: fsl_sai: Separately enable interrupts for Tx and Rx streams
We only enable one side interrupt for each stream since over/underrun
on the opposite stream would be resulted from what we previously did,
enabling TERE but remaining FRDE disabled, even though the xrun on the
opposite direction will not break the current stream.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Acked-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit
20ea0d31528f7a461a4ecfb5924ca228bf3ca3c5)
Nicolin Chen [Tue, 1 Apr 2014 03:17:06 +0000 (11:17 +0800)]
ASoC: fsl_sai: Fix buggy configurations in trigger()
The current trigger() has two crucial problems:
1) The DMA request enabling operations (FSL_SAI_CSR_FRDE) for Tx and Rx are
now totally exclusive: It would fail to run simultaneous Tx-Rx cases.
2) The TERE disabling operation depends on an incorrect condition -- active
reference count that only gets increased in snd_pcm_open() and decreased
in snd_pcm_close(): The TERE would never get cleared.
So this patch overwrites the trigger function by following these rules:
A) We continue to support tx-async-while-rx-sync-to-tx case alone, which's
originally limited by this fsl_sai driver, but we make the code easy to
modify for the further support of the opposite case.
B) We enable both TE and RE for PLAYBACK stream or CAPTURE stream but only
enabling the DMA request bit (FSL_SAI_CSR_FRDE) of the current direction
due to the requirement of SAI -- For tx-async-while-rx-sync-to-tx case,
the receiver is enabled only when both the transmitter and receiver are
enabled.
Tested cases:
a) aplay test.wav -d5
b) arecord -r44100 -c2 -fS16_LE test.wav -d5
c) arecord -r44100 -c2 -fS16_LE -d5 | aplay
d) (aplay test2.wav &); sleep 1; arecord -r44100 -c2 -fS16_LE test.wav -d1
e) (arecord -r44100 -c2 -fS16_LE test.wav -d5 &); sleep 1; aplay test.wav -d1
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Acked-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit
d827786ea623da7ceadaa037f2574a19cbeb90e5)
Xiubo Li [Tue, 17 Dec 2013 03:24:41 +0000 (11:24 +0800)]
ASoC: fsl-sai: Add device tree bindings for Freescale SAI.
This adds the Document for Freescale SAI driver under
Documentation/devicetree/bindings/sound/.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit
b6344859b911990152e5ee411e62b82eb968004f)
Will Deacon [Mon, 12 Aug 2013 17:03:26 +0000 (18:03 +0100)]
ARM: 7811/1: locks: use early clobber in arch_spin_trylock
commit
afa31d8eb86fc2f25083e675d57ac8173a98f999 upstream.
The res variable is written before we've finished with the input
operands (namely the lock address), so ensure that we mark it as `early
clobber' to avoid unintended register sharing.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Wang Weidong <wangweidong1@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Will Deacon [Mon, 12 Aug 2013 17:04:05 +0000 (18:04 +0100)]
ARM: 7812/1: rwlocks: retry trylock operation if strex fails on free lock
commit
00efaa0250939dc148e2d3104fb3c18395d24a2d upstream.
Commit
15e7e5c1ebf5 ("ARM: 7749/1: spinlock: retry trylock operation if
strex fails on free lock") modifying our arch_spin_trylock to retry the
acquisition if the lock appeared uncontended, but the strex failed.
This patch does the same for rwlocks, which were missed by the original
patch.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Li Zefan <lizefan@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Will Deacon [Wed, 5 Jun 2013 10:27:26 +0000 (11:27 +0100)]
ARM: 7749/1: spinlock: retry trylock operation if strex fails on free lock
commit
15e7e5c1ebf556cd620c9b091e121091ac760f6d upstream.
An exclusive store instruction may fail for reasons other than lock
contention (e.g. a cache eviction during the critical section) so, in
line with other architectures using similar exclusive instructions
(alpha, mips, powerpc), retry the trylock operation if the lock appears
to be free but the strex reported failure.
Reported-by: Tony Thompson <anthony.thompson@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Li Zefan <lizefan@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Vinayak Kale [Wed, 12 Feb 2014 06:30:01 +0000 (07:30 +0100)]
ARM: 7957/1: add DSB after icache flush in __flush_icache_all()
commit
39544ac9df20f73e49fc6b9ac19ff533388c82c0 upstream.
Add DSB after icache flush to complete the cache maintenance operation.
Signed-off-by: Vinayak Kale <vkale@apm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Will Deacon [Fri, 7 Feb 2014 18:12:20 +0000 (19:12 +0100)]
ARM: 7953/1: mm: ensure TLB invalidation is complete before enabling MMU
commit
bae0ca2bc550d1ec6a118fb8f2696f18c4da3d8e upstream.
During __v{6,7}_setup, we invalidate the TLBs since we are about to
enable the MMU on return to head.S. Unfortunately, without a subsequent
dsb instruction, the invalidation is not guaranteed to have completed by
the time we write to the sctlr, potentially exposing us to junk/stale
translations cached in the TLB.
This patch reworks the init functions so that the dsb used to ensure
completion of cache/predictor maintenance is also used to ensure
completion of the TLB invalidation.
Reported-by: Albin Tonnerre <Albin.Tonnerre@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Luwei Zhou [Mon, 31 Mar 2014 07:11:34 +0000 (15:11 +0800)]
ENGR00306165: ARM: dts: imx6q/dl: Modify the mag3110 interrupt flag
This patch modify the sensor mag3110 interrupt flag to rising edege.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
Luwei Zhou [Wed, 2 Apr 2014 01:21:38 +0000 (09:21 +0800)]
ENGR00306133-2: ARM: dts: imx6sx-sdb: Add isl29023 dts support
This patch add isl29023 sensor device tree support on i.MX6SX-SDB
platform.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
Luwei Zhou [Mon, 31 Mar 2014 06:31:23 +0000 (14:31 +0800)]
ENGR00306133-1: input: misc: isl29023: Enable isl29023 driver for i.MX6SX-SDB platform
The isl29023 share the same interrupt gpio with mag3110 sensor. This patch add shared
interrutp support.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
Luwei Zhou [Wed, 2 Apr 2014 01:15:16 +0000 (09:15 +0800)]
ENGR00306134-2: ARM: dts: imx6sx-sdb: Add mag3110 dts support
This patch add mag3110 sensor device tree support on i.MX6SX-SDB
platform.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
Luwei Zhou [Mon, 31 Mar 2014 06:05:23 +0000 (14:05 +0800)]
ENGR00306134-1: hwmon: mag3110 Enable mag3110 driver for i.MX6SX-SDB platform
The mag3110 driver can support irq mode and polling mode. On i.MX6SX-SDB platorm,
mag3110 sensor and other sensor share the same GPIO interrutp line. The main modification:
* Modify the driver to support irq working mode.
* Add shared interrupt support in the driver.
* Fix the clear interrupt flag issue.
Signed-off-by: Luwei Zhou <b45643@freescale.com>
Huang Shijie [Tue, 18 Mar 2014 08:51:06 +0000 (16:51 +0800)]
ENGR00303701-3 ARM: clk: imx6sx: use the 132MHz for the WEIM
We set the maximum clock frequency for the WEIM module.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Huang Shijie [Mon, 17 Mar 2014 07:01:11 +0000 (15:01 +0800)]
ENGR00303701-2 ARM: dts: imx6sx-19x19-arm2: enable the WEIM
enable the 32MB parallel NOR flash.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Huang Shijie [Mon, 17 Mar 2014 05:36:23 +0000 (13:36 +0800)]
ENGR00303701-1 ARM: dts: imx6sx: add WEIM support
Add the WEIM node and the pinctrl.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Ranjani Vaidyanathan [Mon, 31 Mar 2014 18:35:45 +0000 (13:35 -0500)]
ENGR00306309 ARM:imx:imx6qdl: Fix procedure to switch the parent of LDB_DI_CLK
Due to incorrect placement of the clock gate cell in the ldb_di[x]_clk tree,
the glitchy parent mux of ldb_di[x]_clk can cause a glitch to enter the
ldb_di_ipu_div divider. If the divider gets locked up, no ldb_di[x]_clk is
generated, and the LVDS display will hang when the ipu_di_clk is sourced from
ldb_di_clk.
To fix the problem, both the new and current parent of the ldb_di_clk should
be disabled before the switch. This patch ensures that correct steps are
followed when ldb_di_clk parent is switched in the beginning of boot.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Nicolin Chen [Tue, 1 Apr 2014 08:33:08 +0000 (16:33 +0800)]
ENGR00306442-2 ARM: imx6sx: Fix audio noise during monaural audio playback
We should disable the pull up/down bit to the tx data pin as the pulling
operation would cause I2S signal distortion.
Thus this patches dropped the pull up/down bit of TXC pad and the useless
0x40000 bit from all of pads in the group.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Tue, 1 Apr 2014 08:23:37 +0000 (16:23 +0800)]
ENGR00306442-1 ARM: imx6sx: Merge SPDIF and AUDIO clocks into one gate clock
On Solo X, SPDIF and AUDIO clocks shares one single gate to switch two
entirely different clock routes:
SPDIF <-- <---- SPDIF_PODF ----....
\ /
gate1
/ \
AUDIO <-- <---- AUDIO_PODF ----....
The two audio modules would easily cause conflict during clock operations
if running in the same time:
SPDIF <-- gate1 <---- SPDIF_PODF ----....
AUDIO <-- gate1 <---- AUDIO_PODF ----....
To keep them safe, we here have to merge them into one gate clock and limit
their rates and parent identical:
<---- SPDIF_PODF ----....
/
SPDIF, AUDIO <-- gate1
\
<---- AUDIO_PODF ----....
[ The only disadvantage of this modification is that we can not separately
set a different clock rates and clock sources to SPDIF and AUDIO clock. ]
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Tue, 25 Mar 2014 03:46:35 +0000 (11:46 +0800)]
ENGR00305624-2 ASoC: imx-hdmi-dma: Correct the appl pointer
We might not be able to get appl_ptr, so we estimated it by using hw_ptr,
while the distance between then should not be 2 * priv->period_bytes
initially but 8 * priv->period_bytes as we pri-filled one entire buffer
size at the beginning. The driver's memory access might be overlapped
with ALSA's buffer updating. So this patch fixes this inaccurate distance.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit
5d0d4e1558fa0c235691436e1c5d26d9c8950775)
Nicolin Chen [Thu, 6 Mar 2014 11:04:30 +0000 (19:04 +0800)]
ENGR00305624-1 ASoC: imx-hdmi-dma: Use neon data copy function
Use neon data copy function as default to improve data copy performance so that
we can prevent some noise issue happening to HDMI audio due to the performance
issue.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit
aca6d0c4c96d658021bda4b5a4e454076e27e9f2)
Nicolin Chen [Fri, 21 Mar 2014 09:30:44 +0000 (17:30 +0800)]
ENGR00304914-1 ASoC: imx-hdmi-dma: Limit period size for 6DQ
The HDMI IP in i.MX6DQ has a bug that it limits the dma period size within 8K.
Patch 'ENGR00300188-1 ASoC: imx-hdmi-dma: Double the buffer and period sizes'
doubled the period size which works great with Dual Lite but broke the HDMI
audio function on DQ. Thus fix it for 6DQ case.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
(cherry picked from commit
5b5f5e3f7b1dd41022e6e587460fd912fcd481d0)
Nicolin Chen [Fri, 28 Mar 2014 11:39:25 +0000 (19:39 +0800)]
ASoC: fsl_sai: Improve fsl_sai_isr()
This patch improves fsl_sai_isr() in these ways:
1, Add comment for mask fetching code.
2, Return IRQ_NONE if the IRQ is not for the device.
3, Use regmap_write() instead of regmap_update_bits().
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit
4a16d85ffa819902f595eac6677788eddc0e6628)
Nicolin Chen [Thu, 27 Mar 2014 11:06:59 +0000 (19:06 +0800)]
ASoC: fsl_sai: Add isr to deal with error flag
It's quite cricial to clear error flags because SAI might hang if getting
FIFO underrun during playback (I haven't confirmed the same issue on Rx
overflow though).
So this patch enables those irq and adds isr() to clear the flags so as to
keep playback entirely safe.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
(cherry picked from commit
e2681a1bf5ae053426a6c5c1daaed17b2f95efe6)
Nicolin Chen [Fri, 28 Mar 2014 06:21:52 +0000 (14:21 +0800)]
ENGR00305648-8 dma: imx-sdma: Add SAI script support
This patch adds SAI script support to imx-sdma.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Thu, 27 Mar 2014 12:04:31 +0000 (20:04 +0800)]
ENGR00305648-7 ARM: dts: Add ESAI and SAI(Disabled) for imx6sx-19x19-arm2 board
This patch adds nodes for ESAI and SAI for imx6sx-19x19-arm2 board
and enables ESAI only due to pin conflict.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Thu, 27 Mar 2014 12:02:35 +0000 (20:02 +0800)]
ENGR00305648-6 ASoC: imx-cs42888: Merge imx6sx-arm2 configuration with old imx6qdl-sabreauto
To simplify the code, we use one unified configuration for both imx6sx-arm2
and the old imx6qdl-sabreauto board.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Thu, 27 Mar 2014 11:51:15 +0000 (19:51 +0800)]
ENGR00305648-5 ARM: imx6sx: set Audio clocks to 24.576MHz
This patch sets a default clock 24.576MHz for ESAI clock and swtich the
source of external AUDIO clock from pll4 to pll3 since 24.0Mhz would be
more likely recommanded than 24.576MHz to WM8962 audio codec.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Wed, 26 Mar 2014 03:18:18 +0000 (11:18 +0800)]
ENGR00305648-4 ARM: imx6sx: Add SPDIF support to 19x19 arm2 board
Add SPDIF support to 19x19 arm2 board and create a new dts for it due to
pin conflict.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Wed, 26 Mar 2014 03:11:25 +0000 (11:11 +0800)]
ENGR00305648-3 ARM: imx6sx: Add audio nodes to dtsi
This patch adds SPDIF SAI ASRC_P2P and ESAI support to imx6sx.dtsi
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Wed, 26 Mar 2014 02:59:01 +0000 (10:59 +0800)]
ENGR00305648-2 ARM: imx6sx: Add SAI ipg clock to the clock tree
There's one clock for SAI memory access missing in the clock tree. Thus add it.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nicolin Chen [Tue, 25 Mar 2014 12:56:18 +0000 (20:56 +0800)]
ENGR00305648-1 ASoC: imx-sgtl5000: Support non-ssi cpu-dai
The current imx-sgtl5000 driver always attaches the cpu-dai to ssi while
in fact it could be attached to other cpu-dais like SAI. Thus this patch
use a general code to support another cpu-dai. And meanwhile update the
devicetree for i.MX6 Series.
Acked-by: Wang Shengjiu <b02247@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Nitin Garg [Sat, 29 Mar 2014 22:32:22 +0000 (17:32 -0500)]
ENGR00306276: iMX6: Add workaround for ARM errata 761320 and 794072
These are Category B, hence workaround is essential.
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Richard Liu [Tue, 1 Apr 2014 01:58:49 +0000 (09:58 +0800)]
ENGR00306257 [#1027]fix system hang up issue caused by GPU
This issue happens when multiple thread is trying to idle GPU at the
same time, root cause is some wrong logic related with powerMutex which
cause cpu still access GPU AHB register after GPU is suspend(clock off),
that cause the bus lockup and make the whole system hang.
Signed-off-by: Richard Liu <r66033@freescale.com>
Acked-by: Jason Liu
Anson Huang [Mon, 31 Mar 2014 07:22:46 +0000 (15:22 +0800)]
ENGR00306156 ARM: dts: imx6sx-sdb: add gpio key support
Add GPIO key support on i.MX6SX-SDB, see below mapping:
KEY_FUNC1 -> KEY_VOLUMEUP;
KEY_FUNC2 -> KEY_VOLUMEDOWN;
Signed-off-by: Anson Huang <b20788@freescale.com>
Fugang Duan [Mon, 31 Mar 2014 07:12:37 +0000 (15:12 +0800)]
ENGR00306171 ARM: imx6x: fix imx6_enet_mac_init() function build warning
Use compiler 4.4.4-glibc-2.11.1-multilib-1.0 build kernel, there have
build warning:
arch/arm/mach-imx/mach-imx6q.c:240: warning: 'macaddr_high' may be used uninitialized in this function
arch/arm/mach-imx/mach-imx6q.c:240: warning: 'macaddr1_high' may be used uninitialized in this function
For 4.7/4.8 compiler build, no warning report.
The patch just to avoid the build warning.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Fugang Duan [Mon, 31 Mar 2014 05:24:51 +0000 (13:24 +0800)]
ENGR00306137 ARM: imx_v7_defconfig: enable 802.2 LLC
Enable IEEE 802.2 LLC protocol.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Robby Cai [Thu, 27 Mar 2014 10:55:21 +0000 (18:55 +0800)]
ENGR00305598-4 ARM: dts: imx6sx: add new DTS file to enable LCDIF1
Due to the CSI and LCDIF1 shares the same pin MX6SX_PAD_LCD1_ENABLE.
Signed-off-by: Robby Cai <R63905@freescale.com>
Robby Cai [Thu, 27 Mar 2014 10:41:01 +0000 (18:41 +0800)]
ENGR00305598-3 ARM: dts: imx6sx: add csi and v4l2 capture support
Add csi camera support and csi v4l2 capture support on i.MX6SX 19x19 ARM2 board.
Since MX6SX_PAD_LCD1_ENABLE pin is shared between CSI and LCDIF1. LCDIF1 is
disabled by default.
Signed-off-by: Robby Cai <R63905@freescale.com>
Robby Cai [Thu, 27 Mar 2014 10:20:57 +0000 (18:20 +0800)]
ENGR00305598-2 ARM: dts: imx6sx: Add ov5640 camera support on imx6sx-19x19-arm2
Add ov5640 camera support on i.MX6SX 19x19 ARM2 board.
Add new pin group for CSI to reflect the change on this board.
Signed-off-by: Robby Cai <R63905@freescale.com>
Robby Cai [Thu, 27 Mar 2014 10:13:18 +0000 (18:13 +0800)]
ENGR00305598-1 ARM: dts: imx6sx-19x19-arm2: Add new pin control group for I2C2
On i.MX6SX 19x19 ARM2 board, two different PINs are used.
This patch reflects this change.
Signed-off-by: Robby Cai <R63905@freescale.com>
Fugang Duan [Mon, 24 Mar 2014 09:56:35 +0000 (17:56 +0800)]
ENGR00305272 net: fec: keep VLAN tag in default
By default, keep VLAN tag and tranfer to user.
If remove the VLAN tag, enable the quirk "FEC_QUIRK_HAS_VLAN" for
enet IP.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Peter Chen [Thu, 27 Mar 2014 07:23:02 +0000 (15:23 +0800)]
ENGR00305549 ARM: imx6sx-sdb: enable USB function
usbotg1 is for dual-role function, usbotg2 is dedicated
to host function.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Julien Olivain [Wed, 26 Mar 2014 17:38:02 +0000 (18:38 +0100)]
ENGR00305465 MXC IPUv3 fb: Fix permissions of fsl_disp_property sysfs entry
Set the correct permissions of the fsl_disp_property sysfs entry.
Acked-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Julien Olivain <julien.olivain@freescale.com>
Huang Shijie [Tue, 25 Mar 2014 07:45:32 +0000 (15:45 +0800)]
ENGR00305106-3 ARM: dts: imx6sx-sdb: enable the uart5
enable the uart5 for Bluetooth.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Huang Shijie [Tue, 25 Mar 2014 07:38:02 +0000 (15:38 +0800)]
ENGR00305106-2 ARM: dts: imx6sx: add a pinctrl for uart5
This pinctrl is used by the imx6sx-sdb board.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Huang Shijie [Tue, 25 Mar 2014 07:15:49 +0000 (15:15 +0800)]
ENGR00305106-1 ARM: dts: imx6sx: add more UART nodes
Add uart3 ~ uart5 DT nodes which are supported by the imx6sx.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Shengjiu Wang [Wed, 26 Mar 2014 08:53:46 +0000 (16:53 +0800)]
ENGR00305362 ARM: dts: imx6sx: Add gpio for wm8962 headphone detection
update devicetree for wm8962 headphone detection.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
Liu Ying [Tue, 25 Mar 2014 06:51:14 +0000 (14:51 +0800)]
ENGR00305067-10 ARM: dts: imx6sx-sdb: Support Hannstar CABC
This patch adds a device tree node for the Hannstar CABC function.
We currently disable the CABC feature since it makes a panel's
backlight unstable when display content varies considerably from
time to time.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>