drm/i915: Suppress underruns during DP link retraining
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 14 Oct 2016 17:02:54 +0000 (20:02 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 17 Oct 2016 11:53:52 +0000 (14:53 +0300)
DP link retraining causes (spurious?) underruns. We can't really avoid
them, except perhaps by doing a full modeset (which has its own underrun
suppression anyway). So let's just hide them.

MST still has its own logic for retrainin, but a bigger hpd handling
cleanup/unification is needed there anyway, so let's leave that be for now.

References: https://bugs.freedesktop.org/show_bug.cgi?id=98251
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1476464574-32230-3-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
drivers/gpu/drm/i915/intel_dp.c

index bc03f61d94f12b4972ad183946e8b886bec692f4..780691a3413335a399ad37ffa07d8507d7075592 100644 (file)
@@ -3987,6 +3987,31 @@ go_again:
        return -EINVAL;
 }
 
+static void
+intel_dp_retrain_link(struct intel_dp *intel_dp)
+{
+       struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+       struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+       struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
+
+       /* Suppress underruns caused by re-training */
+       intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, false);
+       if (crtc->config->has_pch_encoder)
+               intel_set_pch_fifo_underrun_reporting(dev_priv,
+                                                     intel_crtc_pch_transcoder(crtc), false);
+
+       intel_dp_start_link_train(intel_dp);
+       intel_dp_stop_link_train(intel_dp);
+
+       /* Keep underrun reporting disabled until things are stable */
+       intel_wait_for_vblank(&dev_priv->drm, crtc->pipe);
+
+       intel_set_cpu_fifo_underrun_reporting(dev_priv, crtc->pipe, true);
+       if (crtc->config->has_pch_encoder)
+               intel_set_pch_fifo_underrun_reporting(dev_priv,
+                                                     intel_crtc_pch_transcoder(crtc), true);
+}
+
 static void
 intel_dp_check_link_status(struct intel_dp *intel_dp)
 {
@@ -4012,8 +4037,8 @@ intel_dp_check_link_status(struct intel_dp *intel_dp)
            (!drm_dp_channel_eq_ok(link_status, intel_dp->lane_count))) {
                DRM_DEBUG_KMS("%s: channel EQ not ok, retraining\n",
                              intel_encoder->base.name);
-               intel_dp_start_link_train(intel_dp);
-               intel_dp_stop_link_train(intel_dp);
+
+               intel_dp_retrain_link(intel_dp);
        }
 }