ENGR00176136- MX6: Added support for 1.2GHz ARM Frequency

Added the new 1.2GHz working point.
Currently 'arm_freq=1200" should be added to commandline
for the core to run at 1.2GHz. Also ensure that the appropriate
HW board mods have been done to set VDDARM_IN at 1.425V.

Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>

diff --git a/arch/arm/mach-mx6/cpu.c b/arch/arm/mach-mx6/cpu.c
index 7b7668cf0a6a136b5d7bbac289c08c45ca9b3713..d4850657f60ce8581d5525217d881828d97f9f6b 100644 (file)
--- a/arch/arm/mach-mx6/cpu.c
+++ b/arch/arm/mach-mx6/cpu.c
@@ -167,7 +167,10 @@ early_param("enable_wait_mode", enable_wait);
 
 static int __init arm_core_max(char *p)
 {
-       if (memcmp(p, "1000", 4) == 0) {
+       if (memcmp(p, "1200", 4) == 0) {
+               arm_max_freq = CPU_AT_1_2GHz;
+               p += 4;
+       } else if (memcmp(p, "1000", 4) == 0) {
                arm_max_freq = CPU_AT_1GHz;
                p += 4;
        } else if (memcmp(p, "800", 3) == 0) {

diff --git a/arch/arm/mach-mx6/cpu_op-mx6.c b/arch/arm/mach-mx6/cpu_op-mx6.c
index f6e5af1152262075bb529e80d37b00bbe4ada60d..6f030102c82120fcb345822e5cb09be8581f54c9 100644 (file)
--- a/arch/arm/mach-mx6/cpu_op-mx6.c
+++ b/arch/arm/mach-mx6/cpu_op-mx6.c
@@ -23,7 +23,35 @@ extern void (*set_num_cpu_op)(int num);
 extern u32 arm_max_freq;
 static int num_cpu_op;
 
-/* working point(wp): 0 - 1GHzMHz; 1 - 800MHz, 2 - 624MHz 3 - 400MHz, 4  - 200MHz */
+/* working point(wp): 0 - 1.2GHz; 1 - 800MHz, 2 - 624MHz 3 - 400MHz, 4  - 200MHz */
+static struct cpu_op mx6_cpu_op_1_2G[] = {
+       {
+        .pll_rate = 1200000000,
+        .cpu_rate = 1200000000,
+        .cpu_podf = 0,
+        .cpu_voltage = 1275000,},
+       {
+        .pll_rate = 792000000,
+        .cpu_rate = 792000000,
+        .cpu_podf = 0,
+        .cpu_voltage = 1100000,},
+       {
+        .pll_rate = 624000000,
+        .cpu_rate = 624000000,
+        .cpu_voltage = 1100000,},
+        {
+         .pll_rate = 792000000,
+         .cpu_rate = 396000000,
+         .cpu_podf = 1,
+         .cpu_voltage = 950000,},
+       {
+        .pll_rate = 792000000,
+        .cpu_rate = 198000000,
+        .cpu_podf = 3,
+        .cpu_voltage = 850000,},
+};
+
+/* working point(wp): 0 - 1GHz; 1 - 800MHz, 2 - 624MHz 3 - 400MHz, 4  - 200MHz */
 static struct cpu_op mx6_cpu_op_1G[] = {
        {
         .pll_rate = 996000000,
@@ -111,10 +139,18 @@ static struct cpu_op mx6dl_cpu_op[] = {
         .cpu_voltage = 1000000,},
 };
 
+static struct dvfs_op dvfs_core_setpoint_1_2G[] = {
+       {33, 14, 33, 10, 128, 0x10},     /* 1.2GHz*/
+       {30, 12, 33, 100, 200, 0x10},   /* 800MHz */
+       {28, 12, 33, 100, 200, 0x10},   /* 624MHz */
+       {26, 8, 33, 100, 200, 0x10},   /* 400MHz */
+       {20, 0, 33, 20, 10, 0x10} };   /* 200MHz*/
+
 static struct dvfs_op dvfs_core_setpoint_1G[] = {
        {33, 14, 33, 10, 128, 0x10}, /* 1GHz*/
        {30, 12, 33, 100, 200, 0x10},   /* 800MHz */
-       {28, 8, 33, 100, 200, 0x10},   /* 400MHz */
+       {28, 12, 33, 100, 200, 0x10},   /* 624MHz */
+       {26, 8, 33, 100, 200, 0x10},   /* 400MHz */
        {20, 0, 33, 20, 10, 0x10} };   /* 200MHz*/
 
 static struct dvfs_op dvfs_core_setpoint[] = {
@@ -124,7 +160,10 @@ static struct dvfs_op dvfs_core_setpoint[] = {
 
 static struct dvfs_op *mx6_get_dvfs_core_table(int *wp)
 {
-       if (arm_max_freq == CPU_AT_1GHz) {
+       if (arm_max_freq == CPU_AT_1_2GHz) {
+               *wp = ARRAY_SIZE(dvfs_core_setpoint_1_2G);
+               return dvfs_core_setpoint_1_2G;
+       } else if (arm_max_freq == CPU_AT_1GHz) {
                *wp = ARRAY_SIZE(dvfs_core_setpoint_1G);
                return dvfs_core_setpoint_1G;
        } else {
@@ -144,7 +183,10 @@ struct cpu_op *mx6_get_cpu_op(int *op)
                        return mx6dl_cpu_op;
                }
        } else {
-               if (arm_max_freq == CPU_AT_1GHz) {
+               if (arm_max_freq == CPU_AT_1_2GHz) {
+                       *op =  num_cpu_op = ARRAY_SIZE(mx6_cpu_op_1_2G);
+                       return mx6_cpu_op_1_2G;
+               } else if (arm_max_freq == CPU_AT_1GHz) {
                        *op =  num_cpu_op = ARRAY_SIZE(mx6_cpu_op_1G);
                        return mx6_cpu_op_1G;
                } else {

diff --git a/arch/arm/mach-mx6/cpu_op-mx6.h b/arch/arm/mach-mx6/cpu_op-mx6.h
index 77e8222c5d387faf23d4dcb8bdc7dab8219ee270..b5ca58ecb3b39f6ebbfcb6919824dc8bcf134720 100644 (file)
--- a/arch/arm/mach-mx6/cpu_op-mx6.h
+++ b/arch/arm/mach-mx6/cpu_op-mx6.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
+ * Copyright (C) 2010-2012 Freescale Semiconductor, Inc. All Rights Reserved.
  */
 
 /*
@@ -11,7 +11,8 @@
  * http://www.gnu.org/copyleft/gpl.html
  */
 
-#define CPU_AT_800MHz  0
-#define CPU_AT_1GHz            1
+#define CPU_AT_800MHz          0
+#define CPU_AT_1GHz                    1
+#define CPU_AT_1_2GHz          2
 
 void mx6_cpu_op_init(void);