Merge tag 'v3.12-rc2' into drm-intel-next
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 24 Sep 2013 07:29:24 +0000 (09:29 +0200)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 24 Sep 2013 07:32:53 +0000 (09:32 +0200)
Backmerge Linux 3.12-rc2 to prep for a bunch of -next patches:
- Header cleanup in intel_drv.h, both changed in -fixes and my current
  -next pile.
- Cursor handling cleanup for -next which depends upon the cursor
  handling fix merged into -rc2.

All just trivial conflicts of the "changed adjacent lines" type:
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_drv.h

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
12 files changed:
1  2 
drivers/gpu/drm/i915/i915_dma.c
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/i915_gem_stolen.c
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/intel_ddi.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_dvo.c
drivers/gpu/drm/i915/intel_opregion.c
drivers/gpu/drm/i915/intel_panel.c
drivers/gpu/drm/i915/intel_pm.c
drivers/gpu/drm/i915/intel_sdvo.c

Simple merge
index f1779b352f5954dcf35fff38c8ead789dd0edc6b,df9253d890ee1fbb60482066312a46e7701bf2d4..750f35cccf47202c6a6dcead4dee3cd553396118
@@@ -4913,3 -4886,61 +4941,37 @@@ unsigned long i915_gem_obj_size(struct 
  
        return 0;
  }
 -
 -struct i915_vma *i915_gem_obj_to_vma(struct drm_i915_gem_object *obj,
 -                                   struct i915_address_space *vm)
 -{
 -      struct i915_vma *vma;
 -      list_for_each_entry(vma, &obj->vma_list, vma_link)
 -              if (vma->vm == vm)
 -                      return vma;
 -
 -      return NULL;
 -}
 -
 -struct i915_vma *
 -i915_gem_obj_lookup_or_create_vma(struct drm_i915_gem_object *obj,
 -                                struct i915_address_space *vm)
 -{
 -      struct i915_vma *vma;
 -
 -      vma = i915_gem_obj_to_vma(obj, vm);
 -      if (!vma)
 -              vma = i915_gem_vma_create(obj, vm);
 -
 -      return vma;
 -}
+ static unsigned long
+ i915_gem_inactive_scan(struct shrinker *shrinker, struct shrink_control *sc)
+ {
+       struct drm_i915_private *dev_priv =
+               container_of(shrinker,
+                            struct drm_i915_private,
+                            mm.inactive_shrinker);
+       struct drm_device *dev = dev_priv->dev;
+       int nr_to_scan = sc->nr_to_scan;
+       unsigned long freed;
+       bool unlock = true;
+       if (!mutex_trylock(&dev->struct_mutex)) {
+               if (!mutex_is_locked_by(&dev->struct_mutex, current))
+                       return 0;
+               if (dev_priv->mm.shrinker_no_lock_stealing)
+                       return 0;
+               unlock = false;
+       }
+       freed = i915_gem_purge(dev_priv, nr_to_scan);
+       if (freed < nr_to_scan)
+               freed += __i915_gem_shrink(dev_priv, nr_to_scan,
+                                                       false);
+       if (freed < nr_to_scan)
+               freed += i915_gem_shrink_all(dev_priv);
+       if (unlock)
+               mutex_unlock(&dev->struct_mutex);
+       return freed;
+ }
Simple merge
Simple merge
index 2334e97430192c4c5d7de69cb32a0e7176f829ec,d8a1d98693e7004524aedfb1e3b91e88508d7c95..76d1d32f178b6a589e8e3db87bdf8d82afdde05e
@@@ -4916,27 -4863,21 +4916,24 @@@ static int i9xx_crtc_mode_set(struct dr
  
        refclk = i9xx_get_refclk(crtc, num_connectors);
  
 -      /*
 -       * Returns a set of divisors for the desired target clock with the given
 -       * refclk, or FALSE.  The returned values represent the clock equation:
 -       * reflck * (5 * (m1 + 2) + (m2 + 2)) / (n + 2) / p1 / p2.
 -       */
 -      limit = intel_limit(crtc, refclk);
 -      ok = dev_priv->display.find_dpll(limit, crtc,
 -                                       intel_crtc->config.port_clock,
 -                                       refclk, NULL, &clock);
 -      if (!ok && !intel_crtc->config.clock_set) {
 -              DRM_ERROR("Couldn't find PLL settings for mode!\n");
 -              return -EINVAL;
 +      if (!is_dsi && !intel_crtc->config.clock_set) {
 +              /*
 +               * Returns a set of divisors for the desired target clock with
 +               * the given refclk, or FALSE.  The returned values represent
 +               * the clock equation: reflck * (5 * (m1 + 2) + (m2 + 2)) / (n +
 +               * 2) / p1 / p2.
 +               */
 +              limit = intel_limit(crtc, refclk);
 +              ok = dev_priv->display.find_dpll(limit, crtc,
 +                                               intel_crtc->config.port_clock,
 +                                               refclk, NULL, &clock);
 +              if (!ok && !intel_crtc->config.clock_set) {
 +                      DRM_ERROR("Couldn't find PLL settings for mode!\n");
 +                      return -EINVAL;
 +              }
        }
  
-       /* Ensure that the cursor is valid for the new mode before changing... */
-       intel_crtc_update_cursor(crtc, true);
-       if (!is_dsi && is_lvds && dev_priv->lvds_downclock_avail) {
+       if (is_lvds && dev_priv->lvds_downclock_avail) {
                /*
                 * Ensure we match the reduced clock's P to the target clock.
                 * If the clocks don't match, we can't switch the display clock
@@@ -8378,11 -8199,11 +8372,12 @@@ static void intel_dump_pipe_config(stru
                      pipe_config->gmch_pfit.control,
                      pipe_config->gmch_pfit.pgm_ratios,
                      pipe_config->gmch_pfit.lvds_border_bits);
-       DRM_DEBUG_KMS("pch pfit: pos: 0x%08x, size: 0x%08x\n",
+       DRM_DEBUG_KMS("pch pfit: pos: 0x%08x, size: 0x%08x, %s\n",
                      pipe_config->pch_pfit.pos,
-                     pipe_config->pch_pfit.size);
+                     pipe_config->pch_pfit.size,
+                     pipe_config->pch_pfit.enabled ? "enabled" : "disabled");
        DRM_DEBUG_KMS("ips: %i\n", pipe_config->ips_enabled);
 +      DRM_DEBUG_KMS("double wide: %i\n", pipe_config->double_wide);
  }
  
  static bool check_encoder_cloning(struct drm_crtc *crtc)
@@@ -10262,8 -10059,23 +10251,21 @@@ static void i915_enable_vga_mem(struct 
        }
  }
  
+ void i915_disable_vga_mem(struct drm_device *dev)
+ {
+       /* Disable VGA memory on Intel HD */
+       if (HAS_PCH_SPLIT(dev)) {
+               vga_get_uninterruptible(dev->pdev, VGA_RSRC_LEGACY_IO);
+               outb(inb(VGA_MSR_READ) & ~VGA_MSR_MEM_EN, VGA_MSR_WRITE);
+               vga_set_legacy_decoding(dev->pdev, VGA_RSRC_LEGACY_IO |
+                                                  VGA_RSRC_NORMAL_IO |
+                                                  VGA_RSRC_NORMAL_MEM);
+               vga_put(dev->pdev, VGA_RSRC_LEGACY_IO);
+       }
+ }
  void intel_modeset_init_hw(struct drm_device *dev)
  {
 -      intel_init_power_well(dev);
 -
        intel_prepare_ddi(dev);
  
        intel_init_clock_gating(dev);
index 1f05267803564eec418b48acca711230fec6e8fd,28cae80495e2b1e9d1f4fe0d089bbd63fd7a11b7..4b75328462ed727c2ed175820b604f0d49f5c298
@@@ -819,13 -793,6 +820,14 @@@ extern void hsw_pc8_disable_interrupts(
  extern void hsw_pc8_restore_interrupts(struct drm_device *dev);
  extern void intel_aux_display_runtime_get(struct drm_i915_private *dev_priv);
  extern void intel_aux_display_runtime_put(struct drm_i915_private *dev_priv);
 +extern void intel_dp_get_m_n(struct intel_crtc *crtc,
 +                           struct intel_crtc_config *pipe_config);
 +extern int intel_dotclock_calculate(int link_freq,
 +                                  const struct intel_link_m_n *m_n);
 +extern void ironlake_check_encoder_dotclock(const struct intel_crtc_config *pipe_config,
 +                                          int dotclock);
 +
 +extern bool intel_crtc_active(struct drm_crtc *crtc);
+ extern void i915_disable_vga_mem(struct drm_device *dev);
  
  #endif /* __INTEL_DRV_H__ */
index fe65c7270f06c3e1aa2d7b18e4fe303babfdc434,7fa7df546c1ee6e36e119af34d6e79a9d7015e82..ff86c366218ca8d338343313b94b26559748afcd
@@@ -265,8 -263,15 +265,10 @@@ static bool intel_dvo_compute_config(st
                C(vtotal);
                C(clock);
  #undef C
+               drm_mode_set_crtcinfo(adjusted_mode, 0);
        }
  
 -      if (intel_dvo->dev.dev_ops->mode_fixup)
 -              return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev,
 -                                                        &pipe_config->requested_mode,
 -                                                        adjusted_mode);
 -
        return true;
  }
  
index fd3062a2a42118290e2121b80d366034105f1d47,119771ff46ab5178047c018efc5f9f31a06f068d..2acf5cae20e4b233483c5f49787f570ee125f84c
@@@ -403,10 -170,10 +403,10 @@@ static u32 asle_set_backlight(struct dr
  
        bclp &= ASLE_BCLP_MSK;
        if (bclp > 255)
 -              return ASLE_BACKLIGHT_FAILED;
 +              return ASLC_BACKLIGHT_FAILED;
  
        intel_panel_set_backlight(dev, bclp, 255);
-       iowrite32((bclp*0x64)/0xff | ASLE_CBLV_VALID, &asle->cblv);
+       iowrite32(DIV_ROUND_UP(bclp * 100, 255) | ASLE_CBLV_VALID, &asle->cblv);
  
        return 0;
  }
Simple merge
index 6789dcdb9b1300a93d6da8926889fdd3b0188ef6,dd176b7296c1c44904a163cfe82960f6e196249d..4692f8cb7724cb13d124b1ccdf405d104ee6a986
@@@ -2117,12 -2103,12 +2117,12 @@@ static uint32_t ilk_pipe_pixel_rate(str
        /* We only use IF-ID interlacing. If we ever use PF-ID we'll need to
         * adjust the pixel_rate here. */
  
-       pfit_size = intel_crtc->config.pch_pfit.size;
-       if (pfit_size) {
+       if (intel_crtc->config.pch_pfit.enabled) {
                uint64_t pipe_w, pipe_h, pfit_w, pfit_h;
+               uint32_t pfit_size = intel_crtc->config.pch_pfit.size;
  
 -              pipe_w = intel_crtc->config.requested_mode.hdisplay;
 -              pipe_h = intel_crtc->config.requested_mode.vdisplay;
 +              pipe_w = intel_crtc->config.pipe_src_w;
 +              pipe_h = intel_crtc->config.pipe_src_h;
                pfit_w = (pfit_size >> 16) & 0xFFFF;
                pfit_h = pfit_size & 0xFFFF;
                if (pipe_w < pfit_w)
Simple merge