CR ENGR00050502 add custom ioremap

Patch for CR ENGR00050502: add custom ioremap function to ensure IO
register access through peripheral port.  Applies to linux 2.6.22
kernel on MX platforms.

http://www.bitshrine.org/gpp/linux-2.6.22-mx-CR-ENGR00050502-add-custom-ioremap.patch

diff --git a/arch/arm/plat-mxc/io.c b/arch/arm/plat-mxc/io.c
index ba6cc78055dfbc31772fcd4f4e4b77f9b20fa89d..ee42c048d72d45dcf0d2fd564301bc841a541024 100644 (file)
--- a/arch/arm/plat-mxc/io.c
+++ b/arch/arm/plat-mxc/io.c
@@ -1,68 +1,41 @@
 /*
- * MX27/MX31 custom ioremap implementation.
- *
- *  Copyright 2007 Sony Corporation.
- *  This program is free software; you can redistribute  it and/or modify it
- *  under  the terms of  the GNU General  Public License as published by the
- *  Free Software Foundation;  version 2 of the  License.
- *
- *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
- *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
- *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
- *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
- *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
- *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
- *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
- *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- *  You should have received a copy of the  GNU General Public License along
- *  with this program; if not, write  to the Free Software Foundation, Inc.,
- *  675 Mass Ave, Cambridge, MA 02139, USA.
+ *  Copyright 2007 Freescale Semiconductor, Inc. All Rights Reserved.
+ */
+
+/*
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
  *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
  */
+
+/*
+ * mxc custom ioremap implementation.
+ */
+
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <asm/hardware.h>
 #include <asm/io.h>
 
-void __iomem *__mxc_ioremap(unsigned long cookie, size_t size,
-       unsigned int mtype)
+void *__iomem __mxc_ioremap(unsigned long cookie, size_t size,
+                           unsigned int mtype)
 {
-       unsigned long addr;
-       void __iomem *retval;
-
-       addr = IO_ADDRESS(cookie);
-
-#ifdef DEBUG
-       __print_symbol("%s ", __builtin_return_address(0));
-       printk("called %s(): ", __FUNCTION__);
-#endif
-
-       if (addr != 0xdeadbeef) {
-               retval = (void __iomem *)addr;
-#ifdef DEBUG
-               printk("0x%08lx -> 0x%p\n", cookie, retval);
-#endif
-       } else {
-               retval = __arm_ioremap(cookie, size, mtype);
-#ifdef DEBUG
-               printk("Not using static map: 0x%08lx -> 0x%p\n", cookie, retval);
-#endif
+       if (mtype == MT_DEVICE && IS_MEM_DEVICE_NONSHARED(cookie)) {
+               mtype = MT_DEVICE_NONSHARED;
        }
-
-       return retval;
+       return __arm_ioremap(cookie, size, mtype);
 }
+
 EXPORT_SYMBOL(__mxc_ioremap);
 
-void __mxc_iounmap(void __iomem *addr)
+void __mxc_iounmap(void __iomem * addr)
 {
-       if (IS_STATIC_MAPPED((unsigned long)addr))
-               return;
+       extern void __iounmap(volatile void __iomem * addr);
+
        __iounmap(addr);
 }
-EXPORT_SYMBOL(__mxc_iounmap);
-
-
 
+EXPORT_SYMBOL(__mxc_iounmap);

diff --git a/include/asm-arm/arch-mxc/io.h b/include/asm-arm/arch-mxc/io.h
index f85abcd0e42cadb3c13c1e0e0a1f9b4cb3e048c6..e8c7b1f4cd4a2f827d0167181fadadadd75f2f95 100644 (file)
--- a/include/asm-arm/arch-mxc/io.h
+++ b/include/asm-arm/arch-mxc/io.h
@@ -14,7 +14,7 @@
 /*!
  * @file arch-mxc/io.h
  * @brief This file contains some memory mapping macros.
- * @note There is no real ISA or PCI buses. But have to define these macros
+ * @note We don't have a PCI bus, but we have to define these macros
  * for some drivers to compile.
  *
  * @ingroup MSL_MX27 MSL_MX31
@@ -34,7 +34,6 @@
 #define __io(a)                        ((void __iomem *)(a))
 
 #define __mem_pci(a)           (a)
-#define __mem_isa(a)           (a)
 
 /*!
  * Validate the pci memory address for ioremap.
@@ -50,7 +49,7 @@ extern void __iomem *__mxc_ioremap(unsigned long cookie, size_t size,
                                   unsigned int mtype);
 extern void __mxc_iounmap(void __iomem *addr);
 
-#define __arch_ioremap(a, s, f) __mxc_ioremap(a, s, f)
-#define __arch_iounmap(a)       __mxc_iounmap(a)
+#define __arch_ioremap(a, s, f)        __mxc_ioremap(a, s, f)
+#define __arch_iounmap(a)      __mxc_iounmap(a)
 
 #endif

diff --git a/include/asm-arm/arch-mxc/mx27.h b/include/asm-arm/arch-mxc/mx27.h
index bce0f3164e98f567210d6db7ee9f87fa66ad247c..cd003b4eeb5fb4e463272dca0c841c99fc8637e0 100644 (file)
--- a/include/asm-arm/arch-mxc/mx27.h
+++ b/include/asm-arm/arch-mxc/mx27.h
@@ -205,6 +205,8 @@
 #define PCMCIA_IO_ADDRESS(x) \
         (((x) - X_MEMC_BASE_ADDR) + X_MEMC_BASE_ADDR_VIRT)
 
+#define IS_MEM_DEVICE_NONSHARED(x)             0
+
 /*
  *  MX27 ADS Interrupt numbers
  */

diff --git a/include/asm-arm/arch-mxc/mxc.h b/include/asm-arm/arch-mxc/mxc.h
index 564297701029fbd194a5929649a4f213d3226874..209f8541946025015d1a87ed357b55012beaaece 100644 (file)
--- a/include/asm-arm/arch-mxc/mxc.h
+++ b/include/asm-arm/arch-mxc/mxc.h
@@ -172,6 +172,11 @@ int mxc_snoop_get_status(u32 num, u32 * statl, u32 * stath);
 
 #define DPTC_WP_SUPPORTED      17
 
+#ifndef IS_MEM_DEVICE_NONSHARED
+/* all peripherals on MXC so far are below 0x80000000 but leave L2CC alone */
+#define IS_MEM_DEVICE_NONSHARED(x)  ((x) < 0x80000000 && (x) != L2CC_BASE_ADDR)
+#endif
+
 #ifndef __ASSEMBLY__
 #include <linux/types.h>
 struct dptc_wp {