drm/i915: Extract intel_ddi_clk_disable()
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 10 Oct 2017 12:12:00 +0000 (15:12 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 13 Oct 2017 17:50:36 +0000 (20:50 +0300)
Pull the code to disable the port clock into a function. We already have
the intel_ddi_clk_select() counterpart.

v2: Keep using intel_ddi_get_encoder_port() for now (Chris)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171010121207.570-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/intel_ddi.c

index b307b6fe1ce385300627f080f773b4d9294a360c..1cc61ba48e3adbd6dc74ed66701470afd7943258 100644 (file)
@@ -2141,6 +2141,21 @@ static void intel_ddi_clk_select(struct intel_encoder *encoder,
        }
 }
 
+static void intel_ddi_clk_disable(struct intel_encoder *encoder)
+{
+       struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+       enum port port = intel_ddi_get_encoder_port(encoder);
+
+       if (IS_CANNONLAKE(dev_priv))
+               I915_WRITE(DPCLKA_CFGCR0, I915_READ(DPCLKA_CFGCR0) |
+                          DPCLKA_CFGCR0_DDI_CLK_OFF(port));
+       else if (IS_GEN9_BC(dev_priv))
+               I915_WRITE(DPLL_CTRL2, I915_READ(DPLL_CTRL2) |
+                          DPLL_CTRL2_DDI_CLK_OFF(port));
+       else if (INTEL_GEN(dev_priv) < 9)
+               I915_WRITE(PORT_CLK_SEL(port), PORT_CLK_SEL_NONE);
+}
+
 static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
                                    int link_rate, uint32_t lane_count,
                                    struct intel_shared_dpll *pll,
@@ -2301,14 +2316,7 @@ static void intel_ddi_post_disable(struct intel_encoder *intel_encoder,
        if (dig_port)
                intel_display_power_put(dev_priv, dig_port->ddi_io_power_domain);
 
-       if (IS_CANNONLAKE(dev_priv))
-               I915_WRITE(DPCLKA_CFGCR0, I915_READ(DPCLKA_CFGCR0) |
-                          DPCLKA_CFGCR0_DDI_CLK_OFF(port));
-       else if (IS_GEN9_BC(dev_priv))
-               I915_WRITE(DPLL_CTRL2, (I915_READ(DPLL_CTRL2) |
-                                       DPLL_CTRL2_DDI_CLK_OFF(port)));
-       else if (INTEL_GEN(dev_priv) < 9)
-               I915_WRITE(PORT_CLK_SEL(port), PORT_CLK_SEL_NONE);
+       intel_ddi_clk_disable(intel_encoder);
 
        if (type == INTEL_OUTPUT_HDMI) {
                struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder);