apalis_t30: ixora: optionally support leds, switch, foff and wdisable

The Ixora carrier board has a few MXM3 pins repurposed as follows:

Functionality		MXM3 Pin
LED4_RED		146
LED4_GREEN		162
LED5_RED		156
LED5_GREEN		152
PCIE1_WDISABLE_N	144
SW3			160
UART2_3_RS232_FOFF_N	164

This patch allows uncommenting an IXORA define in the board header file
in order to make use of those repurposed pins.

Please note that those pins are usually used for the 8-bit MMC/SD slot
aka Apalis MMC1 and the SDHCI controller/driver unfortunately changes
the output driver behaviour in a way preventing any regular GPIO use.
This patch therefore explicitly does not register the SDHCI driver on
this controller instance in the Ixora case to avoid this.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>

diff --git a/arch/arm/mach-tegra/board-apalis_t30-pinmux.c b/arch/arm/mach-tegra/board-apalis_t30-pinmux.c
index 87d85207b0dd390e4fb4f9a07fabb2ba309dc054..0e45181fd671aab8a8d7aaae763322ee5decc356 100644 (file)
--- a/arch/arm/mach-tegra/board-apalis_t30-pinmux.c
+++ b/arch/arm/mach-tegra/board-apalis_t30-pinmux.c
@@ -242,7 +242,11 @@ static __initdata struct tegra_pingroup_config apalis_t30_pinmux[] = {
        DEFAULT_PINMUX(GPIO_PV0, RSVD, NORMAL, NORMAL, INPUT),
        DEFAULT_PINMUX(GPIO_PV1, RSVD, NORMAL, NORMAL, INPUT),
        DEFAULT_PINMUX(GPIO_PV2, RSVD1, NORMAL, NORMAL, INPUT),
+#ifdef IXORA
+       DEFAULT_PINMUX(GPIO_PV3, RSVD1, NORMAL, NORMAL, OUTPUT),        /* UART2_3_RS232_FOFF_N */
+#else
        DEFAULT_PINMUX(GPIO_PV3, RSVD1, NORMAL, NORMAL, INPUT),
+#endif
 
        DEFAULT_PINMUX(HDMI_CEC, CEC, NORMAL, NORMAL, INPUT),
        DEFAULT_PINMUX(HDMI_INT, RSVD0, NORMAL, NORMAL, INPUT),
@@ -364,6 +368,18 @@ static __initdata struct tegra_pingroup_config apalis_t30_pinmux[] = {
        DEFAULT_PINMUX(SDMMC1_DAT2, SDMMC1, NORMAL, NORMAL, INPUT),
        DEFAULT_PINMUX(SDMMC1_DAT3, SDMMC1, NORMAL, NORMAL, INPUT),
 
+#ifdef IXORA
+       DEFAULT_PINMUX(SDMMC3_CLK, PWM2, PULL_DOWN, TRISTATE, OUTPUT),  /* NC */
+       DEFAULT_PINMUX(SDMMC3_CMD, PWM3, PULL_DOWN, TRISTATE, OUTPUT),  /* NC */
+       DEFAULT_PINMUX(SDMMC3_DAT0, RSVD1, NORMAL, TRISTATE, INPUT),    /* SW3 */
+       DEFAULT_PINMUX(SDMMC3_DAT1, RSVD0, NORMAL, NORMAL, OUTPUT),     /* LED4_GREEN */
+       DEFAULT_PINMUX(SDMMC3_DAT2, PWM1, NORMAL, NORMAL, OUTPUT),      /* PCIE1_WDISABLE_N */
+       DEFAULT_PINMUX(SDMMC3_DAT3, RSVD0, NORMAL, NORMAL, OUTPUT),     /* LED4_RED */
+       DEFAULT_PINMUX(SDMMC3_DAT4, PWM1, PULL_DOWN, TRISTATE, OUTPUT), /* NC */
+       DEFAULT_PINMUX(SDMMC3_DAT5, PWM0, NORMAL, NORMAL, OUTPUT),      /* LED5_GREEN */
+       DEFAULT_PINMUX(SDMMC3_DAT6, SPDIF, NORMAL, NORMAL, OUTPUT),     /* LED5_RED */
+       DEFAULT_PINMUX(SDMMC3_DAT7, SPDIF, PULL_DOWN, TRISTATE, OUTPUT),/* NC */
+#else /* IXORA */
        DEFAULT_PINMUX(SDMMC3_CLK, SDMMC3, NORMAL, NORMAL, INPUT),
        DEFAULT_PINMUX(SDMMC3_CMD, SDMMC3, PULL_UP, NORMAL, INPUT),
        DEFAULT_PINMUX(SDMMC3_DAT0, SDMMC3, PULL_UP, NORMAL, INPUT),
@@ -374,6 +390,7 @@ static __initdata struct tegra_pingroup_config apalis_t30_pinmux[] = {
        DEFAULT_PINMUX(SDMMC3_DAT5, SDMMC3, PULL_UP, NORMAL, INPUT),
        DEFAULT_PINMUX(SDMMC3_DAT6, SDMMC3, PULL_UP, NORMAL, INPUT),
        DEFAULT_PINMUX(SDMMC3_DAT7, SDMMC3, PULL_UP, NORMAL, INPUT),
+#endif /* IXORA */
 
        DEFAULT_PINMUX(SDMMC4_CLK, SDMMC4, NORMAL, NORMAL, INPUT),
        DEFAULT_PINMUX(SDMMC4_CMD, SDMMC4, PULL_UP, NORMAL, INPUT),

diff --git a/arch/arm/mach-tegra/board-apalis_t30.c b/arch/arm/mach-tegra/board-apalis_t30.c
index 13580ab4c0f3a0a3e68602054cd5195168bf3fc5..21f39010e0ad6359de5b04716e279c9ca6b82b84 100644 (file)
--- a/arch/arm/mach-tegra/board-apalis_t30.c
+++ b/arch/arm/mach-tegra/board-apalis_t30.c
@@ -436,27 +436,38 @@ static struct tegra_clk_init_table apalis_t30_clk_init_table[] __initdata = {
 /* GPIO */
 
 static struct gpio apalis_t30_gpios[] = {
-       {APALIS_GPIO1,  GPIOF_IN,       "GPIO1 X1-1"},
-       {APALIS_GPIO2,  GPIOF_IN,       "GPIO2 X1-3"},
-       {APALIS_GPIO3,  GPIOF_IN,       "GPIO3 X1-5"},
-       {APALIS_GPIO4,  GPIOF_IN,       "GPIO4 X1-7"},
+       {APALIS_GPIO1,          GPIOF_IN,               "GPIO1 X1-1"},
+       {APALIS_GPIO2,          GPIOF_IN,               "GPIO2 X1-3"},
+       {APALIS_GPIO3,          GPIOF_IN,               "GPIO3 X1-5"},
+       {APALIS_GPIO4,          GPIOF_IN,               "GPIO4 X1-7"},
 #ifndef POWER_GPIO
-       {APALIS_GPIO5,  GPIOF_IN,       "GPIO5 X1-9"},
+       {APALIS_GPIO5,          GPIOF_IN,               "GPIO5 X1-9"},
 #endif
 #ifndef FORCE_OFF_GPIO
-       {APALIS_GPIO6,  GPIOF_IN,       "GPIO6 X1-11"},
+       {APALIS_GPIO6,          GPIOF_IN,               "GPIO6 X1-11"},
 #endif
        /* GPIO7 is used by PCIe driver on Evaluation board */
-/*     {APALIS_GPIO7,  GPIOF_IN,       "GPIO7 X1-13"}, */
-       {APALIS_GPIO8,  GPIOF_IN,       "GPIO8 X1-15, FAN"},
-       {LVDS_MODE,     GPIOF_IN,       "LVDS: Single/Dual Ch"},
-       {LVDS_6B_8B_N,  GPIOF_IN,       "LVDS: 18/24 Bit Mode"},
-       {LVDS_OE,       GPIOF_IN,       "LVDS: Output Enable"},
-       {LVDS_PDWN_N,   GPIOF_IN,       "LVDS: Power Down"},
-       {LVDS_R_F_N,    GPIOF_IN,       "LVDS: Clock Polarity"},
-       {LVDS_MAP,      GPIOF_IN,       "LVDS: Colour Mapping"},
-       {LVDS_RS,       GPIOF_IN,       "LVDS: Swing Mode"},
-       {LVDS_DDR_N,    GPIOF_IN,       "LVDS: DDRclk Disable"},
+/*     {APALIS_GPIO7,          GPIOF_IN,               "GPIO7 X1-13"}, */
+       {APALIS_GPIO8,          GPIOF_IN,               "GPIO8 X1-15, FAN"},
+#ifdef IXORA
+       {LED4_GREEN,            GPIOF_OUT_INIT_LOW,     "Ixora LED4_GREEN"},
+       {LED4_RED,              GPIOF_OUT_INIT_LOW,     "Ixora LED4_RED"},
+       {LED5_GREEN,            GPIOF_OUT_INIT_LOW,     "Ixora LED5_GREEN"},
+       {LED5_RED,              GPIOF_OUT_INIT_LOW,     "Ixora LED5_RED"},
+#endif /* IXORA */
+       {LVDS_MODE,             GPIOF_IN,               "LVDS: Single/Dual Ch"},
+       {LVDS_6B_8B_N,          GPIOF_IN,               "LVDS: 18/24 Bit Mode"},
+       {LVDS_OE,               GPIOF_IN,               "LVDS: Output Enable"},
+       {LVDS_PDWN_N,           GPIOF_IN,               "LVDS: Power Down"},
+       {LVDS_R_F_N,            GPIOF_IN,               "LVDS: Clock Polarity"},
+       {LVDS_MAP,              GPIOF_IN,               "LVDS: Colour Mapping"},
+       {LVDS_RS,               GPIOF_IN,               "LVDS: Swing Mode"},
+       {LVDS_DDR_N,            GPIOF_IN,               "LVDS: DDRclk Disable"},
+#ifdef IXORA
+       {PCIE1_WDISABLE_N,      GPIOF_OUT_INIT_HIGH,    "PCIE1_WDISABLE_N"},
+       {SW3,                   GPIOF_IN,               "Ixora SW3"},
+       {UART2_3_RS232_FOFF_N,  GPIOF_OUT_INIT_HIGH,    "UART2_3_RS232_FOFF_N"},
+#endif /* IXORA */
 };
 
 static void apalis_t30_gpio_init(void)
@@ -722,6 +733,7 @@ static struct tegra_sdhci_platform_data apalis_t30_emmc_platform_data = {
        .wp_gpio        = -1,
 };
 
+#ifndef IXORA
 static struct tegra_sdhci_platform_data apalis_t30_mmccard_platform_data = {
        .cd_gpio        = MMC1_CD_N,
        .ddr_clk_limit  = 52000000,
@@ -731,6 +743,7 @@ static struct tegra_sdhci_platform_data apalis_t30_mmccard_platform_data = {
        .wp_gpio        = -1,
        .no_1v8         = 1,
 };
+#endif /* !IXORA */
 
 static struct tegra_sdhci_platform_data apalis_t30_sdcard_platform_data = {
        .cd_gpio        = SD1_CD_N,
@@ -749,11 +762,13 @@ static void __init apalis_t30_sdhci_init(void)
                        &apalis_t30_emmc_platform_data;
        platform_device_register(&tegra_sdhci_device4);
 
+#ifndef IXORA
        if (g_sdmmc3_uhs)
                apalis_t30_mmccard_platform_data.no_1v8 = 0;
        tegra_sdhci_device3.dev.platform_data =
                        &apalis_t30_mmccard_platform_data;
        platform_device_register(&tegra_sdhci_device3);
+#endif /* !IXORA */
 
        tegra_sdhci_device1.dev.platform_data =
                        &apalis_t30_sdcard_platform_data;

diff --git a/arch/arm/mach-tegra/board-apalis_t30.h b/arch/arm/mach-tegra/board-apalis_t30.h
index c08ff32741b80b65e930cc3b9fcee77ac87c852c..14e003453fa76505bc359b8950e769a4f5542131 100644 (file)
--- a/arch/arm/mach-tegra/board-apalis_t30.h
+++ b/arch/arm/mach-tegra/board-apalis_t30.h
@@ -102,6 +102,21 @@
 
 #define WAKE1_MICO     TEGRA_GPIO_PV1
 
+/*
+ * Uncomment to use MXM3 pins 144, 146, 152, 156, 160, 162 & 164 for LEDs,
+ * PCIE1_WDISABLE_N, SW3 and UART2_3_RS232_FOFF_N on Ixora carrier board
+ */
+//#define IXORA
+#ifdef IXORA
+#define LED4_GREEN             TEGRA_GPIO_PB6
+#define LED4_RED               TEGRA_GPIO_PB4
+#define LED5_GREEN             TEGRA_GPIO_PD0
+#define LED5_RED               TEGRA_GPIO_PD3
+#define PCIE1_WDISABLE_N       TEGRA_GPIO_PB5
+#define SW3                    TEGRA_GPIO_PB7
+#define UART2_3_RS232_FOFF_N   TEGRA_GPIO_PV3
+#endif /* IXORA */
+
 /* STMPE811 IRQs */
 #define STMPE811_IRQ_BASE      TEGRA_NR_IRQS
 #define STMPE811_IRQ_END       (STMPE811_IRQ_BASE + 22)