drm/i915: No need to power up PG2 for GMBUS on BXT
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 8 Dec 2017 21:37:37 +0000 (23:37 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 22 Dec 2017 12:22:48 +0000 (14:22 +0200)
GMBUS lives in PG1, so no need to power up PG2. We do want to prevent
the DMC from making a mess of things though, so add GMBUS to the DC off
power well.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171208213739.16388-2-ville.syrjala@linux.intel.com
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
drivers/gpu/drm/i915/intel_runtime_pm.c

index 522e0a63090f8a470227d43cf17e63c5703f8abc..db9d57f3953419e5b204ac8792d5ba62cf7eb31a 100644 (file)
@@ -1726,13 +1726,13 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
        BIT_ULL(POWER_DOMAIN_AUX_C) |                   \
        BIT_ULL(POWER_DOMAIN_AUDIO) |                   \
        BIT_ULL(POWER_DOMAIN_VGA) |                             \
-       BIT_ULL(POWER_DOMAIN_GMBUS) |                   \
        BIT_ULL(POWER_DOMAIN_INIT))
 #define BXT_DISPLAY_DC_OFF_POWER_DOMAINS (             \
        BXT_DISPLAY_POWERWELL_2_POWER_DOMAINS |         \
        BIT_ULL(POWER_DOMAIN_GT_IRQ) |                  \
        BIT_ULL(POWER_DOMAIN_MODESET) |                 \
        BIT_ULL(POWER_DOMAIN_AUX_A) |                   \
+       BIT_ULL(POWER_DOMAIN_GMBUS) |                   \
        BIT_ULL(POWER_DOMAIN_INIT))
 #define BXT_DPIO_CMN_A_POWER_DOMAINS (                 \
        BIT_ULL(POWER_DOMAIN_PORT_DDI_A_LANES) |                \