ARM: LPC32xx: Add dt settings to the at25 node

Add the reg, cs-gpios and max-frequencies that are needed for spi
device registry in phy3250.
Adds also the pl022 internal transfers details via dt

Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com>
Signed-off-by: Roland Stigge <stigge@antcom.de>

diff --git a/arch/arm/boot/dts/phy3250.dts b/arch/arm/boot/dts/phy3250.dts
index f3bf1493afb0e84b7344abaf0192f2baf2d4bad0..802ec5b2fd00d0d40977624a9ae382b55e416b76 100644 (file)
--- a/arch/arm/boot/dts/phy3250.dts
+++ b/arch/arm/boot/dts/phy3250.dts
@@ -133,8 +133,29 @@
                        };
 
                        ssp0: ssp@20084000 {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               pl022,num-chipselects = <1>;
+                               cs-gpios = <&gpio 3 5 0>;
+
                                eeprom: at25@0 {
+                                       pl022,hierarchy = <0>;
+                                       pl022,interface = <0>;
+                                       pl022,slave-tx-disable = <0>;
+                                       pl022,com-mode = <0>;
+                                       pl022,rx-level-trig = <1>;
+                                       pl022,tx-level-trig = <1>;
+                                       pl022,ctrl-len = <11>;
+                                       pl022,wait-state = <0>;
+                                       pl022,duplex = <0>;
+
+                                       at25,byte-len = <0x8000>;
+                                       at25,addr-mode = <2>;
+                                       at25,page-size = <64>;
+
                                        compatible = "atmel,at25";
+                                       reg = <0>;
+                                       spi-max-frequency = <5000000>;
                                };
                        };