drm/amd/pp: Delete get_xclk function in powerplay (v2)

use asic's callback function get_xclk in amdgpu

v2: squash in removal of leftover debug info
(drm/amd/pp: Delete debug info in smu7_hwmgr.c) (Rex)

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
index 37098c68a645b4674a6d80587ad5c1976455e7eb..5b37c1ac725c5b13c7936f895182bd105573f11c 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c
@@ -715,12 +715,9 @@ static int amdgpu_cgs_get_active_displays_info(struct cgs_device *cgs_device,
                return -EINVAL;
 
        mode_info = info->mode_info;
-       if (mode_info) {
+       if (mode_info)
                /* if the displays are off, vblank time is max */
                mode_info->vblank_time_us = 0xffffffff;
-               /* always set the reference clock */
-               mode_info->ref_clock = adev->clock.spll.reference_freq;
-       }
 
        if (!amdgpu_device_has_dc_support(adev)) {
                struct amdgpu_crtc *amdgpu_crtc;

diff --git a/drivers/gpu/drm/amd/include/cgs_common.h b/drivers/gpu/drm/amd/include/cgs_common.h
index 860221924ef74021a9f9ec25c1ad5541ee801a4d..6ff8f35123c2051096adebae3fbbf14ce7dce759 100644 (file)
--- a/drivers/gpu/drm/amd/include/cgs_common.h
+++ b/drivers/gpu/drm/amd/include/cgs_common.h
@@ -106,7 +106,6 @@ struct cgs_firmware_info {
 
 struct cgs_mode_info {
        uint32_t                refresh_rate;
-       uint32_t                ref_clock;
        uint32_t                vblank_time_us;
 };
 

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 7a87209f725884413684a848315243e68bfaa938..478e31d5da0f0893f5adade4d9ef8bba332c0b71 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -891,30 +891,6 @@ static int smu7_setup_default_dpm_tables(struct pp_hwmgr *hwmgr)
        return 0;
 }
 
-uint32_t smu7_get_xclk(struct pp_hwmgr *hwmgr)
-{
-       uint32_t reference_clock, tmp;
-       struct cgs_display_info info = {0};
-       struct cgs_mode_info mode_info = {0};
-
-       info.mode_info = &mode_info;
-
-       tmp = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, CG_CLKPIN_CNTL_2, MUX_TCLK_TO_XCLK);
-
-       if (tmp)
-               return TCLK;
-
-       cgs_get_active_displays_info(hwmgr->device, &info);
-       reference_clock = mode_info.ref_clock;
-
-       tmp = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, CG_CLKPIN_CNTL, XTALIN_DIVIDE);
-
-       if (0 != tmp)
-               return reference_clock / 4;
-
-       return reference_clock;
-}
-
 static int smu7_enable_vrhot_gpio_interrupt(struct pp_hwmgr *hwmgr)
 {
 
@@ -3970,7 +3946,8 @@ static int smu7_program_display_gap(struct pp_hwmgr *hwmgr)
        display_gap = PHM_SET_FIELD(display_gap, CG_DISPLAY_GAP_CNTL, DISP_GAP, (num_active_displays > 0) ? DISPLAY_GAP_VBLANK_OR_WM : DISPLAY_GAP_IGNORE);
        cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_DISPLAY_GAP_CNTL, display_gap);
 
-       ref_clock = mode_info.ref_clock;
+       ref_clock =  amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);
+
        refresh_rate = mode_info.refresh_rate;
 
        if (0 == refresh_rate)

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
index 3bcfc61cd5a2fc9c7609d9f6bd6035baad5eb62c..f40179c9ca97795e94e749ca1f107711c93c31cf 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
@@ -361,7 +361,6 @@ enum SMU7_I2CLineID {
 #define SMU7_I2C_DDCVGACLK         0x4d
 
 #define SMU7_UNUSED_GPIO_PIN       0x7F
-uint32_t smu7_get_xclk(struct pp_hwmgr *hwmgr);
 uint8_t smu7_get_sleep_divider_id_from_clock(uint32_t clock,
                uint32_t clock_insr);
 #endif

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_thermal.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_thermal.c
index f6573ed0357de516ba25743599af53275c25fde5..4dd26eb731b56ebc81765adeafc2d9dbb8ad21ec 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_thermal.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_thermal.c
@@ -95,7 +95,7 @@ int smu7_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t *speed)
        if (tach_period == 0)
                return -EINVAL;
 
-       crystal_clock_freq = smu7_get_xclk(hwmgr);
+       crystal_clock_freq = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);
 
        *speed = 60 * crystal_clock_freq * 10000 / tach_period;
 
@@ -267,7 +267,7 @@ int smu7_fan_ctrl_set_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t speed)
        if (PP_CAP(PHM_PlatformCaps_MicrocodeFanControl))
                smu7_fan_ctrl_stop_smc_fan_control(hwmgr);
 
-       crystal_clock_freq = smu7_get_xclk(hwmgr);
+       crystal_clock_freq = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);
 
        tach_period = 60 * crystal_clock_freq * 10000 / (8 * speed);
 

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c
index 0147267306d32574c6c61ab187a01fe4fb919d65..444337a19eee61bb63cd28c02116d40c839d69ad 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c
@@ -110,7 +110,7 @@ int vega10_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t *speed)
                if (tach_period == 0)
                        return -EINVAL;
 
-               crystal_clock_freq = smu7_get_xclk(hwmgr);
+               crystal_clock_freq = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);
 
                *speed = 60 * crystal_clock_freq * 10000 / tach_period;
        }
@@ -331,7 +331,7 @@ int vega10_fan_ctrl_set_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t speed)
                result = vega10_fan_ctrl_stop_smc_fan_control(hwmgr);
 
        if (!result) {
-               crystal_clock_freq = smu7_get_xclk(hwmgr);
+               crystal_clock_freq = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);
                tach_period = 60 * crystal_clock_freq * 10000 / (8 * speed);
                reg = soc15_get_register_offset(THM_HWID, 0,
                                mmCG_TACH_STATUS_BASE_IDX, mmCG_TACH_STATUS);

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.h b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.h
index 82f10bdd5f07c00f42c7e0c05d6c2161159fab69..21e7c4dfa2cac69c4cfa0f296e5d172945cefa68 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.h
@@ -73,7 +73,7 @@ extern int vega10_thermal_disable_alert(struct pp_hwmgr *hwmgr);
 extern int vega10_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr);
 extern int vega10_start_thermal_controller(struct pp_hwmgr *hwmgr,
                                struct PP_TemperatureRange *range);
-extern uint32_t smu7_get_xclk(struct pp_hwmgr *hwmgr);
+
 
 #endif
 

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c
index 5d6dfdfbbbb69b3da8fadb0e4d83175f1052787b..08d000140ecabfcac8d781f656bada1ed35c6d17 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c
@@ -2222,7 +2222,7 @@ static int ci_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
 
        fan_table.TempRespLim = cpu_to_be16(5);
 
-       reference_clock = smu7_get_xclk(hwmgr);
+       reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);
 
        fan_table.RefreshPeriod = cpu_to_be32((hwmgr->thermal_controller.advanceFanControlParameters.ulCycleDelay * reference_clock) / 1600);
 

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
index 95fcda37f890fdb85fb6c2878b3199264c6f3275..43432e4c7bdc044d2bddb1b82b921aa2f457ee97 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
@@ -2254,7 +2254,7 @@ static int fiji_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
 
        fan_table.TempRespLim = cpu_to_be16(5);
 
-       reference_clock = smu7_get_xclk(hwmgr);
+       reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);
 
        fan_table.RefreshPeriod = cpu_to_be32((hwmgr->
                        thermal_controller.advanceFanControlParameters.ulCycleDelay *

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
index 4e2f62e659ef37ae601d30b7b8538a29c9f5f64f..d4bb934e733439069aa49c08a5a2dd2f3d4ffabc 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
@@ -2158,7 +2158,7 @@ int iceland_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
 
        fan_table.TempRespLim = cpu_to_be16(5);
 
-       reference_clock = smu7_get_xclk(hwmgr);
+       reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);
 
        fan_table.RefreshPeriod = cpu_to_be32((hwmgr->thermal_controller.advanceFanControlParameters.ulCycleDelay * reference_clock) / 1600);
 

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
index 03ec1e59876ba3816bbeac1e75565e039c2c0a80..f6b12980c87c8b5eab964d1c1a819448d64cc129 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
@@ -811,7 +811,7 @@ static void polaris10_get_sclk_range_table(struct pp_hwmgr *hwmgr,
 
        struct pp_atom_ctrl_sclk_range_table range_table_from_vbios = { { {0} } };
 
-       ref_clk = smu7_get_xclk(hwmgr);
+       ref_clk = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);
 
        if (0 == atomctrl_get_smc_sclk_range_table(hwmgr, &range_table_from_vbios)) {
                for (i = 0; i < NUM_SCLK_RANGE; i++) {
@@ -876,7 +876,7 @@ static int polaris10_calculate_sclk_params(struct pp_hwmgr *hwmgr,
                return result;
        }
 
-       ref_clock = smu7_get_xclk(hwmgr);
+       ref_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);
 
        for (i = 0; i < NUM_SCLK_RANGE; i++) {
                if (clock > smu_data->range_table[i].trans_lower_frequency
@@ -2132,7 +2132,7 @@ static int polaris10_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
 
        fan_table.TempRespLim = cpu_to_be16(5);
 
-       reference_clock = smu7_get_xclk(hwmgr);
+       reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);
 
        fan_table.RefreshPeriod = cpu_to_be32((hwmgr->
                        thermal_controller.advanceFanControlParameters.ulCycleDelay *

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
index 26cca8cce8f13e507b71771cdd8eced6ce6a0071..b51d7468c3e754644472151704828dfa0c652001 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
@@ -2574,7 +2574,7 @@ static int tonga_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
 
        fan_table.TempRespLim = cpu_to_be16(5);
 
-       reference_clock = smu7_get_xclk(hwmgr);
+       reference_clock = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev);
 
        fan_table.RefreshPeriod = cpu_to_be32((hwmgr->thermal_controller.advanceFanControlParameters.ulCycleDelay * reference_clock) / 1600);