pcm052: usb: fix VBUS enable mux settings and assert GPIO to enable VBUS
authorRussell Robinson Jr <rrobinson@phytec.com>
Mon, 4 Feb 2013 22:12:45 +0000 (14:12 -0800)
committerRussell Robinson Jr <rrobinson@phytec.com>
Mon, 11 Feb 2013 21:48:57 +0000 (13:48 -0800)
Signed-off-by: Russell Robinson Jr <rrobinson@phytec.com>
arch/arm/mach-mvf/board-pcm052.c
arch/arm/plat-mxc/include/mach/iomux-mvf.h

index 08b071f1dcf7d49472f80f44a2c995c9d4e972eb..85706add0494ef34119ee17a5a5ae239d2a3bdec 100644 (file)
@@ -195,7 +195,7 @@ static iomux_v3_cfg_t pcm052_pads[] = {
 #ifdef PCM952_REV0
        MVF600_PAD6_PTA16__USB0_VBUS_EN,
 #else
-       MVF600_PAD134_PTA7__USB0_VBUS_EN,
+       MVF600_PAD134_PTA7__USB_VBUS_EN,
 #endif
        MVF600_PAD7_PTA17__USB_OC_N,
 
@@ -275,7 +275,7 @@ static struct switch_platform_data switch_data __initdata = {
 };
 
 static int pcm052_spi_cs[] = {
-       134,
+       41,
 };
 
 static const struct spi_mvf_master pcm052_spi_data __initconst = {
@@ -479,13 +479,14 @@ static struct led_pwm_platform_data mvf_led_data __initdata = {
        .leds = &mvf_led,
 };
 
+#define USB_VBUS_ENABLE_PIN    134
 static void __init pcm052_init_usb(void)
 {
-       imx_otg_base = MVF_IO_ADDRESS(MVF_USBC0_BASE_ADDR);
-       /*mvf_set_otghost_vbus_func(pcm052_usbotg_vbus);*/
-#ifdef CONFIG_USB_GADGET_ARC
-       mvf_usb_dr_init();
-#endif
+       gpio_request_one(USB_VBUS_ENABLE_PIN, GPIOF_OUT_INIT_LOW, "VBUS_EN");
+       msleep(2);
+       gpio_set_value(USB_VBUS_ENABLE_PIN, 1);
+
+//     mvf_usb_dr_init();
 #ifdef CONFIG_USB_EHCI_ARC
        mvf_usb_dr2_init();
 #endif
index 05932e3af1d26647178bed15b4ed49281ff25898..eb093e2c0f7f83a8564db84de0e09626c6eddd2d 100644 (file)
@@ -195,16 +195,19 @@ typedef enum iomux_config {
                                MVF600_ENET_PAD_CTRL | PAD_CTL_OBE_ENABLE)
 
 /*USB0/1 VBUS, using the GPIO*/
-#define MVF600_PAD134_PTA7__USB0_VBUS_EN                       \
+#define MVF600_PAD134_PTA7__USB_VBUS_EN                        \
                IOMUX_PAD(0x0218, 0x0218, 0, 0x0000, 0, \
-                               MVF600_GPIO_GENERAL_CTRL | PAD_CTL_OBE_ENABLE)
+                                       PAD_CTL_PKE | PAD_CTL_PUE | \
+                                       PAD_CTL_PUS_22K_UP | PAD_CTL_DSE_25ohm | \
+                                       PAD_CTL_SPEED_LOW | PAD_CTL_OBE_ENABLE)
 #define MVF600_PAD6_PTA16__USB0_VBUS_EN                                \
                IOMUX_PAD(0x0018, 0x0018, 0, 0x0000, 0, \
-                               MVF600_GPIO_GENERAL_CTRL | PAD_CTL_OBE_ENABLE)
-
+                                        PAD_CTL_PKE | PAD_CTL_PUE | \
+                                        PAD_CTL_PUS_22K_UP | PAD_CTL_DSE_25ohm | \
+                                        PAD_CTL_SPEED_LOW | PAD_CTL_OBE_ENABLE)
 #define MVF600_PAD7_PTA17__USB_OC_N                            \
                IOMUX_PAD(0x001C, 0x001C, 2, 0x0000, 0, \
-                               PAD_CTL_DSE_20ohm | PAD_CTL_IBE_ENABLE)
+                               PAD_CTL_HYS | PAD_CTL_IBE_ENABLE)
 
 /*ESAI0(share with FEC1)*/
 #define MVF600_PAD54_PTC9__ESAI_SCKT                           \