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(parent: d065ab7) | patch
ARM: tegra: Add OF_DEV_AUXDATA for SLINK driver in board dt
authorLaxman Dewangan <ldewangan@nvidia.com>
Tue, 30 Oct 2012 07:05:24 +0000 (12:35 +0530)
committerStephen Warren <swarren@nvidia.com>
Mon, 5 Nov 2012 18:36:23 +0000 (11:36 -0700)
commitffa05e450c3ce6ece6c5e3bdfc202c86e6d4517f
treedbef1b618769de768343efa0fe61817cb318a41atree | snapshot
parentd065ab7189f368bbe9505865d63a0ebc470c409ecommit | diff
ARM: tegra: Add OF_DEV_AUXDATA for SLINK driver in board dt

Add OF_DEV_AUXDATA for slink driver for Tegra20 and Tegra30
board dt files.
Set the parent clock of slink controller to PLLP and configure
clock to 100MHz.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
arch/arm/mach-tegra/board-dt-tegra20.c diff | blob | history
arch/arm/mach-tegra/board-dt-tegra30.c diff | blob | history
Freescale DCU DRM driver