usb: tegra: fix PHY configuration
authorStefan Agner <stefan@agner.ch>
Sat, 15 Feb 2014 13:57:48 +0000 (14:57 +0100)
committerStefan Agner <stefan@agner.ch>
Sun, 16 Feb 2014 19:35:29 +0000 (20:35 +0100)
commitb832da9b8f0e8ad1bd400d2ea0a3337646967bd4
tree53a2163c4f7559e0638e01c886b5bb78e47b4dd5
parent7b1aeb18ad3291b47ae2e55ecdffe62456a2c7ad
usb: tegra: fix PHY configuration

On Tegra30 and later, the PTS (parallel transceiver select) and STS
(serial transceiver select) are part of the HOSTPC1_DEVLC_0 register
rather than PORTSC1_0 register. Since the reset configuration
usually matches the intended configuration, this error did not show
up on Tegra30 devices.

Also use the slightly different bit fields of first USB, (USBD) on
Tegra20 and move those definitions to the Tegra20 specific header
file.
arch/arm/include/asm/arch-tegra/usb.h
arch/arm/include/asm/arch-tegra20/usb.h
drivers/usb/host/ehci-tegra.c