perf/x86: Avoid exposing wrong/stale data in intel_pmu_lbr_read_32()
authorPeter Zijlstra <peterz@infradead.org>
Tue, 11 Apr 2017 08:10:28 +0000 (10:10 +0200)
committerJiri Slaby <jslaby@suse.cz>
Fri, 28 Apr 2017 17:30:42 +0000 (19:30 +0200)
commit7ac6fcfad1212f888d425ba8ac83a7826d6f5a43
treeec63c6cfe4c8d3f55f7f3ae750f7172cd271d328
parent1a9cc06dc5a94085a30d40f71e222567e2b1d9b4
perf/x86: Avoid exposing wrong/stale data in intel_pmu_lbr_read_32()

commit f2200ac311302fcdca6556fd0c5127eab6c65a3e upstream.

When the perf_branch_entry::{in_tx,abort,cycles} fields were added,
intel_pmu_lbr_read_32() wasn't updated to initialize them.

[js] there is no cycles in 3.12 yet

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Fixes: 135c5612c460 ("perf/x86/intel: Support Haswell/v4 LBR format")
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
arch/x86/kernel/cpu/perf_event_intel_lbr.c