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(parent: 64aa423) | patch
esp6: Use high-order sequence number bits for IV generation
authorHerbert Xu <herbert@gondor.apana.org.au>
Wed, 13 May 2015 07:27:18 +0000 (15:27 +0800)
committerSteffen Klassert <steffen.klassert@secunet.com>
Wed, 13 May 2015 07:34:54 +0000 (09:34 +0200)
commit6d7258ca937027ae86d6d5938d7ae10b6d68f4a4
tree2e7d96cc6907f5e7468910f33f98377b2afbe55etree | snapshot
parent64aa42338e9a88c139b89797163714f0f95f3c6bcommit | diff
esp6: Use high-order sequence number bits for IV generation

I noticed we were only using the low-order bits for IV generation
when ESN is enabled.  This is very bad because it means that the
IV can repeat.  We must use the full 64 bits.

Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Steffen Klassert <steffen.klassert@secunet.com>
net/ipv6/esp6.c diff | blob | history
Freescale DCU DRM driver