microblaze: Clear all MSR flags on the first kernel instruction
authorMichal Simek <monstr@monstr.eu>
Wed, 9 Nov 2011 14:39:58 +0000 (15:39 +0100)
committerMichal Simek <monstr@monstr.eu>
Fri, 23 Mar 2012 08:28:16 +0000 (09:28 +0100)
commit173701d7745d07888a929bf08d77d29996ca13dc
treead86f50ce8d08b4ff51e1a0adada9a62d548e3a7
parentcc5647a64e8c6691be87a83632d8b1c78b795023
microblaze: Clear all MSR flags on the first kernel instruction

The main reason is bug because of dynamic TLB allocation.
U-BOOT didn't disable dcache and then writing to physical address
from ASM wan't visible for reading through MMU.
Disabling caches and clearing all flags from previous code
is good to do so.

Signed-off-by: Michal Simek <monstr@monstr.eu>
arch/microblaze/kernel/head.S