net: mvneta: fix usage as a module on RGMII configurations

[linux.git] / drivers / bcma / driver_gpio.c

diff --git a/drivers/bcma/driver_gpio.c b/drivers/bcma/driver_gpio.c
index 45f0996a375231be24109df39f89d1ee707e1f21..25f9887a35d08e89600e8aca86fc8c72062600f6 100644 (file)
--- a/drivers/bcma/driver_gpio.c
+++ b/drivers/bcma/driver_gpio.c
@@ -9,6 +9,9 @@
  */
 
 #include <linux/gpio.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/irqdomain.h>
 #include <linux/export.h>
 #include <linux/bcma/bcma.h>
 
@@ -73,19 +76,136 @@ static void bcma_gpio_free(struct gpio_chip *chip, unsigned gpio)
        bcma_chipco_gpio_pullup(cc, 1 << gpio, 0);
 }
 
+#if IS_BUILTIN(CONFIG_BCMA_HOST_SOC)
 static int bcma_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
 {
        struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip);
 
        if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC)
-               return bcma_core_irq(cc->core);
+               return irq_find_mapping(cc->irq_domain, gpio);
        else
                return -EINVAL;
 }
 
+static void bcma_gpio_irq_unmask(struct irq_data *d)
+{
+       struct bcma_drv_cc *cc = irq_data_get_irq_chip_data(d);
+       int gpio = irqd_to_hwirq(d);
+       u32 val = bcma_chipco_gpio_in(cc, BIT(gpio));
+
+       bcma_chipco_gpio_polarity(cc, BIT(gpio), val);
+       bcma_chipco_gpio_intmask(cc, BIT(gpio), BIT(gpio));
+}
+
+static void bcma_gpio_irq_mask(struct irq_data *d)
+{
+       struct bcma_drv_cc *cc = irq_data_get_irq_chip_data(d);
+       int gpio = irqd_to_hwirq(d);
+
+       bcma_chipco_gpio_intmask(cc, BIT(gpio), 0);
+}
+
+static struct irq_chip bcma_gpio_irq_chip = {
+       .name           = "BCMA-GPIO",
+       .irq_mask       = bcma_gpio_irq_mask,
+       .irq_unmask     = bcma_gpio_irq_unmask,
+};
+
+static irqreturn_t bcma_gpio_irq_handler(int irq, void *dev_id)
+{
+       struct bcma_drv_cc *cc = dev_id;
+       u32 val = bcma_cc_read32(cc, BCMA_CC_GPIOIN);
+       u32 mask = bcma_cc_read32(cc, BCMA_CC_GPIOIRQ);
+       u32 pol = bcma_cc_read32(cc, BCMA_CC_GPIOPOL);
+       unsigned long irqs = (val ^ pol) & mask;
+       int gpio;
+
+       if (!irqs)
+               return IRQ_NONE;
+
+       for_each_set_bit(gpio, &irqs, cc->gpio.ngpio)
+               generic_handle_irq(bcma_gpio_to_irq(&cc->gpio, gpio));
+       bcma_chipco_gpio_polarity(cc, irqs, val & irqs);
+
+       return IRQ_HANDLED;
+}
+
+static int bcma_gpio_irq_domain_init(struct bcma_drv_cc *cc)
+{
+       struct gpio_chip *chip = &cc->gpio;
+       int gpio, hwirq, err;
+
+       if (cc->core->bus->hosttype != BCMA_HOSTTYPE_SOC)
+               return 0;
+
+       cc->irq_domain = irq_domain_add_linear(NULL, chip->ngpio,
+                                              &irq_domain_simple_ops, cc);
+       if (!cc->irq_domain) {
+               err = -ENODEV;
+               goto err_irq_domain;
+       }
+       for (gpio = 0; gpio < chip->ngpio; gpio++) {
+               int irq = irq_create_mapping(cc->irq_domain, gpio);
+
+               irq_set_chip_data(irq, cc);
+               irq_set_chip_and_handler(irq, &bcma_gpio_irq_chip,
+                                        handle_simple_irq);
+       }
+
+       hwirq = bcma_core_irq(cc->core);
+       err = request_irq(hwirq, bcma_gpio_irq_handler, IRQF_SHARED, "gpio",
+                         cc);
+       if (err)
+               goto err_req_irq;
+
+       bcma_chipco_gpio_intmask(cc, ~0, 0);
+       bcma_cc_set32(cc, BCMA_CC_IRQMASK, BCMA_CC_IRQ_GPIO);
+
+       return 0;
+
+err_req_irq:
+       for (gpio = 0; gpio < chip->ngpio; gpio++) {
+               int irq = irq_find_mapping(cc->irq_domain, gpio);
+
+               irq_dispose_mapping(irq);
+       }
+       irq_domain_remove(cc->irq_domain);
+err_irq_domain:
+       return err;
+}
+
+static void bcma_gpio_irq_domain_exit(struct bcma_drv_cc *cc)
+{
+       struct gpio_chip *chip = &cc->gpio;
+       int gpio;
+
+       if (cc->core->bus->hosttype != BCMA_HOSTTYPE_SOC)
+               return;
+
+       bcma_cc_mask32(cc, BCMA_CC_IRQMASK, ~BCMA_CC_IRQ_GPIO);
+       free_irq(bcma_core_irq(cc->core), cc);
+       for (gpio = 0; gpio < chip->ngpio; gpio++) {
+               int irq = irq_find_mapping(cc->irq_domain, gpio);
+
+               irq_dispose_mapping(irq);
+       }
+       irq_domain_remove(cc->irq_domain);
+}
+#else
+static int bcma_gpio_irq_domain_init(struct bcma_drv_cc *cc)
+{
+       return 0;
+}
+
+static void bcma_gpio_irq_domain_exit(struct bcma_drv_cc *cc)
+{
+}
+#endif
+
 int bcma_gpio_init(struct bcma_drv_cc *cc)
 {
        struct gpio_chip *chip = &cc->gpio;
+       int err;
 
        chip->label             = "bcma_gpio";
        chip->owner             = THIS_MODULE;
@@ -95,7 +215,9 @@ int bcma_gpio_init(struct bcma_drv_cc *cc)
        chip->set               = bcma_gpio_set_value;
        chip->direction_input   = bcma_gpio_direction_input;
        chip->direction_output  = bcma_gpio_direction_output;
+#if IS_BUILTIN(CONFIG_BCMA_HOST_SOC)
        chip->to_irq            = bcma_gpio_to_irq;
+#endif
        chip->ngpio             = 16;
        /* There is just one SoC in one device and its GPIO addresses should be
         * deterministic to address them more easily. The other buses could get
@@ -105,10 +227,21 @@ int bcma_gpio_init(struct bcma_drv_cc *cc)
        else
                chip->base              = -1;
 
-       return gpiochip_add(chip);
+       err = bcma_gpio_irq_domain_init(cc);
+       if (err)
+               return err;
+
+       err = gpiochip_add(chip);
+       if (err) {
+               bcma_gpio_irq_domain_exit(cc);
+               return err;
+       }
+
+       return 0;
 }
 
 int bcma_gpio_unregister(struct bcma_drv_cc *cc)
 {
+       bcma_gpio_irq_domain_exit(cc);
        return gpiochip_remove(&cc->gpio);
 }