Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/agpgart

[linux-drm-fsl-dcu.git] / arch / mips / au1000 / pb1100 / board_setup.c

diff --git a/arch/mips/au1000/pb1100/board_setup.c b/arch/mips/au1000/pb1100/board_setup.c
index 2d1533f116c0c020f57a4de59c952b6167f3545c..6bc1f8e1b608175b431f6927d47aa42558d8f1cc 100644 (file)
--- a/arch/mips/au1000/pb1100/board_setup.c
+++ b/arch/mips/au1000/pb1100/board_setup.c
@@ -47,8 +47,7 @@ void board_reset (void)
 
 void __init board_setup(void)
 {
-       u32 pin_func;
-       u32 sys_freqctrl, sys_clksrc;
+       volatile void __iomem * base = (volatile void __iomem *) 0xac000000UL;
 
        // set AUX clock to 12MHz * 8 = 96 MHz
        au_writel(8, SYS_AUXPLL);
@@ -56,58 +55,62 @@ void __init board_setup(void)
        udelay(100);
 
 #ifdef CONFIG_USB_OHCI
-       // configure pins GPIO[14:9] as GPIO
-       pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80);
-
-       /* zero and disable FREQ2 */
-       sys_freqctrl = au_readl(SYS_FREQCTRL0);
-       sys_freqctrl &= ~0xFFF00000;
-       au_writel(sys_freqctrl, SYS_FREQCTRL0);
-
-       /* zero and disable USBH/USBD/IrDA clock */
-       sys_clksrc = au_readl(SYS_CLKSRC);
-       sys_clksrc &= ~0x0000001F;
-       au_writel(sys_clksrc, SYS_CLKSRC);
-
-       sys_freqctrl = au_readl(SYS_FREQCTRL0);
-       sys_freqctrl &= ~0xFFF00000;
-
-       sys_clksrc = au_readl(SYS_CLKSRC);
-       sys_clksrc &= ~0x0000001F;
-
-       // FREQ2 = aux/2 = 48 MHz
-       sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
-       au_writel(sys_freqctrl, SYS_FREQCTRL0);
-
-       /*
-        * Route 48MHz FREQ2 into USBH/USBD/IrDA
-        */
-       sys_clksrc |= ((4<<2) | (0<<1) | 0 );
-       au_writel(sys_clksrc, SYS_CLKSRC);
-
-       /* setup the static bus controller */
-       au_writel(0x00000002, MEM_STCFG3);  /* type = PCMCIA */
-       au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
-       au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
-
-       // get USB Functionality pin state (device vs host drive pins)
-       pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
-       // 2nd USB port is USB host
-       pin_func |= 0x8000;
-       au_writel(pin_func, SYS_PINFUNC);
+       {
+               u32 pin_func, sys_freqctrl, sys_clksrc;
+
+               // configure pins GPIO[14:9] as GPIO
+               pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x80);
+
+               /* zero and disable FREQ2 */
+               sys_freqctrl = au_readl(SYS_FREQCTRL0);
+               sys_freqctrl &= ~0xFFF00000;
+               au_writel(sys_freqctrl, SYS_FREQCTRL0);
+
+               /* zero and disable USBH/USBD/IrDA clock */
+               sys_clksrc = au_readl(SYS_CLKSRC);
+               sys_clksrc &= ~0x0000001F;
+               au_writel(sys_clksrc, SYS_CLKSRC);
+
+               sys_freqctrl = au_readl(SYS_FREQCTRL0);
+               sys_freqctrl &= ~0xFFF00000;
+
+               sys_clksrc = au_readl(SYS_CLKSRC);
+               sys_clksrc &= ~0x0000001F;
+
+               // FREQ2 = aux/2 = 48 MHz
+               sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
+               au_writel(sys_freqctrl, SYS_FREQCTRL0);
+
+               /*
+                * Route 48MHz FREQ2 into USBH/USBD/IrDA
+                */
+               sys_clksrc |= ((4<<2) | (0<<1) | 0 );
+               au_writel(sys_clksrc, SYS_CLKSRC);
+
+               /* setup the static bus controller */
+               au_writel(0x00000002, MEM_STCFG3);  /* type = PCMCIA */
+               au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
+               au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */
+
+               // get USB Functionality pin state (device vs host drive pins)
+               pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
+               // 2nd USB port is USB host
+               pin_func |= 0x8000;
+               au_writel(pin_func, SYS_PINFUNC);
+       }
 #endif // defined (CONFIG_USB_OHCI)
 
        /* Enable sys bus clock divider when IDLE state or no bus activity. */
        au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
 
        // Enable the RTC if not already enabled
-       if (!(readb(0xac000028) & 0x20)) {
-               writeb(readb(0xac000028) | 0x20, 0xac000028);
+       if (!(readb(base + 0x28) & 0x20)) {
+               writeb(readb(base + 0x28) | 0x20, base + 0x28);
                au_sync();
        }
        // Put the clock in BCD mode
-       if (readb(0xac00002C) & 0x4) { /* reg B */
-               writeb(readb(0xac00002c) & ~0x4, 0xac00002c);
+       if (readb(base + 0x2C) & 0x4) { /* reg B */
+               writeb(readb(base + 0x2c) & ~0x4, base + 0x2c);
                au_sync();
        }
 }