Pull button into test branch

[linux-drm-fsl-dcu.git] / arch / arm / mm / proc-arm6_7.S

diff --git a/arch/arm/mm/proc-arm6_7.S b/arch/arm/mm/proc-arm6_7.S
index 7a705edfa4b22461e68106dca194c7d831d5eb70..123a7dc7a4338c395ac2ae1adc416c845d1b3bcf 100644 (file)
--- a/arch/arm/mm/proc-arm6_7.S
+++ b/arch/arm/mm/proc-arm6_7.S
@@ -15,9 +15,9 @@
 #include <linux/init.h>
 #include <asm/assembler.h>
 #include <asm/asm-offsets.h>
+#include <asm/elf.h>
 #include <asm/pgtable-hwdef.h>
 #include <asm/pgtable.h>
-#include <asm/procinfo.h>
 #include <asm/ptrace.h>
 
 ENTRY(cpu_arm6_dcache_clean_area)
@@ -209,14 +209,14 @@ ENTRY(cpu_arm7_switch_mm)
                mov     pc, lr
 
 /*
- * Function: arm6_7_set_pte(pte_t *ptep, pte_t pte)
+ * Function: arm6_7_set_pte_ext(pte_t *ptep, pte_t pte, unsigned int ext)
  * Params  : r0 = Address to set
  *        : r1 = value to set
  * Purpose : Set a PTE and flush it out of any WB cache
  */
                .align  5
-ENTRY(cpu_arm6_set_pte)
-ENTRY(cpu_arm7_set_pte)
+ENTRY(cpu_arm6_set_pte_ext)
+ENTRY(cpu_arm7_set_pte_ext)
 #ifdef CONFIG_MMU
                str     r1, [r0], #-2048                @ linux version
 
@@ -299,7 +299,7 @@ ENTRY(arm6_processor_functions)
                .word   cpu_arm6_do_idle
                .word   cpu_arm6_dcache_clean_area
                .word   cpu_arm6_switch_mm
-               .word   cpu_arm6_set_pte
+               .word   cpu_arm6_set_pte_ext
                .size   arm6_processor_functions, . - arm6_processor_functions
 
 /*
@@ -315,7 +315,7 @@ ENTRY(arm7_processor_functions)
                .word   cpu_arm7_do_idle
                .word   cpu_arm7_dcache_clean_area
                .word   cpu_arm7_switch_mm
-               .word   cpu_arm7_set_pte
+               .word   cpu_arm7_set_pte_ext
                .size   arm7_processor_functions, . - arm7_processor_functions
 
                .section ".rodata"
@@ -355,6 +355,10 @@ __arm6_proc_info:
                .long   0x41560600
                .long   0xfffffff0
                .long   0x00000c1e
+               .long   PMD_TYPE_SECT | \
+                       PMD_BIT4 | \
+                       PMD_SECT_AP_WRITE | \
+                       PMD_SECT_AP_READ
                b       __arm6_setup
                .long   cpu_arch_name
                .long   cpu_elf_name
@@ -371,6 +375,10 @@ __arm610_proc_info:
                .long   0x41560610
                .long   0xfffffff0
                .long   0x00000c1e
+               .long   PMD_TYPE_SECT | \
+                       PMD_BIT4 | \
+                       PMD_SECT_AP_WRITE | \
+                       PMD_SECT_AP_READ
                b       __arm6_setup
                .long   cpu_arch_name
                .long   cpu_elf_name
@@ -387,6 +395,10 @@ __arm7_proc_info:
                .long   0x41007000
                .long   0xffffff00
                .long   0x00000c1e
+               .long   PMD_TYPE_SECT | \
+                       PMD_BIT4 | \
+                       PMD_SECT_AP_WRITE | \
+                       PMD_SECT_AP_READ
                b       __arm7_setup
                .long   cpu_arch_name
                .long   cpu_elf_name
@@ -408,6 +420,10 @@ __arm710_proc_info:
                        PMD_BIT4 | \
                        PMD_SECT_AP_WRITE | \
                        PMD_SECT_AP_READ
+               .long   PMD_TYPE_SECT | \
+                       PMD_BIT4 | \
+                       PMD_SECT_AP_WRITE | \
+                       PMD_SECT_AP_READ
                b       __arm7_setup
                .long   cpu_arch_name
                .long   cpu_elf_name