sound/pci/hda/hda_intel.c

   1 /*
   2  *
   3  *  hda_intel.c - Implementation of primary alsa driver code base
   4  *                for Intel HD Audio.
   5  *
   6  *  Copyright(c) 2004 Intel Corporation. All rights reserved.
   7  *
   8  *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
   9  *                     PeiSen Hou <pshou@realtek.com.tw>
  10  *
  11  *  This program is free software; you can redistribute it and/or modify it
  12  *  under the terms of the GNU General Public License as published by the Free
  13  *  Software Foundation; either version 2 of the License, or (at your option)
  14  *  any later version.
  15  *
  16  *  This program is distributed in the hope that it will be useful, but WITHOUT
  17  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19  *  more details.
  20  *
  21  *  You should have received a copy of the GNU General Public License along with
  22  *  this program; if not, write to the Free Software Foundation, Inc., 59
  23  *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  24  *
  25  *  CONTACTS:
  26  *
  27  *  Matt Jared          matt.jared@intel.com
  28  *  Andy Kopp           andy.kopp@intel.com
  29  *  Dan Kogan           dan.d.kogan@intel.com
  30  *
  31  *  CHANGES:
  32  *
  33  *  2004.12.01  Major rewrite by tiwai, merged the work of pshou
  34  *
  35  */
  36
  37 #include <linux/delay.h>
  38 #include <linux/interrupt.h>
  39 #include <linux/kernel.h>
  40 #include <linux/module.h>
  41 #include <linux/dma-mapping.h>
  42 #include <linux/moduleparam.h>
  43 #include <linux/init.h>
  44 #include <linux/slab.h>
  45 #include <linux/pci.h>
  46 #include <linux/mutex.h>
  47 #include <linux/reboot.h>
  48 #include <linux/io.h>
  49 #include <linux/pm_runtime.h>
  50 #include <linux/clocksource.h>
  51 #include <linux/time.h>
  52 #include <linux/completion.h>
  53
  54 #ifdef CONFIG_X86
  55 /* for snoop control */
  56 #include <asm/pgtable.h>
  57 #include <asm/cacheflush.h>
  58 #endif
  59 #include <sound/core.h>
  60 #include <sound/initval.h>
  61 #include <linux/vgaarb.h>
  62 #include <linux/vga_switcheroo.h>
  63 #include <linux/firmware.h>
  64 #include "hda_codec.h"
  65 #include "hda_i915.h"
  66 #include "hda_controller.h"
  67 #include "hda_priv.h"
  68
  69
  70 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  71 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  72 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  73 static char *model[SNDRV_CARDS];
  74 static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
  75 static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
  76 static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
  77 static int probe_only[SNDRV_CARDS];
  78 static int jackpoll_ms[SNDRV_CARDS];
  79 static bool single_cmd;
  80 static int enable_msi = -1;
  81 #ifdef CONFIG_SND_HDA_PATCH_LOADER
  82 static char *patch[SNDRV_CARDS];
  83 #endif
  84 #ifdef CONFIG_SND_HDA_INPUT_BEEP
  85 static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
  86                                         CONFIG_SND_HDA_INPUT_BEEP_MODE};
  87 #endif
  88
  89 module_param_array(index, int, NULL, 0444);
  90 MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
  91 module_param_array(id, charp, NULL, 0444);
  92 MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
  93 module_param_array(enable, bool, NULL, 0444);
  94 MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
  95 module_param_array(model, charp, NULL, 0444);
  96 MODULE_PARM_DESC(model, "Use the given board model.");
  97 module_param_array(position_fix, int, NULL, 0444);
  98 MODULE_PARM_DESC(position_fix, "DMA pointer read method."
  99                  "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
 100 module_param_array(bdl_pos_adj, int, NULL, 0644);
 101 MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
 102 module_param_array(probe_mask, int, NULL, 0444);
 103 MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
 104 module_param_array(probe_only, int, NULL, 0444);
 105 MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
 106 module_param_array(jackpoll_ms, int, NULL, 0444);
 107 MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
 108 module_param(single_cmd, bool, 0444);
 109 MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
 110                  "(for debugging only).");
 111 module_param(enable_msi, bint, 0444);
 112 MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
 113 #ifdef CONFIG_SND_HDA_PATCH_LOADER
 114 module_param_array(patch, charp, NULL, 0444);
 115 MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
 116 #endif
 117 #ifdef CONFIG_SND_HDA_INPUT_BEEP
 118 module_param_array(beep_mode, bool, NULL, 0444);
 119 MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
 120                             "(0=off, 1=on) (default=1).");
 121 #endif
 122
 123 #ifdef CONFIG_PM
 124 static int param_set_xint(const char *val, const struct kernel_param *kp);
 125 static struct kernel_param_ops param_ops_xint = {
 126         .set = param_set_xint,
 127         .get = param_get_int,
 128 };
 129 #define param_check_xint param_check_int
 130
 131 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
 132 static int *power_save_addr = &power_save;
 133 module_param(power_save, xint, 0644);
 134 MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
 135                  "(in second, 0 = disable).");
 136
 137 /* reset the HD-audio controller in power save mode.
 138  * this may give more power-saving, but will take longer time to
 139  * wake up.
 140  */
 141 static bool power_save_controller = 1;
 142 module_param(power_save_controller, bool, 0644);
 143 MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
 144 #else
 145 static int *power_save_addr;
 146 #endif /* CONFIG_PM */
 147
 148 static int align_buffer_size = -1;
 149 module_param(align_buffer_size, bint, 0644);
 150 MODULE_PARM_DESC(align_buffer_size,
 151                 "Force buffer and period sizes to be multiple of 128 bytes.");
 152
 153 #ifdef CONFIG_X86
 154 static bool hda_snoop = true;
 155 module_param_named(snoop, hda_snoop, bool, 0444);
 156 MODULE_PARM_DESC(snoop, "Enable/disable snooping");
 157 #else
 158 #define hda_snoop               true
 159 #endif
 160
 161
 162 MODULE_LICENSE("GPL");
 163 MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
 164                          "{Intel, ICH6M},"
 165                          "{Intel, ICH7},"
 166                          "{Intel, ESB2},"
 167                          "{Intel, ICH8},"
 168                          "{Intel, ICH9},"
 169                          "{Intel, ICH10},"
 170                          "{Intel, PCH},"
 171                          "{Intel, CPT},"
 172                          "{Intel, PPT},"
 173                          "{Intel, LPT},"
 174                          "{Intel, LPT_LP},"
 175                          "{Intel, WPT_LP},"
 176                          "{Intel, HPT},"
 177                          "{Intel, PBG},"
 178                          "{Intel, SCH},"
 179                          "{ATI, SB450},"
 180                          "{ATI, SB600},"
 181                          "{ATI, RS600},"
 182                          "{ATI, RS690},"
 183                          "{ATI, RS780},"
 184                          "{ATI, R600},"
 185                          "{ATI, RV630},"
 186                          "{ATI, RV610},"
 187                          "{ATI, RV670},"
 188                          "{ATI, RV635},"
 189                          "{ATI, RV620},"
 190                          "{ATI, RV770},"
 191                          "{VIA, VT8251},"
 192                          "{VIA, VT8237A},"
 193                          "{SiS, SIS966},"
 194                          "{ULI, M5461}}");
 195 MODULE_DESCRIPTION("Intel HDA driver");
 196
 197 #if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
 198 #if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
 199 #define SUPPORT_VGA_SWITCHEROO
 200 #endif
 201 #endif
 202
 203
 204 /*
 205  */
 206
 207 /* driver types */
 208 enum {
 209         AZX_DRIVER_ICH,
 210         AZX_DRIVER_PCH,
 211         AZX_DRIVER_SCH,
 212         AZX_DRIVER_HDMI,
 213         AZX_DRIVER_ATI,
 214         AZX_DRIVER_ATIHDMI,
 215         AZX_DRIVER_ATIHDMI_NS,
 216         AZX_DRIVER_VIA,
 217         AZX_DRIVER_SIS,
 218         AZX_DRIVER_ULI,
 219         AZX_DRIVER_NVIDIA,
 220         AZX_DRIVER_TERA,
 221         AZX_DRIVER_CTX,
 222         AZX_DRIVER_CTHDA,
 223         AZX_DRIVER_GENERIC,
 224         AZX_NUM_DRIVERS, /* keep this as last entry */
 225 };
 226
 227 /* quirks for Intel PCH */
 228 #define AZX_DCAPS_INTEL_PCH_NOPM \
 229         (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_BUFSIZE | \
 230          AZX_DCAPS_COUNT_LPIB_DELAY)
 231
 232 #define AZX_DCAPS_INTEL_PCH \
 233         (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_PM_RUNTIME)
 234
 235 #define AZX_DCAPS_INTEL_HASWELL \
 236         (AZX_DCAPS_SCH_SNOOP | AZX_DCAPS_ALIGN_BUFSIZE | \
 237          AZX_DCAPS_COUNT_LPIB_DELAY | AZX_DCAPS_PM_RUNTIME | \
 238          AZX_DCAPS_I915_POWERWELL)
 239
 240 /* quirks for ATI SB / AMD Hudson */
 241 #define AZX_DCAPS_PRESET_ATI_SB \
 242         (AZX_DCAPS_ATI_SNOOP | AZX_DCAPS_NO_TCSEL | \
 243          AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB)
 244
 245 /* quirks for ATI/AMD HDMI */
 246 #define AZX_DCAPS_PRESET_ATI_HDMI \
 247         (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB)
 248
 249 /* quirks for Nvidia */
 250 #define AZX_DCAPS_PRESET_NVIDIA \
 251         (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\
 252          AZX_DCAPS_ALIGN_BUFSIZE | AZX_DCAPS_NO_64BIT)
 253
 254 #define AZX_DCAPS_PRESET_CTHDA \
 255         (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_4K_BDLE_BOUNDARY)
 256
 257 /*
 258  * VGA-switcher support
 259  */
 260 #ifdef SUPPORT_VGA_SWITCHEROO
 261 #define use_vga_switcheroo(chip)        ((chip)->use_vga_switcheroo)
 262 #else
 263 #define use_vga_switcheroo(chip)        0
 264 #endif
 265
 266 static char *driver_short_names[] = {
 267         [AZX_DRIVER_ICH] = "HDA Intel",
 268         [AZX_DRIVER_PCH] = "HDA Intel PCH",
 269         [AZX_DRIVER_SCH] = "HDA Intel MID",
 270         [AZX_DRIVER_HDMI] = "HDA Intel HDMI",
 271         [AZX_DRIVER_ATI] = "HDA ATI SB",
 272         [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
 273         [AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
 274         [AZX_DRIVER_VIA] = "HDA VIA VT82xx",
 275         [AZX_DRIVER_SIS] = "HDA SIS966",
 276         [AZX_DRIVER_ULI] = "HDA ULI M5461",
 277         [AZX_DRIVER_NVIDIA] = "HDA NVidia",
 278         [AZX_DRIVER_TERA] = "HDA Teradici",
 279         [AZX_DRIVER_CTX] = "HDA Creative",
 280         [AZX_DRIVER_CTHDA] = "HDA Creative",
 281         [AZX_DRIVER_GENERIC] = "HD-Audio Generic",
 282 };
 283
 284 #ifdef CONFIG_X86
 285 static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
 286 {
 287         int pages;
 288
 289         if (azx_snoop(chip))
 290                 return;
 291         if (!dmab || !dmab->area || !dmab->bytes)
 292                 return;
 293
 294 #ifdef CONFIG_SND_DMA_SGBUF
 295         if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
 296                 struct snd_sg_buf *sgbuf = dmab->private_data;
 297                 if (on)
 298                         set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
 299                 else
 300                         set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
 301                 return;
 302         }
 303 #endif
 304
 305         pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
 306         if (on)
 307                 set_memory_wc((unsigned long)dmab->area, pages);
 308         else
 309                 set_memory_wb((unsigned long)dmab->area, pages);
 310 }
 311
 312 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
 313                                  bool on)
 314 {
 315         __mark_pages_wc(chip, buf, on);
 316 }
 317 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
 318                                    struct snd_pcm_substream *substream, bool on)
 319 {
 320         if (azx_dev->wc_marked != on) {
 321                 __mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
 322                 azx_dev->wc_marked = on;
 323         }
 324 }
 325 #else
 326 /* NOP for other archs */
 327 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
 328                                  bool on)
 329 {
 330 }
 331 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
 332                                    struct snd_pcm_substream *substream, bool on)
 333 {
 334 }
 335 #endif
 336
 337 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
 338
 339 /*
 340  * initialize the PCI registers
 341  */
 342 /* update bits in a PCI register byte */
 343 static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
 344                             unsigned char mask, unsigned char val)
 345 {
 346         unsigned char data;
 347
 348         pci_read_config_byte(pci, reg, &data);
 349         data &= ~mask;
 350         data |= (val & mask);
 351         pci_write_config_byte(pci, reg, data);
 352 }
 353
 354 static void azx_init_pci(struct azx *chip)
 355 {
 356         /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
 357          * TCSEL == Traffic Class Select Register, which sets PCI express QOS
 358          * Ensuring these bits are 0 clears playback static on some HD Audio
 359          * codecs.
 360          * The PCI register TCSEL is defined in the Intel manuals.
 361          */
 362         if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
 363                 dev_dbg(chip->card->dev, "Clearing TCSEL\n");
 364                 update_pci_byte(chip->pci, ICH6_PCIREG_TCSEL, 0x07, 0);
 365         }
 366
 367         /* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
 368          * we need to enable snoop.
 369          */
 370         if (chip->driver_caps & AZX_DCAPS_ATI_SNOOP) {
 371                 dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
 372                         azx_snoop(chip));
 373                 update_pci_byte(chip->pci,
 374                                 ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
 375                                 azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
 376         }
 377
 378         /* For NVIDIA HDA, enable snoop */
 379         if (chip->driver_caps & AZX_DCAPS_NVIDIA_SNOOP) {
 380                 dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
 381                         azx_snoop(chip));
 382                 update_pci_byte(chip->pci,
 383                                 NVIDIA_HDA_TRANSREG_ADDR,
 384                                 0x0f, NVIDIA_HDA_ENABLE_COHBITS);
 385                 update_pci_byte(chip->pci,
 386                                 NVIDIA_HDA_ISTRM_COH,
 387                                 0x01, NVIDIA_HDA_ENABLE_COHBIT);
 388                 update_pci_byte(chip->pci,
 389                                 NVIDIA_HDA_OSTRM_COH,
 390                                 0x01, NVIDIA_HDA_ENABLE_COHBIT);
 391         }
 392
 393         /* Enable SCH/PCH snoop if needed */
 394         if (chip->driver_caps & AZX_DCAPS_SCH_SNOOP) {
 395                 unsigned short snoop;
 396                 pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
 397                 if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
 398                     (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
 399                         snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
 400                         if (!azx_snoop(chip))
 401                                 snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
 402                         pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
 403                         pci_read_config_word(chip->pci,
 404                                 INTEL_SCH_HDA_DEVC, &snoop);
 405                 }
 406                 dev_dbg(chip->card->dev, "SCH snoop: %s\n",
 407                         (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
 408                         "Disabled" : "Enabled");
 409         }
 410 }
 411
 412 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);
 413
 414 /* called from IRQ */
 415 static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
 416 {
 417         int ok;
 418
 419         ok = azx_position_ok(chip, azx_dev);
 420         if (ok == 1) {
 421                 azx_dev->irq_pending = 0;
 422                 return ok;
 423         } else if (ok == 0 && chip->bus && chip->bus->workq) {
 424                 /* bogus IRQ, process it later */
 425                 azx_dev->irq_pending = 1;
 426                 queue_work(chip->bus->workq, &chip->irq_pending_work);
 427         }
 428         return 0;
 429 }
 430
 431 /*
 432  * Check whether the current DMA position is acceptable for updating
 433  * periods.  Returns non-zero if it's OK.
 434  *
 435  * Many HD-audio controllers appear pretty inaccurate about
 436  * the update-IRQ timing.  The IRQ is issued before actually the
 437  * data is processed.  So, we need to process it afterwords in a
 438  * workqueue.
 439  */
 440 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
 441 {
 442         u32 wallclk;
 443         unsigned int pos;
 444
 445         wallclk = azx_readl(chip, WALLCLK) - azx_dev->start_wallclk;
 446         if (wallclk < (azx_dev->period_wallclk * 2) / 3)
 447                 return -1;      /* bogus (too early) interrupt */
 448
 449         pos = azx_get_position(chip, azx_dev, true);
 450
 451         if (WARN_ONCE(!azx_dev->period_bytes,
 452                       "hda-intel: zero azx_dev->period_bytes"))
 453                 return -1; /* this shouldn't happen! */
 454         if (wallclk < (azx_dev->period_wallclk * 5) / 4 &&
 455             pos % azx_dev->period_bytes > azx_dev->period_bytes / 2)
 456                 /* NG - it's below the first next period boundary */
 457                 return chip->bdl_pos_adj[chip->dev_index] ? 0 : -1;
 458         azx_dev->start_wallclk += wallclk;
 459         return 1; /* OK, it's fine */
 460 }
 461
 462 /*
 463  * The work for pending PCM period updates.
 464  */
 465 static void azx_irq_pending_work(struct work_struct *work)
 466 {
 467         struct azx *chip = container_of(work, struct azx, irq_pending_work);
 468         int i, pending, ok;
 469
 470         if (!chip->irq_pending_warned) {
 471                 dev_info(chip->card->dev,
 472                          "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
 473                          chip->card->number);
 474                 chip->irq_pending_warned = 1;
 475         }
 476
 477         for (;;) {
 478                 pending = 0;
 479                 spin_lock_irq(&chip->reg_lock);
 480                 for (i = 0; i < chip->num_streams; i++) {
 481                         struct azx_dev *azx_dev = &chip->azx_dev[i];
 482                         if (!azx_dev->irq_pending ||
 483                             !azx_dev->substream ||
 484                             !azx_dev->running)
 485                                 continue;
 486                         ok = azx_position_ok(chip, azx_dev);
 487                         if (ok > 0) {
 488                                 azx_dev->irq_pending = 0;
 489                                 spin_unlock(&chip->reg_lock);
 490                                 snd_pcm_period_elapsed(azx_dev->substream);
 491                                 spin_lock(&chip->reg_lock);
 492                         } else if (ok < 0) {
 493                                 pending = 0;    /* too early */
 494                         } else
 495                                 pending++;
 496                 }
 497                 spin_unlock_irq(&chip->reg_lock);
 498                 if (!pending)
 499                         return;
 500                 msleep(1);
 501         }
 502 }
 503
 504 /* clear irq_pending flags and assure no on-going workq */
 505 static void azx_clear_irq_pending(struct azx *chip)
 506 {
 507         int i;
 508
 509         spin_lock_irq(&chip->reg_lock);
 510         for (i = 0; i < chip->num_streams; i++)
 511                 chip->azx_dev[i].irq_pending = 0;
 512         spin_unlock_irq(&chip->reg_lock);
 513 }
 514
 515 static int azx_acquire_irq(struct azx *chip, int do_disconnect)
 516 {
 517         if (request_irq(chip->pci->irq, azx_interrupt,
 518                         chip->msi ? 0 : IRQF_SHARED,
 519                         KBUILD_MODNAME, chip)) {
 520                 dev_err(chip->card->dev,
 521                         "unable to grab IRQ %d, disabling device\n",
 522                         chip->pci->irq);
 523                 if (do_disconnect)
 524                         snd_card_disconnect(chip->card);
 525                 return -1;
 526         }
 527         chip->irq = chip->pci->irq;
 528         pci_intx(chip->pci, !chip->msi);
 529         return 0;
 530 }
 531
 532 #ifdef CONFIG_PM
 533 static DEFINE_MUTEX(card_list_lock);
 534 static LIST_HEAD(card_list);
 535
 536 static void azx_add_card_list(struct azx *chip)
 537 {
 538         mutex_lock(&card_list_lock);
 539         list_add(&chip->list, &card_list);
 540         mutex_unlock(&card_list_lock);
 541 }
 542
 543 static void azx_del_card_list(struct azx *chip)
 544 {
 545         mutex_lock(&card_list_lock);
 546         list_del_init(&chip->list);
 547         mutex_unlock(&card_list_lock);
 548 }
 549
 550 /* trigger power-save check at writing parameter */
 551 static int param_set_xint(const char *val, const struct kernel_param *kp)
 552 {
 553         struct azx *chip;
 554         struct hda_codec *c;
 555         int prev = power_save;
 556         int ret = param_set_int(val, kp);
 557
 558         if (ret || prev == power_save)
 559                 return ret;
 560
 561         mutex_lock(&card_list_lock);
 562         list_for_each_entry(chip, &card_list, list) {
 563                 if (!chip->bus || chip->disabled)
 564                         continue;
 565                 list_for_each_entry(c, &chip->bus->codec_list, list)
 566                         snd_hda_power_sync(c);
 567         }
 568         mutex_unlock(&card_list_lock);
 569         return 0;
 570 }
 571 #else
 572 #define azx_add_card_list(chip) /* NOP */
 573 #define azx_del_card_list(chip) /* NOP */
 574 #endif /* CONFIG_PM */
 575
 576 #if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
 577 /*
 578  * power management
 579  */
 580 static int azx_suspend(struct device *dev)
 581 {
 582         struct pci_dev *pci = to_pci_dev(dev);
 583         struct snd_card *card = dev_get_drvdata(dev);
 584         struct azx *chip = card->private_data;
 585         struct azx_pcm *p;
 586
 587         if (chip->disabled)
 588                 return 0;
 589
 590         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
 591         azx_clear_irq_pending(chip);
 592         list_for_each_entry(p, &chip->pcm_list, list)
 593                 snd_pcm_suspend_all(p->pcm);
 594         if (chip->initialized)
 595                 snd_hda_suspend(chip->bus);
 596         azx_stop_chip(chip);
 597         azx_enter_link_reset(chip);
 598         if (chip->irq >= 0) {
 599                 free_irq(chip->irq, chip);
 600                 chip->irq = -1;
 601         }
 602         if (chip->msi)
 603                 pci_disable_msi(chip->pci);
 604         pci_disable_device(pci);
 605         pci_save_state(pci);
 606         pci_set_power_state(pci, PCI_D3hot);
 607         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
 608                 hda_display_power(false);
 609         return 0;
 610 }
 611
 612 static int azx_resume(struct device *dev)
 613 {
 614         struct pci_dev *pci = to_pci_dev(dev);
 615         struct snd_card *card = dev_get_drvdata(dev);
 616         struct azx *chip = card->private_data;
 617
 618         if (chip->disabled)
 619                 return 0;
 620
 621         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
 622                 hda_display_power(true);
 623         pci_set_power_state(pci, PCI_D0);
 624         pci_restore_state(pci);
 625         if (pci_enable_device(pci) < 0) {
 626                 dev_err(chip->card->dev,
 627                         "pci_enable_device failed, disabling device\n");
 628                 snd_card_disconnect(card);
 629                 return -EIO;
 630         }
 631         pci_set_master(pci);
 632         if (chip->msi)
 633                 if (pci_enable_msi(pci) < 0)
 634                         chip->msi = 0;
 635         if (azx_acquire_irq(chip, 1) < 0)
 636                 return -EIO;
 637         azx_init_pci(chip);
 638
 639         azx_init_chip(chip, true);
 640
 641         snd_hda_resume(chip->bus);
 642         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
 643         return 0;
 644 }
 645 #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */
 646
 647 #ifdef CONFIG_PM_RUNTIME
 648 static int azx_runtime_suspend(struct device *dev)
 649 {
 650         struct snd_card *card = dev_get_drvdata(dev);
 651         struct azx *chip = card->private_data;
 652
 653         if (chip->disabled)
 654                 return 0;
 655
 656         if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
 657                 return 0;
 658
 659         /* enable controller wake up event */
 660         azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
 661                   STATESTS_INT_MASK);
 662
 663         azx_stop_chip(chip);
 664         azx_enter_link_reset(chip);
 665         azx_clear_irq_pending(chip);
 666         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
 667                 hda_display_power(false);
 668         return 0;
 669 }
 670
 671 static int azx_runtime_resume(struct device *dev)
 672 {
 673         struct snd_card *card = dev_get_drvdata(dev);
 674         struct azx *chip = card->private_data;
 675         struct hda_bus *bus;
 676         struct hda_codec *codec;
 677         int status;
 678
 679         if (chip->disabled)
 680                 return 0;
 681
 682         if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
 683                 return 0;
 684
 685         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
 686                 hda_display_power(true);
 687
 688         /* Read STATESTS before controller reset */
 689         status = azx_readw(chip, STATESTS);
 690
 691         azx_init_pci(chip);
 692         azx_init_chip(chip, true);
 693
 694         bus = chip->bus;
 695         if (status && bus) {
 696                 list_for_each_entry(codec, &bus->codec_list, list)
 697                         if (status & (1 << codec->addr))
 698                                 queue_delayed_work(codec->bus->workq,
 699                                                    &codec->jackpoll_work, codec->jackpoll_interval);
 700         }
 701
 702         /* disable controller Wake Up event*/
 703         azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
 704                         ~STATESTS_INT_MASK);
 705
 706         return 0;
 707 }
 708
 709 static int azx_runtime_idle(struct device *dev)
 710 {
 711         struct snd_card *card = dev_get_drvdata(dev);
 712         struct azx *chip = card->private_data;
 713
 714         if (chip->disabled)
 715                 return 0;
 716
 717         if (!power_save_controller ||
 718             !(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
 719                 return -EBUSY;
 720
 721         return 0;
 722 }
 723
 724 #endif /* CONFIG_PM_RUNTIME */
 725
 726 #ifdef CONFIG_PM
 727 static const struct dev_pm_ops azx_pm = {
 728         SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
 729         SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
 730 };
 731
 732 #define AZX_PM_OPS      &azx_pm
 733 #else
 734 #define AZX_PM_OPS      NULL
 735 #endif /* CONFIG_PM */
 736
 737
 738 /*
 739  * reboot notifier for hang-up problem at power-down
 740  */
 741 static int azx_halt(struct notifier_block *nb, unsigned long event, void *buf)
 742 {
 743         struct azx *chip = container_of(nb, struct azx, reboot_notifier);
 744         snd_hda_bus_reboot_notify(chip->bus);
 745         azx_stop_chip(chip);
 746         return NOTIFY_OK;
 747 }
 748
 749 static void azx_notifier_register(struct azx *chip)
 750 {
 751         chip->reboot_notifier.notifier_call = azx_halt;
 752         register_reboot_notifier(&chip->reboot_notifier);
 753 }
 754
 755 static void azx_notifier_unregister(struct azx *chip)
 756 {
 757         if (chip->reboot_notifier.notifier_call)
 758                 unregister_reboot_notifier(&chip->reboot_notifier);
 759 }
 760
 761 static int azx_probe_continue(struct azx *chip);
 762
 763 #ifdef SUPPORT_VGA_SWITCHEROO
 764 static struct pci_dev *get_bound_vga(struct pci_dev *pci);
 765
 766 static void azx_vs_set_state(struct pci_dev *pci,
 767                              enum vga_switcheroo_state state)
 768 {
 769         struct snd_card *card = pci_get_drvdata(pci);
 770         struct azx *chip = card->private_data;
 771         bool disabled;
 772
 773         wait_for_completion(&chip->probe_wait);
 774         if (chip->init_failed)
 775                 return;
 776
 777         disabled = (state == VGA_SWITCHEROO_OFF);
 778         if (chip->disabled == disabled)
 779                 return;
 780
 781         if (!chip->bus) {
 782                 chip->disabled = disabled;
 783                 if (!disabled) {
 784                         dev_info(chip->card->dev,
 785                                  "Start delayed initialization\n");
 786                         if (azx_probe_continue(chip) < 0) {
 787                                 dev_err(chip->card->dev, "initialization error\n");
 788                                 chip->init_failed = true;
 789                         }
 790                 }
 791         } else {
 792                 dev_info(chip->card->dev, "%s via VGA-switcheroo\n",
 793                          disabled ? "Disabling" : "Enabling");
 794                 if (disabled) {
 795                         pm_runtime_put_sync_suspend(card->dev);
 796                         azx_suspend(card->dev);
 797                         /* when we get suspended by vga switcheroo we end up in D3cold,
 798                          * however we have no ACPI handle, so pci/acpi can't put us there,
 799                          * put ourselves there */
 800                         pci->current_state = PCI_D3cold;
 801                         chip->disabled = true;
 802                         if (snd_hda_lock_devices(chip->bus))
 803                                 dev_warn(chip->card->dev,
 804                                          "Cannot lock devices!\n");
 805                 } else {
 806                         snd_hda_unlock_devices(chip->bus);
 807                         pm_runtime_get_noresume(card->dev);
 808                         chip->disabled = false;
 809                         azx_resume(card->dev);
 810                 }
 811         }
 812 }
 813
 814 static bool azx_vs_can_switch(struct pci_dev *pci)
 815 {
 816         struct snd_card *card = pci_get_drvdata(pci);
 817         struct azx *chip = card->private_data;
 818
 819         wait_for_completion(&chip->probe_wait);
 820         if (chip->init_failed)
 821                 return false;
 822         if (chip->disabled || !chip->bus)
 823                 return true;
 824         if (snd_hda_lock_devices(chip->bus))
 825                 return false;
 826         snd_hda_unlock_devices(chip->bus);
 827         return true;
 828 }
 829
 830 static void init_vga_switcheroo(struct azx *chip)
 831 {
 832         struct pci_dev *p = get_bound_vga(chip->pci);
 833         if (p) {
 834                 dev_info(chip->card->dev,
 835                          "Handle VGA-switcheroo audio client\n");
 836                 chip->use_vga_switcheroo = 1;
 837                 pci_dev_put(p);
 838         }
 839 }
 840
 841 static const struct vga_switcheroo_client_ops azx_vs_ops = {
 842         .set_gpu_state = azx_vs_set_state,
 843         .can_switch = azx_vs_can_switch,
 844 };
 845
 846 static int register_vga_switcheroo(struct azx *chip)
 847 {
 848         int err;
 849
 850         if (!chip->use_vga_switcheroo)
 851                 return 0;
 852         /* FIXME: currently only handling DIS controller
 853          * is there any machine with two switchable HDMI audio controllers?
 854          */
 855         err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
 856                                                     VGA_SWITCHEROO_DIS,
 857                                                     chip->bus != NULL);
 858         if (err < 0)
 859                 return err;
 860         chip->vga_switcheroo_registered = 1;
 861
 862         /* register as an optimus hdmi audio power domain */
 863         vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip->card->dev,
 864                                                          &chip->hdmi_pm_domain);
 865         return 0;
 866 }
 867 #else
 868 #define init_vga_switcheroo(chip)               /* NOP */
 869 #define register_vga_switcheroo(chip)           0
 870 #define check_hdmi_disabled(pci)        false
 871 #endif /* SUPPORT_VGA_SWITCHER */
 872
 873 /*
 874  * destructor
 875  */
 876 static int azx_free(struct azx *chip)
 877 {
 878         struct pci_dev *pci = chip->pci;
 879         int i;
 880
 881         if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME)
 882                         && chip->running)
 883                 pm_runtime_get_noresume(&pci->dev);
 884
 885         azx_del_card_list(chip);
 886
 887         azx_notifier_unregister(chip);
 888
 889         chip->init_failed = 1; /* to be sure */
 890         complete_all(&chip->probe_wait);
 891
 892         if (use_vga_switcheroo(chip)) {
 893                 if (chip->disabled && chip->bus)
 894                         snd_hda_unlock_devices(chip->bus);
 895                 if (chip->vga_switcheroo_registered)
 896                         vga_switcheroo_unregister_client(chip->pci);
 897         }
 898
 899         if (chip->initialized) {
 900                 azx_clear_irq_pending(chip);
 901                 for (i = 0; i < chip->num_streams; i++)
 902                         azx_stream_stop(chip, &chip->azx_dev[i]);
 903                 azx_stop_chip(chip);
 904         }
 905
 906         if (chip->irq >= 0)
 907                 free_irq(chip->irq, (void*)chip);
 908         if (chip->msi)
 909                 pci_disable_msi(chip->pci);
 910         if (chip->remap_addr)
 911                 iounmap(chip->remap_addr);
 912
 913         azx_free_stream_pages(chip);
 914         if (chip->region_requested)
 915                 pci_release_regions(chip->pci);
 916         pci_disable_device(chip->pci);
 917         kfree(chip->azx_dev);
 918 #ifdef CONFIG_SND_HDA_PATCH_LOADER
 919         if (chip->fw)
 920                 release_firmware(chip->fw);
 921 #endif
 922         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
 923                 hda_display_power(false);
 924                 hda_i915_exit();
 925         }
 926         kfree(chip);
 927
 928         return 0;
 929 }
 930
 931 static int azx_dev_free(struct snd_device *device)
 932 {
 933         return azx_free(device->device_data);
 934 }
 935
 936 #ifdef SUPPORT_VGA_SWITCHEROO
 937 /*
 938  * Check of disabled HDMI controller by vga-switcheroo
 939  */
 940 static struct pci_dev *get_bound_vga(struct pci_dev *pci)
 941 {
 942         struct pci_dev *p;
 943
 944         /* check only discrete GPU */
 945         switch (pci->vendor) {
 946         case PCI_VENDOR_ID_ATI:
 947         case PCI_VENDOR_ID_AMD:
 948         case PCI_VENDOR_ID_NVIDIA:
 949                 if (pci->devfn == 1) {
 950                         p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
 951                                                         pci->bus->number, 0);
 952                         if (p) {
 953                                 if ((p->class >> 8) == PCI_CLASS_DISPLAY_VGA)
 954                                         return p;
 955                                 pci_dev_put(p);
 956                         }
 957                 }
 958                 break;
 959         }
 960         return NULL;
 961 }
 962
 963 static bool check_hdmi_disabled(struct pci_dev *pci)
 964 {
 965         bool vga_inactive = false;
 966         struct pci_dev *p = get_bound_vga(pci);
 967
 968         if (p) {
 969                 if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
 970                         vga_inactive = true;
 971                 pci_dev_put(p);
 972         }
 973         return vga_inactive;
 974 }
 975 #endif /* SUPPORT_VGA_SWITCHEROO */
 976
 977 /*
 978  * white/black-listing for position_fix
 979  */
 980 static struct snd_pci_quirk position_fix_list[] = {
 981         SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
 982         SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
 983         SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
 984         SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
 985         SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
 986         SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
 987         SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
 988         SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
 989         SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
 990         SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
 991         SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
 992         SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
 993         SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
 994         SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
 995         {}
 996 };
 997
 998 static int check_position_fix(struct azx *chip, int fix)
 999 {
1000         const struct snd_pci_quirk *q;
1001
1002         switch (fix) {
1003         case POS_FIX_AUTO:
1004         case POS_FIX_LPIB:
1005         case POS_FIX_POSBUF:
1006         case POS_FIX_VIACOMBO:
1007         case POS_FIX_COMBO:
1008                 return fix;
1009         }
1010
1011         q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
1012         if (q) {
1013                 dev_info(chip->card->dev,
1014                          "position_fix set to %d for device %04x:%04x\n",
1015                          q->value, q->subvendor, q->subdevice);
1016                 return q->value;
1017         }
1018
1019         /* Check VIA/ATI HD Audio Controller exist */
1020         if (chip->driver_caps & AZX_DCAPS_POSFIX_VIA) {
1021                 dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1022                 return POS_FIX_VIACOMBO;
1023         }
1024         if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1025                 dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1026                 return POS_FIX_LPIB;
1027         }
1028         return POS_FIX_AUTO;
1029 }
1030
1031 /*
1032  * black-lists for probe_mask
1033  */
1034 static struct snd_pci_quirk probe_mask_list[] = {
1035         /* Thinkpad often breaks the controller communication when accessing
1036          * to the non-working (or non-existing) modem codec slot.
1037          */
1038         SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
1039         SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
1040         SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1041         /* broken BIOS */
1042         SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1043         /* including bogus ALC268 in slot#2 that conflicts with ALC888 */
1044         SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1045         /* forced codec slots */
1046         SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1047         SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1048         /* WinFast VP200 H (Teradici) user reported broken communication */
1049         SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1050         {}
1051 };
1052
1053 #define AZX_FORCE_CODEC_MASK    0x100
1054
1055 static void check_probe_mask(struct azx *chip, int dev)
1056 {
1057         const struct snd_pci_quirk *q;
1058
1059         chip->codec_probe_mask = probe_mask[dev];
1060         if (chip->codec_probe_mask == -1) {
1061                 q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
1062                 if (q) {
1063                         dev_info(chip->card->dev,
1064                                  "probe_mask set to 0x%x for device %04x:%04x\n",
1065                                  q->value, q->subvendor, q->subdevice);
1066                         chip->codec_probe_mask = q->value;
1067                 }
1068         }
1069
1070         /* check forced option */
1071         if (chip->codec_probe_mask != -1 &&
1072             (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1073                 chip->codec_mask = chip->codec_probe_mask & 0xff;
1074                 dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1075                          chip->codec_mask);
1076         }
1077 }
1078
1079 /*
1080  * white/black-list for enable_msi
1081  */
1082 static struct snd_pci_quirk msi_black_list[] = {
1083         SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
1084         SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
1085         SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
1086         SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
1087         SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1088         SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1089         SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1090         SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1091         SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1092         SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1093         {}
1094 };
1095
1096 static void check_msi(struct azx *chip)
1097 {
1098         const struct snd_pci_quirk *q;
1099
1100         if (enable_msi >= 0) {
1101                 chip->msi = !!enable_msi;
1102                 return;
1103         }
1104         chip->msi = 1;  /* enable MSI as default */
1105         q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1106         if (q) {
1107                 dev_info(chip->card->dev,
1108                          "msi for device %04x:%04x set to %d\n",
1109                          q->subvendor, q->subdevice, q->value);
1110                 chip->msi = q->value;
1111                 return;
1112         }
1113
1114         /* NVidia chipsets seem to cause troubles with MSI */
1115         if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1116                 dev_info(chip->card->dev, "Disabling MSI\n");
1117                 chip->msi = 0;
1118         }
1119 }
1120
1121 /* check the snoop mode availability */
1122 static void azx_check_snoop_available(struct azx *chip)
1123 {
1124         bool snoop = chip->snoop;
1125
1126         switch (chip->driver_type) {
1127         case AZX_DRIVER_VIA:
1128                 /* force to non-snoop mode for a new VIA controller
1129                  * when BIOS is set
1130                  */
1131                 if (snoop) {
1132                         u8 val;
1133                         pci_read_config_byte(chip->pci, 0x42, &val);
1134                         if (!(val & 0x80) && chip->pci->revision == 0x30)
1135                                 snoop = false;
1136                 }
1137                 break;
1138         case AZX_DRIVER_ATIHDMI_NS:
1139                 /* new ATI HDMI requires non-snoop */
1140                 snoop = false;
1141                 break;
1142         case AZX_DRIVER_CTHDA:
1143                 snoop = false;
1144                 break;
1145         }
1146
1147         if (snoop != chip->snoop) {
1148                 dev_info(chip->card->dev, "Force to %s mode\n",
1149                          snoop ? "snoop" : "non-snoop");
1150                 chip->snoop = snoop;
1151         }
1152 }
1153
1154 static void azx_probe_work(struct work_struct *work)
1155 {
1156         azx_probe_continue(container_of(work, struct azx, probe_work));
1157 }
1158
1159 /*
1160  * constructor
1161  */
1162 static int azx_create(struct snd_card *card, struct pci_dev *pci,
1163                       int dev, unsigned int driver_caps,
1164                       const struct hda_controller_ops *hda_ops,
1165                       struct azx **rchip)
1166 {
1167         static struct snd_device_ops ops = {
1168                 .dev_free = azx_dev_free,
1169         };
1170         struct azx *chip;
1171         int err;
1172
1173         *rchip = NULL;
1174
1175         err = pci_enable_device(pci);
1176         if (err < 0)
1177                 return err;
1178
1179         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1180         if (!chip) {
1181                 dev_err(card->dev, "Cannot allocate chip\n");
1182                 pci_disable_device(pci);
1183                 return -ENOMEM;
1184         }
1185
1186         spin_lock_init(&chip->reg_lock);
1187         mutex_init(&chip->open_mutex);
1188         chip->card = card;
1189         chip->pci = pci;
1190         chip->ops = hda_ops;
1191         chip->irq = -1;
1192         chip->driver_caps = driver_caps;
1193         chip->driver_type = driver_caps & 0xff;
1194         check_msi(chip);
1195         chip->dev_index = dev;
1196         chip->jackpoll_ms = jackpoll_ms;
1197         INIT_WORK(&chip->irq_pending_work, azx_irq_pending_work);
1198         INIT_LIST_HEAD(&chip->pcm_list);
1199         INIT_LIST_HEAD(&chip->list);
1200         init_vga_switcheroo(chip);
1201         init_completion(&chip->probe_wait);
1202
1203         chip->position_fix[0] = chip->position_fix[1] =
1204                 check_position_fix(chip, position_fix[dev]);
1205         /* combo mode uses LPIB for playback */
1206         if (chip->position_fix[0] == POS_FIX_COMBO) {
1207                 chip->position_fix[0] = POS_FIX_LPIB;
1208                 chip->position_fix[1] = POS_FIX_AUTO;
1209         }
1210
1211         check_probe_mask(chip, dev);
1212
1213         chip->single_cmd = single_cmd;
1214         chip->snoop = hda_snoop;
1215         azx_check_snoop_available(chip);
1216
1217         if (bdl_pos_adj[dev] < 0) {
1218                 switch (chip->driver_type) {
1219                 case AZX_DRIVER_ICH:
1220                 case AZX_DRIVER_PCH:
1221                         bdl_pos_adj[dev] = 1;
1222                         break;
1223                 default:
1224                         bdl_pos_adj[dev] = 32;
1225                         break;
1226                 }
1227         }
1228         chip->bdl_pos_adj = bdl_pos_adj;
1229
1230         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1231         if (err < 0) {
1232                 dev_err(card->dev, "Error creating device [card]!\n");
1233                 azx_free(chip);
1234                 return err;
1235         }
1236
1237         /* continue probing in work context as may trigger request module */
1238         INIT_WORK(&chip->probe_work, azx_probe_work);
1239
1240         *rchip = chip;
1241
1242         return 0;
1243 }
1244
1245 static int azx_first_init(struct azx *chip)
1246 {
1247         int dev = chip->dev_index;
1248         struct pci_dev *pci = chip->pci;
1249         struct snd_card *card = chip->card;
1250         int err;
1251         unsigned short gcap;
1252
1253 #if BITS_PER_LONG != 64
1254         /* Fix up base address on ULI M5461 */
1255         if (chip->driver_type == AZX_DRIVER_ULI) {
1256                 u16 tmp3;
1257                 pci_read_config_word(pci, 0x40, &tmp3);
1258                 pci_write_config_word(pci, 0x40, tmp3 | 0x10);
1259                 pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
1260         }
1261 #endif
1262
1263         err = pci_request_regions(pci, "ICH HD audio");
1264         if (err < 0)
1265                 return err;
1266         chip->region_requested = 1;
1267
1268         chip->addr = pci_resource_start(pci, 0);
1269         chip->remap_addr = pci_ioremap_bar(pci, 0);
1270         if (chip->remap_addr == NULL) {
1271                 dev_err(card->dev, "ioremap error\n");
1272                 return -ENXIO;
1273         }
1274
1275         if (chip->msi)
1276                 if (pci_enable_msi(pci) < 0)
1277                         chip->msi = 0;
1278
1279         if (azx_acquire_irq(chip, 0) < 0)
1280                 return -EBUSY;
1281
1282         pci_set_master(pci);
1283         synchronize_irq(chip->irq);
1284
1285         gcap = azx_readw(chip, GCAP);
1286         dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1287
1288         /* disable SB600 64bit support for safety */
1289         if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1290                 struct pci_dev *p_smbus;
1291                 p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
1292                                          PCI_DEVICE_ID_ATI_SBX00_SMBUS,
1293                                          NULL);
1294                 if (p_smbus) {
1295                         if (p_smbus->revision < 0x30)
1296                                 gcap &= ~ICH6_GCAP_64OK;
1297                         pci_dev_put(p_smbus);
1298                 }
1299         }
1300
1301         /* disable 64bit DMA address on some devices */
1302         if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1303                 dev_dbg(card->dev, "Disabling 64bit DMA\n");
1304                 gcap &= ~ICH6_GCAP_64OK;
1305         }
1306
1307         /* disable buffer size rounding to 128-byte multiples if supported */
1308         if (align_buffer_size >= 0)
1309                 chip->align_buffer_size = !!align_buffer_size;
1310         else {
1311                 if (chip->driver_caps & AZX_DCAPS_BUFSIZE)
1312                         chip->align_buffer_size = 0;
1313                 else if (chip->driver_caps & AZX_DCAPS_ALIGN_BUFSIZE)
1314                         chip->align_buffer_size = 1;
1315                 else
1316                         chip->align_buffer_size = 1;
1317         }
1318
1319         /* allow 64bit DMA address if supported by H/W */
1320         if ((gcap & ICH6_GCAP_64OK) && !pci_set_dma_mask(pci, DMA_BIT_MASK(64)))
1321                 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(64));
1322         else {
1323                 pci_set_dma_mask(pci, DMA_BIT_MASK(32));
1324                 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32));
1325         }
1326
1327         /* read number of streams from GCAP register instead of using
1328          * hardcoded value
1329          */
1330         chip->capture_streams = (gcap >> 8) & 0x0f;
1331         chip->playback_streams = (gcap >> 12) & 0x0f;
1332         if (!chip->playback_streams && !chip->capture_streams) {
1333                 /* gcap didn't give any info, switching to old method */
1334
1335                 switch (chip->driver_type) {
1336                 case AZX_DRIVER_ULI:
1337                         chip->playback_streams = ULI_NUM_PLAYBACK;
1338                         chip->capture_streams = ULI_NUM_CAPTURE;
1339                         break;
1340                 case AZX_DRIVER_ATIHDMI:
1341                 case AZX_DRIVER_ATIHDMI_NS:
1342                         chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
1343                         chip->capture_streams = ATIHDMI_NUM_CAPTURE;
1344                         break;
1345                 case AZX_DRIVER_GENERIC:
1346                 default:
1347                         chip->playback_streams = ICH6_NUM_PLAYBACK;
1348                         chip->capture_streams = ICH6_NUM_CAPTURE;
1349                         break;
1350                 }
1351         }
1352         chip->capture_index_offset = 0;
1353         chip->playback_index_offset = chip->capture_streams;
1354         chip->num_streams = chip->playback_streams + chip->capture_streams;
1355         chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev),
1356                                 GFP_KERNEL);
1357         if (!chip->azx_dev) {
1358                 dev_err(card->dev, "cannot malloc azx_dev\n");
1359                 return -ENOMEM;
1360         }
1361
1362         err = azx_alloc_stream_pages(chip);
1363         if (err < 0)
1364                 return err;
1365
1366         /* initialize streams */
1367         azx_init_stream(chip);
1368
1369         /* initialize chip */
1370         azx_init_pci(chip);
1371         azx_init_chip(chip, (probe_only[dev] & 2) == 0);
1372
1373         /* codec detection */
1374         if (!chip->codec_mask) {
1375                 dev_err(card->dev, "no codecs found!\n");
1376                 return -ENODEV;
1377         }
1378
1379         strcpy(card->driver, "HDA-Intel");
1380         strlcpy(card->shortname, driver_short_names[chip->driver_type],
1381                 sizeof(card->shortname));
1382         snprintf(card->longname, sizeof(card->longname),
1383                  "%s at 0x%lx irq %i",
1384                  card->shortname, chip->addr, chip->irq);
1385
1386         return 0;
1387 }
1388
1389 static void power_down_all_codecs(struct azx *chip)
1390 {
1391 #ifdef CONFIG_PM
1392         /* The codecs were powered up in snd_hda_codec_new().
1393          * Now all initialization done, so turn them down if possible
1394          */
1395         struct hda_codec *codec;
1396         list_for_each_entry(codec, &chip->bus->codec_list, list) {
1397                 snd_hda_power_down(codec);
1398         }
1399 #endif
1400 }
1401
1402 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1403 /* callback from request_firmware_nowait() */
1404 static void azx_firmware_cb(const struct firmware *fw, void *context)
1405 {
1406         struct snd_card *card = context;
1407         struct azx *chip = card->private_data;
1408         struct pci_dev *pci = chip->pci;
1409
1410         if (!fw) {
1411                 dev_err(card->dev, "Cannot load firmware, aborting\n");
1412                 goto error;
1413         }
1414
1415         chip->fw = fw;
1416         if (!chip->disabled) {
1417                 /* continue probing */
1418                 if (azx_probe_continue(chip))
1419                         goto error;
1420         }
1421         return; /* OK */
1422
1423  error:
1424         snd_card_free(card);
1425         pci_set_drvdata(pci, NULL);
1426 }
1427 #endif
1428
1429 /*
1430  * HDA controller ops.
1431  */
1432
1433 /* PCI register access. */
1434 static void pci_azx_writel(u32 value, u32 __iomem *addr)
1435 {
1436         writel(value, addr);
1437 }
1438
1439 static u32 pci_azx_readl(u32 __iomem *addr)
1440 {
1441         return readl(addr);
1442 }
1443
1444 static void pci_azx_writew(u16 value, u16 __iomem *addr)
1445 {
1446         writew(value, addr);
1447 }
1448
1449 static u16 pci_azx_readw(u16 __iomem *addr)
1450 {
1451         return readw(addr);
1452 }
1453
1454 static void pci_azx_writeb(u8 value, u8 __iomem *addr)
1455 {
1456         writeb(value, addr);
1457 }
1458
1459 static u8 pci_azx_readb(u8 __iomem *addr)
1460 {
1461         return readb(addr);
1462 }
1463
1464 static int disable_msi_reset_irq(struct azx *chip)
1465 {
1466         int err;
1467
1468         free_irq(chip->irq, chip);
1469         chip->irq = -1;
1470         pci_disable_msi(chip->pci);
1471         chip->msi = 0;
1472         err = azx_acquire_irq(chip, 1);
1473         if (err < 0)
1474                 return err;
1475
1476         return 0;
1477 }
1478
1479 /* DMA page allocation helpers.  */
1480 static int dma_alloc_pages(struct azx *chip,
1481                            int type,
1482                            size_t size,
1483                            struct snd_dma_buffer *buf)
1484 {
1485         int err;
1486
1487         err = snd_dma_alloc_pages(type,
1488                                   chip->card->dev,
1489                                   size, buf);
1490         if (err < 0)
1491                 return err;
1492         mark_pages_wc(chip, buf, true);
1493         return 0;
1494 }
1495
1496 static void dma_free_pages(struct azx *chip, struct snd_dma_buffer *buf)
1497 {
1498         mark_pages_wc(chip, buf, false);
1499         snd_dma_free_pages(buf);
1500 }
1501
1502 static int substream_alloc_pages(struct azx *chip,
1503                                  struct snd_pcm_substream *substream,
1504                                  size_t size)
1505 {
1506         struct azx_dev *azx_dev = get_azx_dev(substream);
1507         int ret;
1508
1509         mark_runtime_wc(chip, azx_dev, substream, false);
1510         azx_dev->bufsize = 0;
1511         azx_dev->period_bytes = 0;
1512         azx_dev->format_val = 0;
1513         ret = snd_pcm_lib_malloc_pages(substream, size);
1514         if (ret < 0)
1515                 return ret;
1516         mark_runtime_wc(chip, azx_dev, substream, true);
1517         return 0;
1518 }
1519
1520 static int substream_free_pages(struct azx *chip,
1521                                 struct snd_pcm_substream *substream)
1522 {
1523         struct azx_dev *azx_dev = get_azx_dev(substream);
1524         mark_runtime_wc(chip, azx_dev, substream, false);
1525         return snd_pcm_lib_free_pages(substream);
1526 }
1527
1528 static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
1529                              struct vm_area_struct *area)
1530 {
1531 #ifdef CONFIG_X86
1532         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
1533         struct azx *chip = apcm->chip;
1534         if (!azx_snoop(chip))
1535                 area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
1536 #endif
1537 }
1538
1539 static const struct hda_controller_ops pci_hda_ops = {
1540         .reg_writel = pci_azx_writel,
1541         .reg_readl = pci_azx_readl,
1542         .reg_writew = pci_azx_writew,
1543         .reg_readw = pci_azx_readw,
1544         .reg_writeb = pci_azx_writeb,
1545         .reg_readb = pci_azx_readb,
1546         .disable_msi_reset_irq = disable_msi_reset_irq,
1547         .dma_alloc_pages = dma_alloc_pages,
1548         .dma_free_pages = dma_free_pages,
1549         .substream_alloc_pages = substream_alloc_pages,
1550         .substream_free_pages = substream_free_pages,
1551         .pcm_mmap_prepare = pcm_mmap_prepare,
1552         .position_check = azx_position_check,
1553 };
1554
1555 static int azx_probe(struct pci_dev *pci,
1556                      const struct pci_device_id *pci_id)
1557 {
1558         static int dev;
1559         struct snd_card *card;
1560         struct azx *chip;
1561         bool schedule_probe;
1562         int err;
1563
1564         if (dev >= SNDRV_CARDS)
1565                 return -ENODEV;
1566         if (!enable[dev]) {
1567                 dev++;
1568                 return -ENOENT;
1569         }
1570
1571         err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1572                            0, &card);
1573         if (err < 0) {
1574                 dev_err(&pci->dev, "Error creating card!\n");
1575                 return err;
1576         }
1577
1578         err = azx_create(card, pci, dev, pci_id->driver_data,
1579                          &pci_hda_ops, &chip);
1580         if (err < 0)
1581                 goto out_free;
1582         card->private_data = chip;
1583
1584         pci_set_drvdata(pci, card);
1585
1586         err = register_vga_switcheroo(chip);
1587         if (err < 0) {
1588                 dev_err(card->dev, "Error registering VGA-switcheroo client\n");
1589                 goto out_free;
1590         }
1591
1592         if (check_hdmi_disabled(pci)) {
1593                 dev_info(card->dev, "VGA controller is disabled\n");
1594                 dev_info(card->dev, "Delaying initialization\n");
1595                 chip->disabled = true;
1596         }
1597
1598         schedule_probe = !chip->disabled;
1599
1600 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1601         if (patch[dev] && *patch[dev]) {
1602                 dev_info(card->dev, "Applying patch firmware '%s'\n",
1603                          patch[dev]);
1604                 err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
1605                                               &pci->dev, GFP_KERNEL, card,
1606                                               azx_firmware_cb);
1607                 if (err < 0)
1608                         goto out_free;
1609                 schedule_probe = false; /* continued in azx_firmware_cb() */
1610         }
1611 #endif /* CONFIG_SND_HDA_PATCH_LOADER */
1612
1613 #ifndef CONFIG_SND_HDA_I915
1614         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1615                 dev_err(card->dev, "Haswell must build in CONFIG_SND_HDA_I915\n");
1616 #endif
1617
1618         if (schedule_probe)
1619                 schedule_work(&chip->probe_work);
1620
1621         dev++;
1622         if (chip->disabled)
1623                 complete_all(&chip->probe_wait);
1624         return 0;
1625
1626 out_free:
1627         snd_card_free(card);
1628         return err;
1629 }
1630
1631 /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
1632 static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
1633         [AZX_DRIVER_NVIDIA] = 8,
1634         [AZX_DRIVER_TERA] = 1,
1635 };
1636
1637 static int azx_probe_continue(struct azx *chip)
1638 {
1639         struct pci_dev *pci = chip->pci;
1640         int dev = chip->dev_index;
1641         int err;
1642
1643         /* Request power well for Haswell HDA controller and codec */
1644         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1645 #ifdef CONFIG_SND_HDA_I915
1646                 err = hda_i915_init();
1647                 if (err < 0) {
1648                         dev_err(chip->card->dev,
1649                                 "Error request power-well from i915\n");
1650                         goto out_free;
1651                 }
1652 #endif
1653                 hda_display_power(true);
1654         }
1655
1656         err = azx_first_init(chip);
1657         if (err < 0)
1658                 goto out_free;
1659
1660 #ifdef CONFIG_SND_HDA_INPUT_BEEP
1661         chip->beep_mode = beep_mode[dev];
1662 #endif
1663
1664         /* create codec instances */
1665         err = azx_codec_create(chip, model[dev],
1666                                azx_max_codecs[chip->driver_type],
1667                                power_save_addr);
1668
1669         if (err < 0)
1670                 goto out_free;
1671 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1672         if (chip->fw) {
1673                 err = snd_hda_load_patch(chip->bus, chip->fw->size,
1674                                          chip->fw->data);
1675                 if (err < 0)
1676                         goto out_free;
1677 #ifndef CONFIG_PM
1678                 release_firmware(chip->fw); /* no longer needed */
1679                 chip->fw = NULL;
1680 #endif
1681         }
1682 #endif
1683         if ((probe_only[dev] & 1) == 0) {
1684                 err = azx_codec_configure(chip);
1685                 if (err < 0)
1686                         goto out_free;
1687         }
1688
1689         /* create PCM streams */
1690         err = snd_hda_build_pcms(chip->bus);
1691         if (err < 0)
1692                 goto out_free;
1693
1694         /* create mixer controls */
1695         err = azx_mixer_create(chip);
1696         if (err < 0)
1697                 goto out_free;
1698
1699         err = snd_card_register(chip->card);
1700         if (err < 0)
1701                 goto out_free;
1702
1703         chip->running = 1;
1704         power_down_all_codecs(chip);
1705         azx_notifier_register(chip);
1706         azx_add_card_list(chip);
1707         if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME) || chip->use_vga_switcheroo)
1708                 pm_runtime_put_noidle(&pci->dev);
1709
1710 out_free:
1711         if (err < 0)
1712                 chip->init_failed = 1;
1713         complete_all(&chip->probe_wait);
1714         return err;
1715 }
1716
1717 static void azx_remove(struct pci_dev *pci)
1718 {
1719         struct snd_card *card = pci_get_drvdata(pci);
1720
1721         if (card)
1722                 snd_card_free(card);
1723 }
1724
1725 /* PCI IDs */
1726 static DEFINE_PCI_DEVICE_TABLE(azx_ids) = {
1727         /* CPT */
1728         { PCI_DEVICE(0x8086, 0x1c20),
1729           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1730         /* PBG */
1731         { PCI_DEVICE(0x8086, 0x1d20),
1732           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1733         /* Panther Point */
1734         { PCI_DEVICE(0x8086, 0x1e20),
1735           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1736         /* Lynx Point */
1737         { PCI_DEVICE(0x8086, 0x8c20),
1738           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1739         /* Wellsburg */
1740         { PCI_DEVICE(0x8086, 0x8d20),
1741           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1742         { PCI_DEVICE(0x8086, 0x8d21),
1743           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1744         /* Lynx Point-LP */
1745         { PCI_DEVICE(0x8086, 0x9c20),
1746           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1747         /* Lynx Point-LP */
1748         { PCI_DEVICE(0x8086, 0x9c21),
1749           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1750         /* Wildcat Point-LP */
1751         { PCI_DEVICE(0x8086, 0x9ca0),
1752           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1753         /* Haswell */
1754         { PCI_DEVICE(0x8086, 0x0a0c),
1755           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1756         { PCI_DEVICE(0x8086, 0x0c0c),
1757           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1758         { PCI_DEVICE(0x8086, 0x0d0c),
1759           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1760         /* Broadwell */
1761         { PCI_DEVICE(0x8086, 0x160c),
1762           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1763         /* 5 Series/3400 */
1764         { PCI_DEVICE(0x8086, 0x3b56),
1765           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
1766         /* Poulsbo */
1767         { PCI_DEVICE(0x8086, 0x811b),
1768           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
1769         /* Oaktrail */
1770         { PCI_DEVICE(0x8086, 0x080a),
1771           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
1772         /* BayTrail */
1773         { PCI_DEVICE(0x8086, 0x0f04),
1774           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1775         /* ICH */
1776         { PCI_DEVICE(0x8086, 0x2668),
1777           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1778           AZX_DCAPS_BUFSIZE },  /* ICH6 */
1779         { PCI_DEVICE(0x8086, 0x27d8),
1780           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1781           AZX_DCAPS_BUFSIZE },  /* ICH7 */
1782         { PCI_DEVICE(0x8086, 0x269a),
1783           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1784           AZX_DCAPS_BUFSIZE },  /* ESB2 */
1785         { PCI_DEVICE(0x8086, 0x284b),
1786           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1787           AZX_DCAPS_BUFSIZE },  /* ICH8 */
1788         { PCI_DEVICE(0x8086, 0x293e),
1789           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1790           AZX_DCAPS_BUFSIZE },  /* ICH9 */
1791         { PCI_DEVICE(0x8086, 0x293f),
1792           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1793           AZX_DCAPS_BUFSIZE },  /* ICH9 */
1794         { PCI_DEVICE(0x8086, 0x3a3e),
1795           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1796           AZX_DCAPS_BUFSIZE },  /* ICH10 */
1797         { PCI_DEVICE(0x8086, 0x3a6e),
1798           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_OLD_SSYNC |
1799           AZX_DCAPS_BUFSIZE },  /* ICH10 */
1800         /* Generic Intel */
1801         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
1802           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1803           .class_mask = 0xffffff,
1804           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_BUFSIZE },
1805         /* ATI SB 450/600/700/800/900 */
1806         { PCI_DEVICE(0x1002, 0x437b),
1807           .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
1808         { PCI_DEVICE(0x1002, 0x4383),
1809           .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
1810         /* AMD Hudson */
1811         { PCI_DEVICE(0x1022, 0x780d),
1812           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
1813         /* ATI HDMI */
1814         { PCI_DEVICE(0x1002, 0x793b),
1815           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1816         { PCI_DEVICE(0x1002, 0x7919),
1817           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1818         { PCI_DEVICE(0x1002, 0x960f),
1819           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1820         { PCI_DEVICE(0x1002, 0x970f),
1821           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1822         { PCI_DEVICE(0x1002, 0xaa00),
1823           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1824         { PCI_DEVICE(0x1002, 0xaa08),
1825           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1826         { PCI_DEVICE(0x1002, 0xaa10),
1827           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1828         { PCI_DEVICE(0x1002, 0xaa18),
1829           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1830         { PCI_DEVICE(0x1002, 0xaa20),
1831           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1832         { PCI_DEVICE(0x1002, 0xaa28),
1833           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1834         { PCI_DEVICE(0x1002, 0xaa30),
1835           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1836         { PCI_DEVICE(0x1002, 0xaa38),
1837           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1838         { PCI_DEVICE(0x1002, 0xaa40),
1839           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1840         { PCI_DEVICE(0x1002, 0xaa48),
1841           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1842         { PCI_DEVICE(0x1002, 0xaa50),
1843           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1844         { PCI_DEVICE(0x1002, 0xaa58),
1845           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1846         { PCI_DEVICE(0x1002, 0xaa60),
1847           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1848         { PCI_DEVICE(0x1002, 0xaa68),
1849           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1850         { PCI_DEVICE(0x1002, 0xaa80),
1851           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1852         { PCI_DEVICE(0x1002, 0xaa88),
1853           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1854         { PCI_DEVICE(0x1002, 0xaa90),
1855           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1856         { PCI_DEVICE(0x1002, 0xaa98),
1857           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
1858         { PCI_DEVICE(0x1002, 0x9902),
1859           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
1860         { PCI_DEVICE(0x1002, 0xaaa0),
1861           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
1862         { PCI_DEVICE(0x1002, 0xaaa8),
1863           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
1864         { PCI_DEVICE(0x1002, 0xaab0),
1865           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI },
1866         /* VIA VT8251/VT8237A */
1867         { PCI_DEVICE(0x1106, 0x3288),
1868           .driver_data = AZX_DRIVER_VIA | AZX_DCAPS_POSFIX_VIA },
1869         /* VIA GFX VT7122/VX900 */
1870         { PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
1871         /* VIA GFX VT6122/VX11 */
1872         { PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
1873         /* SIS966 */
1874         { PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
1875         /* ULI M5461 */
1876         { PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
1877         /* NVIDIA MCP */
1878         { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1879           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1880           .class_mask = 0xffffff,
1881           .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
1882         /* Teradici */
1883         { PCI_DEVICE(0x6549, 0x1200),
1884           .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
1885         { PCI_DEVICE(0x6549, 0x2200),
1886           .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
1887         /* Creative X-Fi (CA0110-IBG) */
1888         /* CTHDA chips */
1889         { PCI_DEVICE(0x1102, 0x0010),
1890           .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
1891         { PCI_DEVICE(0x1102, 0x0012),
1892           .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
1893 #if !IS_ENABLED(CONFIG_SND_CTXFI)
1894         /* the following entry conflicts with snd-ctxfi driver,
1895          * as ctxfi driver mutates from HD-audio to native mode with
1896          * a special command sequence.
1897          */
1898         { PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
1899           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1900           .class_mask = 0xffffff,
1901           .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
1902           AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
1903 #else
1904         /* this entry seems still valid -- i.e. without emu20kx chip */
1905         { PCI_DEVICE(0x1102, 0x0009),
1906           .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
1907           AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
1908 #endif
1909         /* Vortex86MX */
1910         { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
1911         /* VMware HDAudio */
1912         { PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
1913         /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
1914         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
1915           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1916           .class_mask = 0xffffff,
1917           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
1918         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
1919           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
1920           .class_mask = 0xffffff,
1921           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
1922         { 0, }
1923 };
1924 MODULE_DEVICE_TABLE(pci, azx_ids);
1925
1926 /* pci_driver definition */
1927 static struct pci_driver azx_driver = {
1928         .name = KBUILD_MODNAME,
1929         .id_table = azx_ids,
1930         .probe = azx_probe,
1931         .remove = azx_remove,
1932         .driver = {
1933                 .pm = AZX_PM_OPS,
1934         },
1935 };
1936
1937 module_pci_driver(azx_driver);