staging: brcm80211: emptied wlioctl.h
[linux-drm-fsl-dcu.git] / drivers / staging / brcm80211 / brcmsmac / wlc_phy_shim.c
1 /*
2  * Copyright (c) 2010 Broadcom Corporation
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16
17 /*
18  * This is "two-way" interface, acting as the SHIM layer between WL and PHY layer.
19  *   WL driver can optinally call this translation layer to do some preprocessing, then reach PHY.
20  *   On the PHY->WL driver direction, all calls go through this layer since PHY doesn't have the
21  *   access to wlc_hw pointer.
22  */
23
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/pci.h>
27
28 #include <proto/802.11.h>
29 #include <bcmdefs.h>
30 #include <bcmutils.h>
31 #include <bcmwifi.h>
32 #include <aiutils.h>
33 #include <sbconfig.h>
34 #include <sbchipc.h>
35 #include <pcicfg.h>
36 #include <sbhnddma.h>
37 #include <hnddma.h>
38 #include <wlc_pmu.h>
39
40 #include "wlc_types.h"
41 #include "wl_dbg.h"
42 #include "wlc_cfg.h"
43 #include "d11.h"
44 #include "wlc_rate.h"
45 #include "wlc_scb.h"
46 #include "wlc_pub.h"
47 #include "phy/wlc_phy_hal.h"
48 #include "wlc_channel.h"
49 #include "bcmsrom.h"
50 #include "wlc_key.h"
51 #include "wlc_bmac.h"
52 #include "wlc_phy_hal.h"
53 #include "wl_export.h"
54 #include "wlc_main.h"
55 #include "wlc_phy_shim.h"
56
57 /* PHY SHIM module specific state */
58 struct wlc_phy_shim_info {
59         struct wlc_hw_info *wlc_hw;     /* pointer to main wlc_hw structure */
60         void *wlc;              /* pointer to main wlc structure */
61         void *wl;               /* pointer to os-specific private state */
62 };
63
64 wlc_phy_shim_info_t *wlc_phy_shim_attach(struct wlc_hw_info *wlc_hw,
65                                                        void *wl, void *wlc) {
66         wlc_phy_shim_info_t *physhim = NULL;
67
68         physhim = kzalloc(sizeof(wlc_phy_shim_info_t), GFP_ATOMIC);
69         if (!physhim) {
70                 wiphy_err(wlc_hw->wlc->wiphy,
71                           "wl%d: wlc_phy_shim_attach: out of mem\n",
72                           wlc_hw->unit);
73                 return NULL;
74         }
75         physhim->wlc_hw = wlc_hw;
76         physhim->wlc = wlc;
77         physhim->wl = wl;
78
79         return physhim;
80 }
81
82 void wlc_phy_shim_detach(wlc_phy_shim_info_t *physhim)
83 {
84         kfree(physhim);
85 }
86
87 struct wlapi_timer *wlapi_init_timer(wlc_phy_shim_info_t *physhim,
88                                      void (*fn) (void *arg), void *arg,
89                                      const char *name)
90 {
91         return (struct wlapi_timer *)wl_init_timer(physhim->wl, fn, arg, name);
92 }
93
94 void wlapi_free_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t)
95 {
96         wl_free_timer(physhim->wl, (struct wl_timer *)t);
97 }
98
99 void
100 wlapi_add_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t, uint ms,
101                 int periodic)
102 {
103         wl_add_timer(physhim->wl, (struct wl_timer *)t, ms, periodic);
104 }
105
106 bool wlapi_del_timer(wlc_phy_shim_info_t *physhim, struct wlapi_timer *t)
107 {
108         return wl_del_timer(physhim->wl, (struct wl_timer *)t);
109 }
110
111 void wlapi_intrson(wlc_phy_shim_info_t *physhim)
112 {
113         wl_intrson(physhim->wl);
114 }
115
116 u32 wlapi_intrsoff(wlc_phy_shim_info_t *physhim)
117 {
118         return wl_intrsoff(physhim->wl);
119 }
120
121 void wlapi_intrsrestore(wlc_phy_shim_info_t *physhim, u32 macintmask)
122 {
123         wl_intrsrestore(physhim->wl, macintmask);
124 }
125
126 void wlapi_bmac_write_shm(wlc_phy_shim_info_t *physhim, uint offset, u16 v)
127 {
128         wlc_bmac_write_shm(physhim->wlc_hw, offset, v);
129 }
130
131 u16 wlapi_bmac_read_shm(wlc_phy_shim_info_t *physhim, uint offset)
132 {
133         return wlc_bmac_read_shm(physhim->wlc_hw, offset);
134 }
135
136 void
137 wlapi_bmac_mhf(wlc_phy_shim_info_t *physhim, u8 idx, u16 mask,
138                u16 val, int bands)
139 {
140         wlc_bmac_mhf(physhim->wlc_hw, idx, mask, val, bands);
141 }
142
143 void wlapi_bmac_corereset(wlc_phy_shim_info_t *physhim, u32 flags)
144 {
145         wlc_bmac_corereset(physhim->wlc_hw, flags);
146 }
147
148 void wlapi_suspend_mac_and_wait(wlc_phy_shim_info_t *physhim)
149 {
150         wlc_suspend_mac_and_wait(physhim->wlc);
151 }
152
153 void wlapi_switch_macfreq(wlc_phy_shim_info_t *physhim, u8 spurmode)
154 {
155         wlc_bmac_switch_macfreq(physhim->wlc_hw, spurmode);
156 }
157
158 void wlapi_enable_mac(wlc_phy_shim_info_t *physhim)
159 {
160         wlc_enable_mac(physhim->wlc);
161 }
162
163 void wlapi_bmac_mctrl(wlc_phy_shim_info_t *physhim, u32 mask, u32 val)
164 {
165         wlc_bmac_mctrl(physhim->wlc_hw, mask, val);
166 }
167
168 void wlapi_bmac_phy_reset(wlc_phy_shim_info_t *physhim)
169 {
170         wlc_bmac_phy_reset(physhim->wlc_hw);
171 }
172
173 void wlapi_bmac_bw_set(wlc_phy_shim_info_t *physhim, u16 bw)
174 {
175         wlc_bmac_bw_set(physhim->wlc_hw, bw);
176 }
177
178 u16 wlapi_bmac_get_txant(wlc_phy_shim_info_t *physhim)
179 {
180         return wlc_bmac_get_txant(physhim->wlc_hw);
181 }
182
183 void wlapi_bmac_phyclk_fgc(wlc_phy_shim_info_t *physhim, bool clk)
184 {
185         wlc_bmac_phyclk_fgc(physhim->wlc_hw, clk);
186 }
187
188 void wlapi_bmac_macphyclk_set(wlc_phy_shim_info_t *physhim, bool clk)
189 {
190         wlc_bmac_macphyclk_set(physhim->wlc_hw, clk);
191 }
192
193 void wlapi_bmac_core_phypll_ctl(wlc_phy_shim_info_t *physhim, bool on)
194 {
195         wlc_bmac_core_phypll_ctl(physhim->wlc_hw, on);
196 }
197
198 void wlapi_bmac_core_phypll_reset(wlc_phy_shim_info_t *physhim)
199 {
200         wlc_bmac_core_phypll_reset(physhim->wlc_hw);
201 }
202
203 void wlapi_bmac_ucode_wake_override_phyreg_set(wlc_phy_shim_info_t *physhim)
204 {
205         wlc_ucode_wake_override_set(physhim->wlc_hw, WLC_WAKE_OVERRIDE_PHYREG);
206 }
207
208 void wlapi_bmac_ucode_wake_override_phyreg_clear(wlc_phy_shim_info_t *physhim)
209 {
210         wlc_ucode_wake_override_clear(physhim->wlc_hw,
211                                       WLC_WAKE_OVERRIDE_PHYREG);
212 }
213
214 void
215 wlapi_bmac_write_template_ram(wlc_phy_shim_info_t *physhim, int offset,
216                               int len, void *buf)
217 {
218         wlc_bmac_write_template_ram(physhim->wlc_hw, offset, len, buf);
219 }
220
221 u16 wlapi_bmac_rate_shm_offset(wlc_phy_shim_info_t *physhim, u8 rate)
222 {
223         return wlc_bmac_rate_shm_offset(physhim->wlc_hw, rate);
224 }
225
226 void wlapi_ucode_sample_init(wlc_phy_shim_info_t *physhim)
227 {
228 }
229
230 void
231 wlapi_copyfrom_objmem(wlc_phy_shim_info_t *physhim, uint offset, void *buf,
232                       int len, u32 sel)
233 {
234         wlc_bmac_copyfrom_objmem(physhim->wlc_hw, offset, buf, len, sel);
235 }
236
237 void
238 wlapi_copyto_objmem(wlc_phy_shim_info_t *physhim, uint offset, const void *buf,
239                     int l, u32 sel)
240 {
241         wlc_bmac_copyto_objmem(physhim->wlc_hw, offset, buf, l, sel);
242 }