drivers/net/vmxnet3/vmxnet3_drv.c

   1 /*
   2  * Linux driver for VMware's vmxnet3 ethernet NIC.
   3  *
   4  * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License as published by the
   8  * Free Software Foundation; version 2 of the License and no later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  13  * NON INFRINGEMENT. See the GNU General Public License for more
  14  * details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * The full GNU General Public License is included in this distribution in
  21  * the file called "COPYING".
  22  *
  23  * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
  24  *
  25  */
  26
  27 #include <linux/module.h>
  28 #include <net/ip6_checksum.h>
  29
  30 #include "vmxnet3_int.h"
  31
  32 char vmxnet3_driver_name[] = "vmxnet3";
  33 #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver"
  34
  35 /*
  36  * PCI Device ID Table
  37  * Last entry must be all 0s
  38  */
  39 static DEFINE_PCI_DEVICE_TABLE(vmxnet3_pciid_table) = {
  40         {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)},
  41         {0}
  42 };
  43
  44 MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table);
  45
  46 static atomic_t devices_found;
  47
  48 static int enable_mq = 1;
  49 static int irq_share_mode;
  50
  51 static void
  52 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac);
  53
  54 /*
  55  *    Enable/Disable the given intr
  56  */
  57 static void
  58 vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
  59 {
  60         VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0);
  61 }
  62
  63
  64 static void
  65 vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
  66 {
  67         VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1);
  68 }
  69
  70
  71 /*
  72  *    Enable/Disable all intrs used by the device
  73  */
  74 static void
  75 vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter)
  76 {
  77         int i;
  78
  79         for (i = 0; i < adapter->intr.num_intrs; i++)
  80                 vmxnet3_enable_intr(adapter, i);
  81         adapter->shared->devRead.intrConf.intrCtrl &=
  82                                         cpu_to_le32(~VMXNET3_IC_DISABLE_ALL);
  83 }
  84
  85
  86 static void
  87 vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter)
  88 {
  89         int i;
  90
  91         adapter->shared->devRead.intrConf.intrCtrl |=
  92                                         cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
  93         for (i = 0; i < adapter->intr.num_intrs; i++)
  94                 vmxnet3_disable_intr(adapter, i);
  95 }
  96
  97
  98 static void
  99 vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events)
 100 {
 101         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events);
 102 }
 103
 104
 105 static bool
 106 vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
 107 {
 108         return tq->stopped;
 109 }
 110
 111
 112 static void
 113 vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
 114 {
 115         tq->stopped = false;
 116         netif_start_subqueue(adapter->netdev, tq - adapter->tx_queue);
 117 }
 118
 119
 120 static void
 121 vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
 122 {
 123         tq->stopped = false;
 124         netif_wake_subqueue(adapter->netdev, (tq - adapter->tx_queue));
 125 }
 126
 127
 128 static void
 129 vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
 130 {
 131         tq->stopped = true;
 132         tq->num_stop++;
 133         netif_stop_subqueue(adapter->netdev, (tq - adapter->tx_queue));
 134 }
 135
 136
 137 /*
 138  * Check the link state. This may start or stop the tx queue.
 139  */
 140 static void
 141 vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue)
 142 {
 143         u32 ret;
 144         int i;
 145         unsigned long flags;
 146
 147         spin_lock_irqsave(&adapter->cmd_lock, flags);
 148         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
 149         ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
 150         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
 151
 152         adapter->link_speed = ret >> 16;
 153         if (ret & 1) { /* Link is up. */
 154                 netdev_info(adapter->netdev, "NIC Link is Up %d Mbps\n",
 155                             adapter->link_speed);
 156                 if (!netif_carrier_ok(adapter->netdev))
 157                         netif_carrier_on(adapter->netdev);
 158
 159                 if (affectTxQueue) {
 160                         for (i = 0; i < adapter->num_tx_queues; i++)
 161                                 vmxnet3_tq_start(&adapter->tx_queue[i],
 162                                                  adapter);
 163                 }
 164         } else {
 165                 netdev_info(adapter->netdev, "NIC Link is Down\n");
 166                 if (netif_carrier_ok(adapter->netdev))
 167                         netif_carrier_off(adapter->netdev);
 168
 169                 if (affectTxQueue) {
 170                         for (i = 0; i < adapter->num_tx_queues; i++)
 171                                 vmxnet3_tq_stop(&adapter->tx_queue[i], adapter);
 172                 }
 173         }
 174 }
 175
 176 static void
 177 vmxnet3_process_events(struct vmxnet3_adapter *adapter)
 178 {
 179         int i;
 180         unsigned long flags;
 181         u32 events = le32_to_cpu(adapter->shared->ecr);
 182         if (!events)
 183                 return;
 184
 185         vmxnet3_ack_events(adapter, events);
 186
 187         /* Check if link state has changed */
 188         if (events & VMXNET3_ECR_LINK)
 189                 vmxnet3_check_link(adapter, true);
 190
 191         /* Check if there is an error on xmit/recv queues */
 192         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
 193                 spin_lock_irqsave(&adapter->cmd_lock, flags);
 194                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
 195                                        VMXNET3_CMD_GET_QUEUE_STATUS);
 196                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
 197
 198                 for (i = 0; i < adapter->num_tx_queues; i++)
 199                         if (adapter->tqd_start[i].status.stopped)
 200                                 dev_err(&adapter->netdev->dev,
 201                                         "%s: tq[%d] error 0x%x\n",
 202                                         adapter->netdev->name, i, le32_to_cpu(
 203                                         adapter->tqd_start[i].status.error));
 204                 for (i = 0; i < adapter->num_rx_queues; i++)
 205                         if (adapter->rqd_start[i].status.stopped)
 206                                 dev_err(&adapter->netdev->dev,
 207                                         "%s: rq[%d] error 0x%x\n",
 208                                         adapter->netdev->name, i,
 209                                         adapter->rqd_start[i].status.error);
 210
 211                 schedule_work(&adapter->work);
 212         }
 213 }
 214
 215 #ifdef __BIG_ENDIAN_BITFIELD
 216 /*
 217  * The device expects the bitfields in shared structures to be written in
 218  * little endian. When CPU is big endian, the following routines are used to
 219  * correctly read and write into ABI.
 220  * The general technique used here is : double word bitfields are defined in
 221  * opposite order for big endian architecture. Then before reading them in
 222  * driver the complete double word is translated using le32_to_cpu. Similarly
 223  * After the driver writes into bitfields, cpu_to_le32 is used to translate the
 224  * double words into required format.
 225  * In order to avoid touching bits in shared structure more than once, temporary
 226  * descriptors are used. These are passed as srcDesc to following functions.
 227  */
 228 static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc,
 229                                 struct Vmxnet3_RxDesc *dstDesc)
 230 {
 231         u32 *src = (u32 *)srcDesc + 2;
 232         u32 *dst = (u32 *)dstDesc + 2;
 233         dstDesc->addr = le64_to_cpu(srcDesc->addr);
 234         *dst = le32_to_cpu(*src);
 235         dstDesc->ext1 = le32_to_cpu(srcDesc->ext1);
 236 }
 237
 238 static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc,
 239                                struct Vmxnet3_TxDesc *dstDesc)
 240 {
 241         int i;
 242         u32 *src = (u32 *)(srcDesc + 1);
 243         u32 *dst = (u32 *)(dstDesc + 1);
 244
 245         /* Working backwards so that the gen bit is set at the end. */
 246         for (i = 2; i > 0; i--) {
 247                 src--;
 248                 dst--;
 249                 *dst = cpu_to_le32(*src);
 250         }
 251 }
 252
 253
 254 static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc,
 255                                 struct Vmxnet3_RxCompDesc *dstDesc)
 256 {
 257         int i = 0;
 258         u32 *src = (u32 *)srcDesc;
 259         u32 *dst = (u32 *)dstDesc;
 260         for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) {
 261                 *dst = le32_to_cpu(*src);
 262                 src++;
 263                 dst++;
 264         }
 265 }
 266
 267
 268 /* Used to read bitfield values from double words. */
 269 static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size)
 270 {
 271         u32 temp = le32_to_cpu(*bitfield);
 272         u32 mask = ((1 << size) - 1) << pos;
 273         temp &= mask;
 274         temp >>= pos;
 275         return temp;
 276 }
 277
 278
 279
 280 #endif  /* __BIG_ENDIAN_BITFIELD */
 281
 282 #ifdef __BIG_ENDIAN_BITFIELD
 283
 284 #   define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \
 285                         txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \
 286                         VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE)
 287 #   define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \
 288                         txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \
 289                         VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE)
 290 #   define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \
 291                         VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \
 292                         VMXNET3_TCD_GEN_SIZE)
 293 #   define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \
 294                         VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE)
 295 #   define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \
 296                         (dstrcd) = (tmp); \
 297                         vmxnet3_RxCompToCPU((rcd), (tmp)); \
 298                 } while (0)
 299 #   define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \
 300                         (dstrxd) = (tmp); \
 301                         vmxnet3_RxDescToCPU((rxd), (tmp)); \
 302                 } while (0)
 303
 304 #else
 305
 306 #   define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen)
 307 #   define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop)
 308 #   define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen)
 309 #   define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx)
 310 #   define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd)
 311 #   define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd)
 312
 313 #endif /* __BIG_ENDIAN_BITFIELD  */
 314
 315
 316 static void
 317 vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi,
 318                      struct pci_dev *pdev)
 319 {
 320         if (tbi->map_type == VMXNET3_MAP_SINGLE)
 321                 pci_unmap_single(pdev, tbi->dma_addr, tbi->len,
 322                                  PCI_DMA_TODEVICE);
 323         else if (tbi->map_type == VMXNET3_MAP_PAGE)
 324                 pci_unmap_page(pdev, tbi->dma_addr, tbi->len,
 325                                PCI_DMA_TODEVICE);
 326         else
 327                 BUG_ON(tbi->map_type != VMXNET3_MAP_NONE);
 328
 329         tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */
 330 }
 331
 332
 333 static int
 334 vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq,
 335                   struct pci_dev *pdev, struct vmxnet3_adapter *adapter)
 336 {
 337         struct sk_buff *skb;
 338         int entries = 0;
 339
 340         /* no out of order completion */
 341         BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp);
 342         BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1);
 343
 344         skb = tq->buf_info[eop_idx].skb;
 345         BUG_ON(skb == NULL);
 346         tq->buf_info[eop_idx].skb = NULL;
 347
 348         VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size);
 349
 350         while (tq->tx_ring.next2comp != eop_idx) {
 351                 vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp,
 352                                      pdev);
 353
 354                 /* update next2comp w/o tx_lock. Since we are marking more,
 355                  * instead of less, tx ring entries avail, the worst case is
 356                  * that the tx routine incorrectly re-queues a pkt due to
 357                  * insufficient tx ring entries.
 358                  */
 359                 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
 360                 entries++;
 361         }
 362
 363         dev_kfree_skb_any(skb);
 364         return entries;
 365 }
 366
 367
 368 static int
 369 vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq,
 370                         struct vmxnet3_adapter *adapter)
 371 {
 372         int completed = 0;
 373         union Vmxnet3_GenericDesc *gdesc;
 374
 375         gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
 376         while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) {
 377                 completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX(
 378                                                &gdesc->tcd), tq, adapter->pdev,
 379                                                adapter);
 380
 381                 vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring);
 382                 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
 383         }
 384
 385         if (completed) {
 386                 spin_lock(&tq->tx_lock);
 387                 if (unlikely(vmxnet3_tq_stopped(tq, adapter) &&
 388                              vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) >
 389                              VMXNET3_WAKE_QUEUE_THRESHOLD(tq) &&
 390                              netif_carrier_ok(adapter->netdev))) {
 391                         vmxnet3_tq_wake(tq, adapter);
 392                 }
 393                 spin_unlock(&tq->tx_lock);
 394         }
 395         return completed;
 396 }
 397
 398
 399 static void
 400 vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq,
 401                    struct vmxnet3_adapter *adapter)
 402 {
 403         int i;
 404
 405         while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) {
 406                 struct vmxnet3_tx_buf_info *tbi;
 407
 408                 tbi = tq->buf_info + tq->tx_ring.next2comp;
 409
 410                 vmxnet3_unmap_tx_buf(tbi, adapter->pdev);
 411                 if (tbi->skb) {
 412                         dev_kfree_skb_any(tbi->skb);
 413                         tbi->skb = NULL;
 414                 }
 415                 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
 416         }
 417
 418         /* sanity check, verify all buffers are indeed unmapped and freed */
 419         for (i = 0; i < tq->tx_ring.size; i++) {
 420                 BUG_ON(tq->buf_info[i].skb != NULL ||
 421                        tq->buf_info[i].map_type != VMXNET3_MAP_NONE);
 422         }
 423
 424         tq->tx_ring.gen = VMXNET3_INIT_GEN;
 425         tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
 426
 427         tq->comp_ring.gen = VMXNET3_INIT_GEN;
 428         tq->comp_ring.next2proc = 0;
 429 }
 430
 431
 432 static void
 433 vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq,
 434                    struct vmxnet3_adapter *adapter)
 435 {
 436         if (tq->tx_ring.base) {
 437                 pci_free_consistent(adapter->pdev, tq->tx_ring.size *
 438                                     sizeof(struct Vmxnet3_TxDesc),
 439                                     tq->tx_ring.base, tq->tx_ring.basePA);
 440                 tq->tx_ring.base = NULL;
 441         }
 442         if (tq->data_ring.base) {
 443                 pci_free_consistent(adapter->pdev, tq->data_ring.size *
 444                                     sizeof(struct Vmxnet3_TxDataDesc),
 445                                     tq->data_ring.base, tq->data_ring.basePA);
 446                 tq->data_ring.base = NULL;
 447         }
 448         if (tq->comp_ring.base) {
 449                 pci_free_consistent(adapter->pdev, tq->comp_ring.size *
 450                                     sizeof(struct Vmxnet3_TxCompDesc),
 451                                     tq->comp_ring.base, tq->comp_ring.basePA);
 452                 tq->comp_ring.base = NULL;
 453         }
 454         kfree(tq->buf_info);
 455         tq->buf_info = NULL;
 456 }
 457
 458
 459 /* Destroy all tx queues */
 460 void
 461 vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter)
 462 {
 463         int i;
 464
 465         for (i = 0; i < adapter->num_tx_queues; i++)
 466                 vmxnet3_tq_destroy(&adapter->tx_queue[i], adapter);
 467 }
 468
 469
 470 static void
 471 vmxnet3_tq_init(struct vmxnet3_tx_queue *tq,
 472                 struct vmxnet3_adapter *adapter)
 473 {
 474         int i;
 475
 476         /* reset the tx ring contents to 0 and reset the tx ring states */
 477         memset(tq->tx_ring.base, 0, tq->tx_ring.size *
 478                sizeof(struct Vmxnet3_TxDesc));
 479         tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
 480         tq->tx_ring.gen = VMXNET3_INIT_GEN;
 481
 482         memset(tq->data_ring.base, 0, tq->data_ring.size *
 483                sizeof(struct Vmxnet3_TxDataDesc));
 484
 485         /* reset the tx comp ring contents to 0 and reset comp ring states */
 486         memset(tq->comp_ring.base, 0, tq->comp_ring.size *
 487                sizeof(struct Vmxnet3_TxCompDesc));
 488         tq->comp_ring.next2proc = 0;
 489         tq->comp_ring.gen = VMXNET3_INIT_GEN;
 490
 491         /* reset the bookkeeping data */
 492         memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size);
 493         for (i = 0; i < tq->tx_ring.size; i++)
 494                 tq->buf_info[i].map_type = VMXNET3_MAP_NONE;
 495
 496         /* stats are not reset */
 497 }
 498
 499
 500 static int
 501 vmxnet3_tq_create(struct vmxnet3_tx_queue *tq,
 502                   struct vmxnet3_adapter *adapter)
 503 {
 504         BUG_ON(tq->tx_ring.base || tq->data_ring.base ||
 505                tq->comp_ring.base || tq->buf_info);
 506
 507         tq->tx_ring.base = pci_alloc_consistent(adapter->pdev, tq->tx_ring.size
 508                            * sizeof(struct Vmxnet3_TxDesc),
 509                            &tq->tx_ring.basePA);
 510         if (!tq->tx_ring.base) {
 511                 netdev_err(adapter->netdev, "failed to allocate tx ring\n");
 512                 goto err;
 513         }
 514
 515         tq->data_ring.base = pci_alloc_consistent(adapter->pdev,
 516                              tq->data_ring.size *
 517                              sizeof(struct Vmxnet3_TxDataDesc),
 518                              &tq->data_ring.basePA);
 519         if (!tq->data_ring.base) {
 520                 netdev_err(adapter->netdev, "failed to allocate data ring\n");
 521                 goto err;
 522         }
 523
 524         tq->comp_ring.base = pci_alloc_consistent(adapter->pdev,
 525                              tq->comp_ring.size *
 526                              sizeof(struct Vmxnet3_TxCompDesc),
 527                              &tq->comp_ring.basePA);
 528         if (!tq->comp_ring.base) {
 529                 netdev_err(adapter->netdev, "failed to allocate tx comp ring\n");
 530                 goto err;
 531         }
 532
 533         tq->buf_info = kcalloc(tq->tx_ring.size, sizeof(tq->buf_info[0]),
 534                                GFP_KERNEL);
 535         if (!tq->buf_info)
 536                 goto err;
 537
 538         return 0;
 539
 540 err:
 541         vmxnet3_tq_destroy(tq, adapter);
 542         return -ENOMEM;
 543 }
 544
 545 static void
 546 vmxnet3_tq_cleanup_all(struct vmxnet3_adapter *adapter)
 547 {
 548         int i;
 549
 550         for (i = 0; i < adapter->num_tx_queues; i++)
 551                 vmxnet3_tq_cleanup(&adapter->tx_queue[i], adapter);
 552 }
 553
 554 /*
 555  *    starting from ring->next2fill, allocate rx buffers for the given ring
 556  *    of the rx queue and update the rx desc. stop after @num_to_alloc buffers
 557  *    are allocated or allocation fails
 558  */
 559
 560 static int
 561 vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx,
 562                         int num_to_alloc, struct vmxnet3_adapter *adapter)
 563 {
 564         int num_allocated = 0;
 565         struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx];
 566         struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx];
 567         u32 val;
 568
 569         while (num_allocated <= num_to_alloc) {
 570                 struct vmxnet3_rx_buf_info *rbi;
 571                 union Vmxnet3_GenericDesc *gd;
 572
 573                 rbi = rbi_base + ring->next2fill;
 574                 gd = ring->base + ring->next2fill;
 575
 576                 if (rbi->buf_type == VMXNET3_RX_BUF_SKB) {
 577                         if (rbi->skb == NULL) {
 578                                 rbi->skb = __netdev_alloc_skb_ip_align(adapter->netdev,
 579                                                                        rbi->len,
 580                                                                        GFP_KERNEL);
 581                                 if (unlikely(rbi->skb == NULL)) {
 582                                         rq->stats.rx_buf_alloc_failure++;
 583                                         break;
 584                                 }
 585
 586                                 rbi->dma_addr = pci_map_single(adapter->pdev,
 587                                                 rbi->skb->data, rbi->len,
 588                                                 PCI_DMA_FROMDEVICE);
 589                         } else {
 590                                 /* rx buffer skipped by the device */
 591                         }
 592                         val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT;
 593                 } else {
 594                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE ||
 595                                rbi->len  != PAGE_SIZE);
 596
 597                         if (rbi->page == NULL) {
 598                                 rbi->page = alloc_page(GFP_ATOMIC);
 599                                 if (unlikely(rbi->page == NULL)) {
 600                                         rq->stats.rx_buf_alloc_failure++;
 601                                         break;
 602                                 }
 603                                 rbi->dma_addr = pci_map_page(adapter->pdev,
 604                                                 rbi->page, 0, PAGE_SIZE,
 605                                                 PCI_DMA_FROMDEVICE);
 606                         } else {
 607                                 /* rx buffers skipped by the device */
 608                         }
 609                         val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT;
 610                 }
 611
 612                 BUG_ON(rbi->dma_addr == 0);
 613                 gd->rxd.addr = cpu_to_le64(rbi->dma_addr);
 614                 gd->dword[2] = cpu_to_le32((!ring->gen << VMXNET3_RXD_GEN_SHIFT)
 615                                            | val | rbi->len);
 616
 617                 /* Fill the last buffer but dont mark it ready, or else the
 618                  * device will think that the queue is full */
 619                 if (num_allocated == num_to_alloc)
 620                         break;
 621
 622                 gd->dword[2] |= cpu_to_le32(ring->gen << VMXNET3_RXD_GEN_SHIFT);
 623                 num_allocated++;
 624                 vmxnet3_cmd_ring_adv_next2fill(ring);
 625         }
 626
 627         netdev_dbg(adapter->netdev,
 628                 "alloc_rx_buf: %d allocated, next2fill %u, next2comp %u\n",
 629                 num_allocated, ring->next2fill, ring->next2comp);
 630
 631         /* so that the device can distinguish a full ring and an empty ring */
 632         BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp);
 633
 634         return num_allocated;
 635 }
 636
 637
 638 static void
 639 vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd,
 640                     struct vmxnet3_rx_buf_info *rbi)
 641 {
 642         struct skb_frag_struct *frag = skb_shinfo(skb)->frags +
 643                 skb_shinfo(skb)->nr_frags;
 644
 645         BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS);
 646
 647         __skb_frag_set_page(frag, rbi->page);
 648         frag->page_offset = 0;
 649         skb_frag_size_set(frag, rcd->len);
 650         skb->data_len += rcd->len;
 651         skb->truesize += PAGE_SIZE;
 652         skb_shinfo(skb)->nr_frags++;
 653 }
 654
 655
 656 static void
 657 vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx,
 658                 struct vmxnet3_tx_queue *tq, struct pci_dev *pdev,
 659                 struct vmxnet3_adapter *adapter)
 660 {
 661         u32 dw2, len;
 662         unsigned long buf_offset;
 663         int i;
 664         union Vmxnet3_GenericDesc *gdesc;
 665         struct vmxnet3_tx_buf_info *tbi = NULL;
 666
 667         BUG_ON(ctx->copy_size > skb_headlen(skb));
 668
 669         /* use the previous gen bit for the SOP desc */
 670         dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT;
 671
 672         ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill;
 673         gdesc = ctx->sop_txd; /* both loops below can be skipped */
 674
 675         /* no need to map the buffer if headers are copied */
 676         if (ctx->copy_size) {
 677                 ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA +
 678                                         tq->tx_ring.next2fill *
 679                                         sizeof(struct Vmxnet3_TxDataDesc));
 680                 ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size);
 681                 ctx->sop_txd->dword[3] = 0;
 682
 683                 tbi = tq->buf_info + tq->tx_ring.next2fill;
 684                 tbi->map_type = VMXNET3_MAP_NONE;
 685
 686                 netdev_dbg(adapter->netdev,
 687                         "txd[%u]: 0x%Lx 0x%x 0x%x\n",
 688                         tq->tx_ring.next2fill,
 689                         le64_to_cpu(ctx->sop_txd->txd.addr),
 690                         ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]);
 691                 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
 692
 693                 /* use the right gen for non-SOP desc */
 694                 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
 695         }
 696
 697         /* linear part can use multiple tx desc if it's big */
 698         len = skb_headlen(skb) - ctx->copy_size;
 699         buf_offset = ctx->copy_size;
 700         while (len) {
 701                 u32 buf_size;
 702
 703                 if (len < VMXNET3_MAX_TX_BUF_SIZE) {
 704                         buf_size = len;
 705                         dw2 |= len;
 706                 } else {
 707                         buf_size = VMXNET3_MAX_TX_BUF_SIZE;
 708                         /* spec says that for TxDesc.len, 0 == 2^14 */
 709                 }
 710
 711                 tbi = tq->buf_info + tq->tx_ring.next2fill;
 712                 tbi->map_type = VMXNET3_MAP_SINGLE;
 713                 tbi->dma_addr = pci_map_single(adapter->pdev,
 714                                 skb->data + buf_offset, buf_size,
 715                                 PCI_DMA_TODEVICE);
 716
 717                 tbi->len = buf_size;
 718
 719                 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
 720                 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
 721
 722                 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
 723                 gdesc->dword[2] = cpu_to_le32(dw2);
 724                 gdesc->dword[3] = 0;
 725
 726                 netdev_dbg(adapter->netdev,
 727                         "txd[%u]: 0x%Lx 0x%x 0x%x\n",
 728                         tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
 729                         le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
 730                 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
 731                 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
 732
 733                 len -= buf_size;
 734                 buf_offset += buf_size;
 735         }
 736
 737         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
 738                 const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
 739                 u32 buf_size;
 740
 741                 buf_offset = 0;
 742                 len = skb_frag_size(frag);
 743                 while (len) {
 744                         tbi = tq->buf_info + tq->tx_ring.next2fill;
 745                         if (len < VMXNET3_MAX_TX_BUF_SIZE) {
 746                                 buf_size = len;
 747                                 dw2 |= len;
 748                         } else {
 749                                 buf_size = VMXNET3_MAX_TX_BUF_SIZE;
 750                                 /* spec says that for TxDesc.len, 0 == 2^14 */
 751                         }
 752                         tbi->map_type = VMXNET3_MAP_PAGE;
 753                         tbi->dma_addr = skb_frag_dma_map(&adapter->pdev->dev, frag,
 754                                                          buf_offset, buf_size,
 755                                                          DMA_TO_DEVICE);
 756
 757                         tbi->len = buf_size;
 758
 759                         gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
 760                         BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
 761
 762                         gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
 763                         gdesc->dword[2] = cpu_to_le32(dw2);
 764                         gdesc->dword[3] = 0;
 765
 766                         netdev_dbg(adapter->netdev,
 767                                 "txd[%u]: 0x%llu %u %u\n",
 768                                 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
 769                                 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
 770                         vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
 771                         dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
 772
 773                         len -= buf_size;
 774                         buf_offset += buf_size;
 775                 }
 776         }
 777
 778         ctx->eop_txd = gdesc;
 779
 780         /* set the last buf_info for the pkt */
 781         tbi->skb = skb;
 782         tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base;
 783 }
 784
 785
 786 /* Init all tx queues */
 787 static void
 788 vmxnet3_tq_init_all(struct vmxnet3_adapter *adapter)
 789 {
 790         int i;
 791
 792         for (i = 0; i < adapter->num_tx_queues; i++)
 793                 vmxnet3_tq_init(&adapter->tx_queue[i], adapter);
 794 }
 795
 796
 797 /*
 798  *    parse and copy relevant protocol headers:
 799  *      For a tso pkt, relevant headers are L2/3/4 including options
 800  *      For a pkt requesting csum offloading, they are L2/3 and may include L4
 801  *      if it's a TCP/UDP pkt
 802  *
 803  * Returns:
 804  *    -1:  error happens during parsing
 805  *     0:  protocol headers parsed, but too big to be copied
 806  *     1:  protocol headers parsed and copied
 807  *
 808  * Other effects:
 809  *    1. related *ctx fields are updated.
 810  *    2. ctx->copy_size is # of bytes copied
 811  *    3. the portion copied is guaranteed to be in the linear part
 812  *
 813  */
 814 static int
 815 vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
 816                            struct vmxnet3_tx_ctx *ctx,
 817                            struct vmxnet3_adapter *adapter)
 818 {
 819         struct Vmxnet3_TxDataDesc *tdd;
 820
 821         if (ctx->mss) { /* TSO */
 822                 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
 823                 ctx->l4_hdr_size = tcp_hdrlen(skb);
 824                 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size;
 825         } else {
 826                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
 827                         ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb);
 828
 829                         if (ctx->ipv4) {
 830                                 const struct iphdr *iph = ip_hdr(skb);
 831
 832                                 if (iph->protocol == IPPROTO_TCP)
 833                                         ctx->l4_hdr_size = tcp_hdrlen(skb);
 834                                 else if (iph->protocol == IPPROTO_UDP)
 835                                         ctx->l4_hdr_size = sizeof(struct udphdr);
 836                                 else
 837                                         ctx->l4_hdr_size = 0;
 838                         } else {
 839                                 /* for simplicity, don't copy L4 headers */
 840                                 ctx->l4_hdr_size = 0;
 841                         }
 842                         ctx->copy_size = min(ctx->eth_ip_hdr_size +
 843                                          ctx->l4_hdr_size, skb->len);
 844                 } else {
 845                         ctx->eth_ip_hdr_size = 0;
 846                         ctx->l4_hdr_size = 0;
 847                         /* copy as much as allowed */
 848                         ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE
 849                                              , skb_headlen(skb));
 850                 }
 851
 852                 /* make sure headers are accessible directly */
 853                 if (unlikely(!pskb_may_pull(skb, ctx->copy_size)))
 854                         goto err;
 855         }
 856
 857         if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) {
 858                 tq->stats.oversized_hdr++;
 859                 ctx->copy_size = 0;
 860                 return 0;
 861         }
 862
 863         tdd = tq->data_ring.base + tq->tx_ring.next2fill;
 864
 865         memcpy(tdd->data, skb->data, ctx->copy_size);
 866         netdev_dbg(adapter->netdev,
 867                 "copy %u bytes to dataRing[%u]\n",
 868                 ctx->copy_size, tq->tx_ring.next2fill);
 869         return 1;
 870
 871 err:
 872         return -1;
 873 }
 874
 875
 876 static void
 877 vmxnet3_prepare_tso(struct sk_buff *skb,
 878                     struct vmxnet3_tx_ctx *ctx)
 879 {
 880         struct tcphdr *tcph = tcp_hdr(skb);
 881
 882         if (ctx->ipv4) {
 883                 struct iphdr *iph = ip_hdr(skb);
 884
 885                 iph->check = 0;
 886                 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0,
 887                                                  IPPROTO_TCP, 0);
 888         } else {
 889                 struct ipv6hdr *iph = ipv6_hdr(skb);
 890
 891                 tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0,
 892                                                IPPROTO_TCP, 0);
 893         }
 894 }
 895
 896 static int txd_estimate(const struct sk_buff *skb)
 897 {
 898         int count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
 899         int i;
 900
 901         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
 902                 const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
 903
 904                 count += VMXNET3_TXD_NEEDED(skb_frag_size(frag));
 905         }
 906         return count;
 907 }
 908
 909 /*
 910  * Transmits a pkt thru a given tq
 911  * Returns:
 912  *    NETDEV_TX_OK:      descriptors are setup successfully
 913  *    NETDEV_TX_OK:      error occurred, the pkt is dropped
 914  *    NETDEV_TX_BUSY:    tx ring is full, queue is stopped
 915  *
 916  * Side-effects:
 917  *    1. tx ring may be changed
 918  *    2. tq stats may be updated accordingly
 919  *    3. shared->txNumDeferred may be updated
 920  */
 921
 922 static int
 923 vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
 924                 struct vmxnet3_adapter *adapter, struct net_device *netdev)
 925 {
 926         int ret;
 927         u32 count;
 928         unsigned long flags;
 929         struct vmxnet3_tx_ctx ctx;
 930         union Vmxnet3_GenericDesc *gdesc;
 931 #ifdef __BIG_ENDIAN_BITFIELD
 932         /* Use temporary descriptor to avoid touching bits multiple times */
 933         union Vmxnet3_GenericDesc tempTxDesc;
 934 #endif
 935
 936         count = txd_estimate(skb);
 937
 938         ctx.ipv4 = (vlan_get_protocol(skb) == cpu_to_be16(ETH_P_IP));
 939
 940         ctx.mss = skb_shinfo(skb)->gso_size;
 941         if (ctx.mss) {
 942                 if (skb_header_cloned(skb)) {
 943                         if (unlikely(pskb_expand_head(skb, 0, 0,
 944                                                       GFP_ATOMIC) != 0)) {
 945                                 tq->stats.drop_tso++;
 946                                 goto drop_pkt;
 947                         }
 948                         tq->stats.copy_skb_header++;
 949                 }
 950                 vmxnet3_prepare_tso(skb, &ctx);
 951         } else {
 952                 if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) {
 953
 954                         /* non-tso pkts must not use more than
 955                          * VMXNET3_MAX_TXD_PER_PKT entries
 956                          */
 957                         if (skb_linearize(skb) != 0) {
 958                                 tq->stats.drop_too_many_frags++;
 959                                 goto drop_pkt;
 960                         }
 961                         tq->stats.linearized++;
 962
 963                         /* recalculate the # of descriptors to use */
 964                         count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
 965                 }
 966         }
 967
 968         spin_lock_irqsave(&tq->tx_lock, flags);
 969
 970         if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) {
 971                 tq->stats.tx_ring_full++;
 972                 netdev_dbg(adapter->netdev,
 973                         "tx queue stopped on %s, next2comp %u"
 974                         " next2fill %u\n", adapter->netdev->name,
 975                         tq->tx_ring.next2comp, tq->tx_ring.next2fill);
 976
 977                 vmxnet3_tq_stop(tq, adapter);
 978                 spin_unlock_irqrestore(&tq->tx_lock, flags);
 979                 return NETDEV_TX_BUSY;
 980         }
 981
 982
 983         ret = vmxnet3_parse_and_copy_hdr(skb, tq, &ctx, adapter);
 984         if (ret >= 0) {
 985                 BUG_ON(ret <= 0 && ctx.copy_size != 0);
 986                 /* hdrs parsed, check against other limits */
 987                 if (ctx.mss) {
 988                         if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size >
 989                                      VMXNET3_MAX_TX_BUF_SIZE)) {
 990                                 goto hdr_too_big;
 991                         }
 992                 } else {
 993                         if (skb->ip_summed == CHECKSUM_PARTIAL) {
 994                                 if (unlikely(ctx.eth_ip_hdr_size +
 995                                              skb->csum_offset >
 996                                              VMXNET3_MAX_CSUM_OFFSET)) {
 997                                         goto hdr_too_big;
 998                                 }
 999                         }
1000                 }
1001         } else {
1002                 tq->stats.drop_hdr_inspect_err++;
1003                 goto unlock_drop_pkt;
1004         }
1005
1006         /* fill tx descs related to addr & len */
1007         vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter);
1008
1009         /* setup the EOP desc */
1010         ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP);
1011
1012         /* setup the SOP desc */
1013 #ifdef __BIG_ENDIAN_BITFIELD
1014         gdesc = &tempTxDesc;
1015         gdesc->dword[2] = ctx.sop_txd->dword[2];
1016         gdesc->dword[3] = ctx.sop_txd->dword[3];
1017 #else
1018         gdesc = ctx.sop_txd;
1019 #endif
1020         if (ctx.mss) {
1021                 gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size;
1022                 gdesc->txd.om = VMXNET3_OM_TSO;
1023                 gdesc->txd.msscof = ctx.mss;
1024                 le32_add_cpu(&tq->shared->txNumDeferred, (skb->len -
1025                              gdesc->txd.hlen + ctx.mss - 1) / ctx.mss);
1026         } else {
1027                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1028                         gdesc->txd.hlen = ctx.eth_ip_hdr_size;
1029                         gdesc->txd.om = VMXNET3_OM_CSUM;
1030                         gdesc->txd.msscof = ctx.eth_ip_hdr_size +
1031                                             skb->csum_offset;
1032                 } else {
1033                         gdesc->txd.om = 0;
1034                         gdesc->txd.msscof = 0;
1035                 }
1036                 le32_add_cpu(&tq->shared->txNumDeferred, 1);
1037         }
1038
1039         if (vlan_tx_tag_present(skb)) {
1040                 gdesc->txd.ti = 1;
1041                 gdesc->txd.tci = vlan_tx_tag_get(skb);
1042         }
1043
1044         /* finally flips the GEN bit of the SOP desc. */
1045         gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^
1046                                                   VMXNET3_TXD_GEN);
1047 #ifdef __BIG_ENDIAN_BITFIELD
1048         /* Finished updating in bitfields of Tx Desc, so write them in original
1049          * place.
1050          */
1051         vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc,
1052                            (struct Vmxnet3_TxDesc *)ctx.sop_txd);
1053         gdesc = ctx.sop_txd;
1054 #endif
1055         netdev_dbg(adapter->netdev,
1056                 "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n",
1057                 (u32)(ctx.sop_txd -
1058                 tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr),
1059                 le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3]));
1060
1061         spin_unlock_irqrestore(&tq->tx_lock, flags);
1062
1063         if (le32_to_cpu(tq->shared->txNumDeferred) >=
1064                                         le32_to_cpu(tq->shared->txThreshold)) {
1065                 tq->shared->txNumDeferred = 0;
1066                 VMXNET3_WRITE_BAR0_REG(adapter,
1067                                        VMXNET3_REG_TXPROD + tq->qid * 8,
1068                                        tq->tx_ring.next2fill);
1069         }
1070
1071         return NETDEV_TX_OK;
1072
1073 hdr_too_big:
1074         tq->stats.drop_oversized_hdr++;
1075 unlock_drop_pkt:
1076         spin_unlock_irqrestore(&tq->tx_lock, flags);
1077 drop_pkt:
1078         tq->stats.drop_total++;
1079         dev_kfree_skb(skb);
1080         return NETDEV_TX_OK;
1081 }
1082
1083
1084 static netdev_tx_t
1085 vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1086 {
1087         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1088
1089         BUG_ON(skb->queue_mapping > adapter->num_tx_queues);
1090         return vmxnet3_tq_xmit(skb,
1091                                &adapter->tx_queue[skb->queue_mapping],
1092                                adapter, netdev);
1093 }
1094
1095
1096 static void
1097 vmxnet3_rx_csum(struct vmxnet3_adapter *adapter,
1098                 struct sk_buff *skb,
1099                 union Vmxnet3_GenericDesc *gdesc)
1100 {
1101         if (!gdesc->rcd.cnc && adapter->netdev->features & NETIF_F_RXCSUM) {
1102                 /* typical case: TCP/UDP over IP and both csums are correct */
1103                 if ((le32_to_cpu(gdesc->dword[3]) & VMXNET3_RCD_CSUM_OK) ==
1104                                                         VMXNET3_RCD_CSUM_OK) {
1105                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1106                         BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp));
1107                         BUG_ON(!(gdesc->rcd.v4  || gdesc->rcd.v6));
1108                         BUG_ON(gdesc->rcd.frg);
1109                 } else {
1110                         if (gdesc->rcd.csum) {
1111                                 skb->csum = htons(gdesc->rcd.csum);
1112                                 skb->ip_summed = CHECKSUM_PARTIAL;
1113                         } else {
1114                                 skb_checksum_none_assert(skb);
1115                         }
1116                 }
1117         } else {
1118                 skb_checksum_none_assert(skb);
1119         }
1120 }
1121
1122
1123 static void
1124 vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd,
1125                  struct vmxnet3_rx_ctx *ctx,  struct vmxnet3_adapter *adapter)
1126 {
1127         rq->stats.drop_err++;
1128         if (!rcd->fcs)
1129                 rq->stats.drop_fcs++;
1130
1131         rq->stats.drop_total++;
1132
1133         /*
1134          * We do not unmap and chain the rx buffer to the skb.
1135          * We basically pretend this buffer is not used and will be recycled
1136          * by vmxnet3_rq_alloc_rx_buf()
1137          */
1138
1139         /*
1140          * ctx->skb may be NULL if this is the first and the only one
1141          * desc for the pkt
1142          */
1143         if (ctx->skb)
1144                 dev_kfree_skb_irq(ctx->skb);
1145
1146         ctx->skb = NULL;
1147 }
1148
1149
1150 static int
1151 vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
1152                        struct vmxnet3_adapter *adapter, int quota)
1153 {
1154         static const u32 rxprod_reg[2] = {
1155                 VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2
1156         };
1157         u32 num_rxd = 0;
1158         bool skip_page_frags = false;
1159         struct Vmxnet3_RxCompDesc *rcd;
1160         struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx;
1161 #ifdef __BIG_ENDIAN_BITFIELD
1162         struct Vmxnet3_RxDesc rxCmdDesc;
1163         struct Vmxnet3_RxCompDesc rxComp;
1164 #endif
1165         vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd,
1166                           &rxComp);
1167         while (rcd->gen == rq->comp_ring.gen) {
1168                 struct vmxnet3_rx_buf_info *rbi;
1169                 struct sk_buff *skb, *new_skb = NULL;
1170                 struct page *new_page = NULL;
1171                 int num_to_alloc;
1172                 struct Vmxnet3_RxDesc *rxd;
1173                 u32 idx, ring_idx;
1174                 struct vmxnet3_cmd_ring *ring = NULL;
1175                 if (num_rxd >= quota) {
1176                         /* we may stop even before we see the EOP desc of
1177                          * the current pkt
1178                          */
1179                         break;
1180                 }
1181                 num_rxd++;
1182                 BUG_ON(rcd->rqID != rq->qid && rcd->rqID != rq->qid2);
1183                 idx = rcd->rxdIdx;
1184                 ring_idx = rcd->rqID < adapter->num_rx_queues ? 0 : 1;
1185                 ring = rq->rx_ring + ring_idx;
1186                 vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd,
1187                                   &rxCmdDesc);
1188                 rbi = rq->buf_info[ring_idx] + idx;
1189
1190                 BUG_ON(rxd->addr != rbi->dma_addr ||
1191                        rxd->len != rbi->len);
1192
1193                 if (unlikely(rcd->eop && rcd->err)) {
1194                         vmxnet3_rx_error(rq, rcd, ctx, adapter);
1195                         goto rcd_done;
1196                 }
1197
1198                 if (rcd->sop) { /* first buf of the pkt */
1199                         BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD ||
1200                                rcd->rqID != rq->qid);
1201
1202                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB);
1203                         BUG_ON(ctx->skb != NULL || rbi->skb == NULL);
1204
1205                         if (unlikely(rcd->len == 0)) {
1206                                 /* Pretend the rx buffer is skipped. */
1207                                 BUG_ON(!(rcd->sop && rcd->eop));
1208                                 netdev_dbg(adapter->netdev,
1209                                         "rxRing[%u][%u] 0 length\n",
1210                                         ring_idx, idx);
1211                                 goto rcd_done;
1212                         }
1213
1214                         skip_page_frags = false;
1215                         ctx->skb = rbi->skb;
1216                         new_skb = netdev_alloc_skb_ip_align(adapter->netdev,
1217                                                             rbi->len);
1218                         if (new_skb == NULL) {
1219                                 /* Skb allocation failed, do not handover this
1220                                  * skb to stack. Reuse it. Drop the existing pkt
1221                                  */
1222                                 rq->stats.rx_buf_alloc_failure++;
1223                                 ctx->skb = NULL;
1224                                 rq->stats.drop_total++;
1225                                 skip_page_frags = true;
1226                                 goto rcd_done;
1227                         }
1228
1229                         pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len,
1230                                          PCI_DMA_FROMDEVICE);
1231
1232                         skb_put(ctx->skb, rcd->len);
1233
1234                         /* Immediate refill */
1235                         rbi->skb = new_skb;
1236                         rbi->dma_addr = pci_map_single(adapter->pdev,
1237                                                        rbi->skb->data, rbi->len,
1238                                                        PCI_DMA_FROMDEVICE);
1239                         rxd->addr = cpu_to_le64(rbi->dma_addr);
1240                         rxd->len = rbi->len;
1241
1242                 } else {
1243                         BUG_ON(ctx->skb == NULL && !skip_page_frags);
1244
1245                         /* non SOP buffer must be type 1 in most cases */
1246                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE);
1247                         BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY);
1248
1249                         /* If an sop buffer was dropped, skip all
1250                          * following non-sop fragments. They will be reused.
1251                          */
1252                         if (skip_page_frags)
1253                                 goto rcd_done;
1254
1255                         new_page = alloc_page(GFP_ATOMIC);
1256                         if (unlikely(new_page == NULL)) {
1257                                 /* Replacement page frag could not be allocated.
1258                                  * Reuse this page. Drop the pkt and free the
1259                                  * skb which contained this page as a frag. Skip
1260                                  * processing all the following non-sop frags.
1261                                  */
1262                                 rq->stats.rx_buf_alloc_failure++;
1263                                 dev_kfree_skb(ctx->skb);
1264                                 ctx->skb = NULL;
1265                                 skip_page_frags = true;
1266                                 goto rcd_done;
1267                         }
1268
1269                         if (rcd->len) {
1270                                 pci_unmap_page(adapter->pdev,
1271                                                rbi->dma_addr, rbi->len,
1272                                                PCI_DMA_FROMDEVICE);
1273
1274                                 vmxnet3_append_frag(ctx->skb, rcd, rbi);
1275                         }
1276
1277                         /* Immediate refill */
1278                         rbi->page = new_page;
1279                         rbi->dma_addr = pci_map_page(adapter->pdev, rbi->page,
1280                                                      0, PAGE_SIZE,
1281                                                      PCI_DMA_FROMDEVICE);
1282                         rxd->addr = cpu_to_le64(rbi->dma_addr);
1283                         rxd->len = rbi->len;
1284                 }
1285
1286
1287                 skb = ctx->skb;
1288                 if (rcd->eop) {
1289                         skb->len += skb->data_len;
1290
1291                         vmxnet3_rx_csum(adapter, skb,
1292                                         (union Vmxnet3_GenericDesc *)rcd);
1293                         skb->protocol = eth_type_trans(skb, adapter->netdev);
1294
1295                         if (unlikely(rcd->ts))
1296                                 __vlan_hwaccel_put_tag(skb, rcd->tci);
1297
1298                         if (adapter->netdev->features & NETIF_F_LRO)
1299                                 netif_receive_skb(skb);
1300                         else
1301                                 napi_gro_receive(&rq->napi, skb);
1302
1303                         ctx->skb = NULL;
1304                 }
1305
1306 rcd_done:
1307                 /* device may have skipped some rx descs */
1308                 ring->next2comp = idx;
1309                 num_to_alloc = vmxnet3_cmd_ring_desc_avail(ring);
1310                 ring = rq->rx_ring + ring_idx;
1311                 while (num_to_alloc) {
1312                         vmxnet3_getRxDesc(rxd, &ring->base[ring->next2fill].rxd,
1313                                           &rxCmdDesc);
1314                         BUG_ON(!rxd->addr);
1315
1316                         /* Recv desc is ready to be used by the device */
1317                         rxd->gen = ring->gen;
1318                         vmxnet3_cmd_ring_adv_next2fill(ring);
1319                         num_to_alloc--;
1320                 }
1321
1322                 /* if needed, update the register */
1323                 if (unlikely(rq->shared->updateRxProd)) {
1324                         VMXNET3_WRITE_BAR0_REG(adapter,
1325                                                rxprod_reg[ring_idx] + rq->qid * 8,
1326                                                ring->next2fill);
1327                 }
1328
1329                 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring);
1330                 vmxnet3_getRxComp(rcd,
1331                                   &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp);
1332         }
1333
1334         return num_rxd;
1335 }
1336
1337
1338 static void
1339 vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq,
1340                    struct vmxnet3_adapter *adapter)
1341 {
1342         u32 i, ring_idx;
1343         struct Vmxnet3_RxDesc *rxd;
1344
1345         for (ring_idx = 0; ring_idx < 2; ring_idx++) {
1346                 for (i = 0; i < rq->rx_ring[ring_idx].size; i++) {
1347 #ifdef __BIG_ENDIAN_BITFIELD
1348                         struct Vmxnet3_RxDesc rxDesc;
1349 #endif
1350                         vmxnet3_getRxDesc(rxd,
1351                                 &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc);
1352
1353                         if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD &&
1354                                         rq->buf_info[ring_idx][i].skb) {
1355                                 pci_unmap_single(adapter->pdev, rxd->addr,
1356                                                  rxd->len, PCI_DMA_FROMDEVICE);
1357                                 dev_kfree_skb(rq->buf_info[ring_idx][i].skb);
1358                                 rq->buf_info[ring_idx][i].skb = NULL;
1359                         } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY &&
1360                                         rq->buf_info[ring_idx][i].page) {
1361                                 pci_unmap_page(adapter->pdev, rxd->addr,
1362                                                rxd->len, PCI_DMA_FROMDEVICE);
1363                                 put_page(rq->buf_info[ring_idx][i].page);
1364                                 rq->buf_info[ring_idx][i].page = NULL;
1365                         }
1366                 }
1367
1368                 rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN;
1369                 rq->rx_ring[ring_idx].next2fill =
1370                                         rq->rx_ring[ring_idx].next2comp = 0;
1371         }
1372
1373         rq->comp_ring.gen = VMXNET3_INIT_GEN;
1374         rq->comp_ring.next2proc = 0;
1375 }
1376
1377
1378 static void
1379 vmxnet3_rq_cleanup_all(struct vmxnet3_adapter *adapter)
1380 {
1381         int i;
1382
1383         for (i = 0; i < adapter->num_rx_queues; i++)
1384                 vmxnet3_rq_cleanup(&adapter->rx_queue[i], adapter);
1385 }
1386
1387
1388 void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq,
1389                         struct vmxnet3_adapter *adapter)
1390 {
1391         int i;
1392         int j;
1393
1394         /* all rx buffers must have already been freed */
1395         for (i = 0; i < 2; i++) {
1396                 if (rq->buf_info[i]) {
1397                         for (j = 0; j < rq->rx_ring[i].size; j++)
1398                                 BUG_ON(rq->buf_info[i][j].page != NULL);
1399                 }
1400         }
1401
1402
1403         kfree(rq->buf_info[0]);
1404
1405         for (i = 0; i < 2; i++) {
1406                 if (rq->rx_ring[i].base) {
1407                         pci_free_consistent(adapter->pdev, rq->rx_ring[i].size
1408                                             * sizeof(struct Vmxnet3_RxDesc),
1409                                             rq->rx_ring[i].base,
1410                                             rq->rx_ring[i].basePA);
1411                         rq->rx_ring[i].base = NULL;
1412                 }
1413                 rq->buf_info[i] = NULL;
1414         }
1415
1416         if (rq->comp_ring.base) {
1417                 pci_free_consistent(adapter->pdev, rq->comp_ring.size *
1418                                     sizeof(struct Vmxnet3_RxCompDesc),
1419                                     rq->comp_ring.base, rq->comp_ring.basePA);
1420                 rq->comp_ring.base = NULL;
1421         }
1422 }
1423
1424
1425 static int
1426 vmxnet3_rq_init(struct vmxnet3_rx_queue *rq,
1427                 struct vmxnet3_adapter  *adapter)
1428 {
1429         int i;
1430
1431         /* initialize buf_info */
1432         for (i = 0; i < rq->rx_ring[0].size; i++) {
1433
1434                 /* 1st buf for a pkt is skbuff */
1435                 if (i % adapter->rx_buf_per_pkt == 0) {
1436                         rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB;
1437                         rq->buf_info[0][i].len = adapter->skb_buf_size;
1438                 } else { /* subsequent bufs for a pkt is frag */
1439                         rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE;
1440                         rq->buf_info[0][i].len = PAGE_SIZE;
1441                 }
1442         }
1443         for (i = 0; i < rq->rx_ring[1].size; i++) {
1444                 rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE;
1445                 rq->buf_info[1][i].len = PAGE_SIZE;
1446         }
1447
1448         /* reset internal state and allocate buffers for both rings */
1449         for (i = 0; i < 2; i++) {
1450                 rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0;
1451
1452                 memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size *
1453                        sizeof(struct Vmxnet3_RxDesc));
1454                 rq->rx_ring[i].gen = VMXNET3_INIT_GEN;
1455         }
1456         if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1,
1457                                     adapter) == 0) {
1458                 /* at least has 1 rx buffer for the 1st ring */
1459                 return -ENOMEM;
1460         }
1461         vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter);
1462
1463         /* reset the comp ring */
1464         rq->comp_ring.next2proc = 0;
1465         memset(rq->comp_ring.base, 0, rq->comp_ring.size *
1466                sizeof(struct Vmxnet3_RxCompDesc));
1467         rq->comp_ring.gen = VMXNET3_INIT_GEN;
1468
1469         /* reset rxctx */
1470         rq->rx_ctx.skb = NULL;
1471
1472         /* stats are not reset */
1473         return 0;
1474 }
1475
1476
1477 static int
1478 vmxnet3_rq_init_all(struct vmxnet3_adapter *adapter)
1479 {
1480         int i, err = 0;
1481
1482         for (i = 0; i < adapter->num_rx_queues; i++) {
1483                 err = vmxnet3_rq_init(&adapter->rx_queue[i], adapter);
1484                 if (unlikely(err)) {
1485                         dev_err(&adapter->netdev->dev, "%s: failed to "
1486                                 "initialize rx queue%i\n",
1487                                 adapter->netdev->name, i);
1488                         break;
1489                 }
1490         }
1491         return err;
1492
1493 }
1494
1495
1496 static int
1497 vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter)
1498 {
1499         int i;
1500         size_t sz;
1501         struct vmxnet3_rx_buf_info *bi;
1502
1503         for (i = 0; i < 2; i++) {
1504
1505                 sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc);
1506                 rq->rx_ring[i].base = pci_alloc_consistent(adapter->pdev, sz,
1507                                                         &rq->rx_ring[i].basePA);
1508                 if (!rq->rx_ring[i].base) {
1509                         netdev_err(adapter->netdev,
1510                                    "failed to allocate rx ring %d\n", i);
1511                         goto err;
1512                 }
1513         }
1514
1515         sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc);
1516         rq->comp_ring.base = pci_alloc_consistent(adapter->pdev, sz,
1517                                                   &rq->comp_ring.basePA);
1518         if (!rq->comp_ring.base) {
1519                 netdev_err(adapter->netdev, "failed to allocate rx comp ring\n");
1520                 goto err;
1521         }
1522
1523         sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size +
1524                                                    rq->rx_ring[1].size);
1525         bi = kzalloc(sz, GFP_KERNEL);
1526         if (!bi)
1527                 goto err;
1528
1529         rq->buf_info[0] = bi;
1530         rq->buf_info[1] = bi + rq->rx_ring[0].size;
1531
1532         return 0;
1533
1534 err:
1535         vmxnet3_rq_destroy(rq, adapter);
1536         return -ENOMEM;
1537 }
1538
1539
1540 static int
1541 vmxnet3_rq_create_all(struct vmxnet3_adapter *adapter)
1542 {
1543         int i, err = 0;
1544
1545         for (i = 0; i < adapter->num_rx_queues; i++) {
1546                 err = vmxnet3_rq_create(&adapter->rx_queue[i], adapter);
1547                 if (unlikely(err)) {
1548                         dev_err(&adapter->netdev->dev,
1549                                 "%s: failed to create rx queue%i\n",
1550                                 adapter->netdev->name, i);
1551                         goto err_out;
1552                 }
1553         }
1554         return err;
1555 err_out:
1556         vmxnet3_rq_destroy_all(adapter);
1557         return err;
1558
1559 }
1560
1561 /* Multiple queue aware polling function for tx and rx */
1562
1563 static int
1564 vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget)
1565 {
1566         int rcd_done = 0, i;
1567         if (unlikely(adapter->shared->ecr))
1568                 vmxnet3_process_events(adapter);
1569         for (i = 0; i < adapter->num_tx_queues; i++)
1570                 vmxnet3_tq_tx_complete(&adapter->tx_queue[i], adapter);
1571
1572         for (i = 0; i < adapter->num_rx_queues; i++)
1573                 rcd_done += vmxnet3_rq_rx_complete(&adapter->rx_queue[i],
1574                                                    adapter, budget);
1575         return rcd_done;
1576 }
1577
1578
1579 static int
1580 vmxnet3_poll(struct napi_struct *napi, int budget)
1581 {
1582         struct vmxnet3_rx_queue *rx_queue = container_of(napi,
1583                                           struct vmxnet3_rx_queue, napi);
1584         int rxd_done;
1585
1586         rxd_done = vmxnet3_do_poll(rx_queue->adapter, budget);
1587
1588         if (rxd_done < budget) {
1589                 napi_complete(napi);
1590                 vmxnet3_enable_all_intrs(rx_queue->adapter);
1591         }
1592         return rxd_done;
1593 }
1594
1595 /*
1596  * NAPI polling function for MSI-X mode with multiple Rx queues
1597  * Returns the # of the NAPI credit consumed (# of rx descriptors processed)
1598  */
1599
1600 static int
1601 vmxnet3_poll_rx_only(struct napi_struct *napi, int budget)
1602 {
1603         struct vmxnet3_rx_queue *rq = container_of(napi,
1604                                                 struct vmxnet3_rx_queue, napi);
1605         struct vmxnet3_adapter *adapter = rq->adapter;
1606         int rxd_done;
1607
1608         /* When sharing interrupt with corresponding tx queue, process
1609          * tx completions in that queue as well
1610          */
1611         if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) {
1612                 struct vmxnet3_tx_queue *tq =
1613                                 &adapter->tx_queue[rq - adapter->rx_queue];
1614                 vmxnet3_tq_tx_complete(tq, adapter);
1615         }
1616
1617         rxd_done = vmxnet3_rq_rx_complete(rq, adapter, budget);
1618
1619         if (rxd_done < budget) {
1620                 napi_complete(napi);
1621                 vmxnet3_enable_intr(adapter, rq->comp_ring.intr_idx);
1622         }
1623         return rxd_done;
1624 }
1625
1626
1627 #ifdef CONFIG_PCI_MSI
1628
1629 /*
1630  * Handle completion interrupts on tx queues
1631  * Returns whether or not the intr is handled
1632  */
1633
1634 static irqreturn_t
1635 vmxnet3_msix_tx(int irq, void *data)
1636 {
1637         struct vmxnet3_tx_queue *tq = data;
1638         struct vmxnet3_adapter *adapter = tq->adapter;
1639
1640         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1641                 vmxnet3_disable_intr(adapter, tq->comp_ring.intr_idx);
1642
1643         /* Handle the case where only one irq is allocate for all tx queues */
1644         if (adapter->share_intr == VMXNET3_INTR_TXSHARE) {
1645                 int i;
1646                 for (i = 0; i < adapter->num_tx_queues; i++) {
1647                         struct vmxnet3_tx_queue *txq = &adapter->tx_queue[i];
1648                         vmxnet3_tq_tx_complete(txq, adapter);
1649                 }
1650         } else {
1651                 vmxnet3_tq_tx_complete(tq, adapter);
1652         }
1653         vmxnet3_enable_intr(adapter, tq->comp_ring.intr_idx);
1654
1655         return IRQ_HANDLED;
1656 }
1657
1658
1659 /*
1660  * Handle completion interrupts on rx queues. Returns whether or not the
1661  * intr is handled
1662  */
1663
1664 static irqreturn_t
1665 vmxnet3_msix_rx(int irq, void *data)
1666 {
1667         struct vmxnet3_rx_queue *rq = data;
1668         struct vmxnet3_adapter *adapter = rq->adapter;
1669
1670         /* disable intr if needed */
1671         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1672                 vmxnet3_disable_intr(adapter, rq->comp_ring.intr_idx);
1673         napi_schedule(&rq->napi);
1674
1675         return IRQ_HANDLED;
1676 }
1677
1678 /*
1679  *----------------------------------------------------------------------------
1680  *
1681  * vmxnet3_msix_event --
1682  *
1683  *    vmxnet3 msix event intr handler
1684  *
1685  * Result:
1686  *    whether or not the intr is handled
1687  *
1688  *----------------------------------------------------------------------------
1689  */
1690
1691 static irqreturn_t
1692 vmxnet3_msix_event(int irq, void *data)
1693 {
1694         struct net_device *dev = data;
1695         struct vmxnet3_adapter *adapter = netdev_priv(dev);
1696
1697         /* disable intr if needed */
1698         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1699                 vmxnet3_disable_intr(adapter, adapter->intr.event_intr_idx);
1700
1701         if (adapter->shared->ecr)
1702                 vmxnet3_process_events(adapter);
1703
1704         vmxnet3_enable_intr(adapter, adapter->intr.event_intr_idx);
1705
1706         return IRQ_HANDLED;
1707 }
1708
1709 #endif /* CONFIG_PCI_MSI  */
1710
1711
1712 /* Interrupt handler for vmxnet3  */
1713 static irqreturn_t
1714 vmxnet3_intr(int irq, void *dev_id)
1715 {
1716         struct net_device *dev = dev_id;
1717         struct vmxnet3_adapter *adapter = netdev_priv(dev);
1718
1719         if (adapter->intr.type == VMXNET3_IT_INTX) {
1720                 u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR);
1721                 if (unlikely(icr == 0))
1722                         /* not ours */
1723                         return IRQ_NONE;
1724         }
1725
1726
1727         /* disable intr if needed */
1728         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1729                 vmxnet3_disable_all_intrs(adapter);
1730
1731         napi_schedule(&adapter->rx_queue[0].napi);
1732
1733         return IRQ_HANDLED;
1734 }
1735
1736 #ifdef CONFIG_NET_POLL_CONTROLLER
1737
1738 /* netpoll callback. */
1739 static void
1740 vmxnet3_netpoll(struct net_device *netdev)
1741 {
1742         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1743
1744         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1745                 vmxnet3_disable_all_intrs(adapter);
1746
1747         vmxnet3_do_poll(adapter, adapter->rx_queue[0].rx_ring[0].size);
1748         vmxnet3_enable_all_intrs(adapter);
1749
1750 }
1751 #endif  /* CONFIG_NET_POLL_CONTROLLER */
1752
1753 static int
1754 vmxnet3_request_irqs(struct vmxnet3_adapter *adapter)
1755 {
1756         struct vmxnet3_intr *intr = &adapter->intr;
1757         int err = 0, i;
1758         int vector = 0;
1759
1760 #ifdef CONFIG_PCI_MSI
1761         if (adapter->intr.type == VMXNET3_IT_MSIX) {
1762                 for (i = 0; i < adapter->num_tx_queues; i++) {
1763                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) {
1764                                 sprintf(adapter->tx_queue[i].name, "%s-tx-%d",
1765                                         adapter->netdev->name, vector);
1766                                 err = request_irq(
1767                                               intr->msix_entries[vector].vector,
1768                                               vmxnet3_msix_tx, 0,
1769                                               adapter->tx_queue[i].name,
1770                                               &adapter->tx_queue[i]);
1771                         } else {
1772                                 sprintf(adapter->tx_queue[i].name, "%s-rxtx-%d",
1773                                         adapter->netdev->name, vector);
1774                         }
1775                         if (err) {
1776                                 dev_err(&adapter->netdev->dev,
1777                                         "Failed to request irq for MSIX, %s, "
1778                                         "error %d\n",
1779                                         adapter->tx_queue[i].name, err);
1780                                 return err;
1781                         }
1782
1783                         /* Handle the case where only 1 MSIx was allocated for
1784                          * all tx queues */
1785                         if (adapter->share_intr == VMXNET3_INTR_TXSHARE) {
1786                                 for (; i < adapter->num_tx_queues; i++)
1787                                         adapter->tx_queue[i].comp_ring.intr_idx
1788                                                                 = vector;
1789                                 vector++;
1790                                 break;
1791                         } else {
1792                                 adapter->tx_queue[i].comp_ring.intr_idx
1793                                                                 = vector++;
1794                         }
1795                 }
1796                 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE)
1797                         vector = 0;
1798
1799                 for (i = 0; i < adapter->num_rx_queues; i++) {
1800                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE)
1801                                 sprintf(adapter->rx_queue[i].name, "%s-rx-%d",
1802                                         adapter->netdev->name, vector);
1803                         else
1804                                 sprintf(adapter->rx_queue[i].name, "%s-rxtx-%d",
1805                                         adapter->netdev->name, vector);
1806                         err = request_irq(intr->msix_entries[vector].vector,
1807                                           vmxnet3_msix_rx, 0,
1808                                           adapter->rx_queue[i].name,
1809                                           &(adapter->rx_queue[i]));
1810                         if (err) {
1811                                 netdev_err(adapter->netdev,
1812                                            "Failed to request irq for MSIX, "
1813                                            "%s, error %d\n",
1814                                            adapter->rx_queue[i].name, err);
1815                                 return err;
1816                         }
1817
1818                         adapter->rx_queue[i].comp_ring.intr_idx = vector++;
1819                 }
1820
1821                 sprintf(intr->event_msi_vector_name, "%s-event-%d",
1822                         adapter->netdev->name, vector);
1823                 err = request_irq(intr->msix_entries[vector].vector,
1824                                   vmxnet3_msix_event, 0,
1825                                   intr->event_msi_vector_name, adapter->netdev);
1826                 intr->event_intr_idx = vector;
1827
1828         } else if (intr->type == VMXNET3_IT_MSI) {
1829                 adapter->num_rx_queues = 1;
1830                 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0,
1831                                   adapter->netdev->name, adapter->netdev);
1832         } else {
1833 #endif
1834                 adapter->num_rx_queues = 1;
1835                 err = request_irq(adapter->pdev->irq, vmxnet3_intr,
1836                                   IRQF_SHARED, adapter->netdev->name,
1837                                   adapter->netdev);
1838 #ifdef CONFIG_PCI_MSI
1839         }
1840 #endif
1841         intr->num_intrs = vector + 1;
1842         if (err) {
1843                 netdev_err(adapter->netdev,
1844                            "Failed to request irq (intr type:%d), error %d\n",
1845                            intr->type, err);
1846         } else {
1847                 /* Number of rx queues will not change after this */
1848                 for (i = 0; i < adapter->num_rx_queues; i++) {
1849                         struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
1850                         rq->qid = i;
1851                         rq->qid2 = i + adapter->num_rx_queues;
1852                 }
1853
1854
1855
1856                 /* init our intr settings */
1857                 for (i = 0; i < intr->num_intrs; i++)
1858                         intr->mod_levels[i] = UPT1_IML_ADAPTIVE;
1859                 if (adapter->intr.type != VMXNET3_IT_MSIX) {
1860                         adapter->intr.event_intr_idx = 0;
1861                         for (i = 0; i < adapter->num_tx_queues; i++)
1862                                 adapter->tx_queue[i].comp_ring.intr_idx = 0;
1863                         adapter->rx_queue[0].comp_ring.intr_idx = 0;
1864                 }
1865
1866                 netdev_info(adapter->netdev,
1867                             "intr type %u, mode %u, %u vectors allocated\n",
1868                             intr->type, intr->mask_mode, intr->num_intrs);
1869         }
1870
1871         return err;
1872 }
1873
1874
1875 static void
1876 vmxnet3_free_irqs(struct vmxnet3_adapter *adapter)
1877 {
1878         struct vmxnet3_intr *intr = &adapter->intr;
1879         BUG_ON(intr->type == VMXNET3_IT_AUTO || intr->num_intrs <= 0);
1880
1881         switch (intr->type) {
1882 #ifdef CONFIG_PCI_MSI
1883         case VMXNET3_IT_MSIX:
1884         {
1885                 int i, vector = 0;
1886
1887                 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) {
1888                         for (i = 0; i < adapter->num_tx_queues; i++) {
1889                                 free_irq(intr->msix_entries[vector++].vector,
1890                                          &(adapter->tx_queue[i]));
1891                                 if (adapter->share_intr == VMXNET3_INTR_TXSHARE)
1892                                         break;
1893                         }
1894                 }
1895
1896                 for (i = 0; i < adapter->num_rx_queues; i++) {
1897                         free_irq(intr->msix_entries[vector++].vector,
1898                                  &(adapter->rx_queue[i]));
1899                 }
1900
1901                 free_irq(intr->msix_entries[vector].vector,
1902                          adapter->netdev);
1903                 BUG_ON(vector >= intr->num_intrs);
1904                 break;
1905         }
1906 #endif
1907         case VMXNET3_IT_MSI:
1908                 free_irq(adapter->pdev->irq, adapter->netdev);
1909                 break;
1910         case VMXNET3_IT_INTX:
1911                 free_irq(adapter->pdev->irq, adapter->netdev);
1912                 break;
1913         default:
1914                 BUG();
1915         }
1916 }
1917
1918
1919 static void
1920 vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter)
1921 {
1922         u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1923         u16 vid;
1924
1925         /* allow untagged pkts */
1926         VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
1927
1928         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
1929                 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1930 }
1931
1932
1933 static int
1934 vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1935 {
1936         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1937
1938         if (!(netdev->flags & IFF_PROMISC)) {
1939                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1940                 unsigned long flags;
1941
1942                 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1943                 spin_lock_irqsave(&adapter->cmd_lock, flags);
1944                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1945                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1946                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
1947         }
1948
1949         set_bit(vid, adapter->active_vlans);
1950
1951         return 0;
1952 }
1953
1954
1955 static int
1956 vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1957 {
1958         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1959
1960         if (!(netdev->flags & IFF_PROMISC)) {
1961                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1962                 unsigned long flags;
1963
1964                 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid);
1965                 spin_lock_irqsave(&adapter->cmd_lock, flags);
1966                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1967                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1968                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
1969         }
1970
1971         clear_bit(vid, adapter->active_vlans);
1972
1973         return 0;
1974 }
1975
1976
1977 static u8 *
1978 vmxnet3_copy_mc(struct net_device *netdev)
1979 {
1980         u8 *buf = NULL;
1981         u32 sz = netdev_mc_count(netdev) * ETH_ALEN;
1982
1983         /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */
1984         if (sz <= 0xffff) {
1985                 /* We may be called with BH disabled */
1986                 buf = kmalloc(sz, GFP_ATOMIC);
1987                 if (buf) {
1988                         struct netdev_hw_addr *ha;
1989                         int i = 0;
1990
1991                         netdev_for_each_mc_addr(ha, netdev)
1992                                 memcpy(buf + i++ * ETH_ALEN, ha->addr,
1993                                        ETH_ALEN);
1994                 }
1995         }
1996         return buf;
1997 }
1998
1999
2000 static void
2001 vmxnet3_set_mc(struct net_device *netdev)
2002 {
2003         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2004         unsigned long flags;
2005         struct Vmxnet3_RxFilterConf *rxConf =
2006                                         &adapter->shared->devRead.rxFilterConf;
2007         u8 *new_table = NULL;
2008         u32 new_mode = VMXNET3_RXM_UCAST;
2009
2010         if (netdev->flags & IFF_PROMISC) {
2011                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2012                 memset(vfTable, 0, VMXNET3_VFT_SIZE * sizeof(*vfTable));
2013
2014                 new_mode |= VMXNET3_RXM_PROMISC;
2015         } else {
2016                 vmxnet3_restore_vlan(adapter);
2017         }
2018
2019         if (netdev->flags & IFF_BROADCAST)
2020                 new_mode |= VMXNET3_RXM_BCAST;
2021
2022         if (netdev->flags & IFF_ALLMULTI)
2023                 new_mode |= VMXNET3_RXM_ALL_MULTI;
2024         else
2025                 if (!netdev_mc_empty(netdev)) {
2026                         new_table = vmxnet3_copy_mc(netdev);
2027                         if (new_table) {
2028                                 new_mode |= VMXNET3_RXM_MCAST;
2029                                 rxConf->mfTableLen = cpu_to_le16(
2030                                         netdev_mc_count(netdev) * ETH_ALEN);
2031                                 rxConf->mfTablePA = cpu_to_le64(virt_to_phys(
2032                                                     new_table));
2033                         } else {
2034                                 netdev_info(netdev, "failed to copy mcast list"
2035                                             ", setting ALL_MULTI\n");
2036                                 new_mode |= VMXNET3_RXM_ALL_MULTI;
2037                         }
2038                 }
2039
2040
2041         if (!(new_mode & VMXNET3_RXM_MCAST)) {
2042                 rxConf->mfTableLen = 0;
2043                 rxConf->mfTablePA = 0;
2044         }
2045
2046         spin_lock_irqsave(&adapter->cmd_lock, flags);
2047         if (new_mode != rxConf->rxMode) {
2048                 rxConf->rxMode = cpu_to_le32(new_mode);
2049                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2050                                        VMXNET3_CMD_UPDATE_RX_MODE);
2051                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2052                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
2053         }
2054
2055         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2056                                VMXNET3_CMD_UPDATE_MAC_FILTERS);
2057         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2058
2059         kfree(new_table);
2060 }
2061
2062 void
2063 vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter)
2064 {
2065         int i;
2066
2067         for (i = 0; i < adapter->num_rx_queues; i++)
2068                 vmxnet3_rq_destroy(&adapter->rx_queue[i], adapter);
2069 }
2070
2071
2072 /*
2073  *   Set up driver_shared based on settings in adapter.
2074  */
2075
2076 static void
2077 vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
2078 {
2079         struct Vmxnet3_DriverShared *shared = adapter->shared;
2080         struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
2081         struct Vmxnet3_TxQueueConf *tqc;
2082         struct Vmxnet3_RxQueueConf *rqc;
2083         int i;
2084
2085         memset(shared, 0, sizeof(*shared));
2086
2087         /* driver settings */
2088         shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC);
2089         devRead->misc.driverInfo.version = cpu_to_le32(
2090                                                 VMXNET3_DRIVER_VERSION_NUM);
2091         devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ?
2092                                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64);
2093         devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
2094         *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32(
2095                                 *((u32 *)&devRead->misc.driverInfo.gos));
2096         devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1);
2097         devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1);
2098
2099         devRead->misc.ddPA = cpu_to_le64(virt_to_phys(adapter));
2100         devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter));
2101
2102         /* set up feature flags */
2103         if (adapter->netdev->features & NETIF_F_RXCSUM)
2104                 devRead->misc.uptFeatures |= UPT1_F_RXCSUM;
2105
2106         if (adapter->netdev->features & NETIF_F_LRO) {
2107                 devRead->misc.uptFeatures |= UPT1_F_LRO;
2108                 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS);
2109         }
2110         if (adapter->netdev->features & NETIF_F_HW_VLAN_RX)
2111                 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
2112
2113         devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu);
2114         devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa);
2115         devRead->misc.queueDescLen = cpu_to_le32(
2116                 adapter->num_tx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
2117                 adapter->num_rx_queues * sizeof(struct Vmxnet3_RxQueueDesc));
2118
2119         /* tx queue settings */
2120         devRead->misc.numTxQueues =  adapter->num_tx_queues;
2121         for (i = 0; i < adapter->num_tx_queues; i++) {
2122                 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i];
2123                 BUG_ON(adapter->tx_queue[i].tx_ring.base == NULL);
2124                 tqc = &adapter->tqd_start[i].conf;
2125                 tqc->txRingBasePA   = cpu_to_le64(tq->tx_ring.basePA);
2126                 tqc->dataRingBasePA = cpu_to_le64(tq->data_ring.basePA);
2127                 tqc->compRingBasePA = cpu_to_le64(tq->comp_ring.basePA);
2128                 tqc->ddPA           = cpu_to_le64(virt_to_phys(tq->buf_info));
2129                 tqc->txRingSize     = cpu_to_le32(tq->tx_ring.size);
2130                 tqc->dataRingSize   = cpu_to_le32(tq->data_ring.size);
2131                 tqc->compRingSize   = cpu_to_le32(tq->comp_ring.size);
2132                 tqc->ddLen          = cpu_to_le32(
2133                                         sizeof(struct vmxnet3_tx_buf_info) *
2134                                         tqc->txRingSize);
2135                 tqc->intrIdx        = tq->comp_ring.intr_idx;
2136         }
2137
2138         /* rx queue settings */
2139         devRead->misc.numRxQueues = adapter->num_rx_queues;
2140         for (i = 0; i < adapter->num_rx_queues; i++) {
2141                 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2142                 rqc = &adapter->rqd_start[i].conf;
2143                 rqc->rxRingBasePA[0] = cpu_to_le64(rq->rx_ring[0].basePA);
2144                 rqc->rxRingBasePA[1] = cpu_to_le64(rq->rx_ring[1].basePA);
2145                 rqc->compRingBasePA  = cpu_to_le64(rq->comp_ring.basePA);
2146                 rqc->ddPA            = cpu_to_le64(virt_to_phys(
2147                                                         rq->buf_info));
2148                 rqc->rxRingSize[0]   = cpu_to_le32(rq->rx_ring[0].size);
2149                 rqc->rxRingSize[1]   = cpu_to_le32(rq->rx_ring[1].size);
2150                 rqc->compRingSize    = cpu_to_le32(rq->comp_ring.size);
2151                 rqc->ddLen           = cpu_to_le32(
2152                                         sizeof(struct vmxnet3_rx_buf_info) *
2153                                         (rqc->rxRingSize[0] +
2154                                          rqc->rxRingSize[1]));
2155                 rqc->intrIdx         = rq->comp_ring.intr_idx;
2156         }
2157
2158 #ifdef VMXNET3_RSS
2159         memset(adapter->rss_conf, 0, sizeof(*adapter->rss_conf));
2160
2161         if (adapter->rss) {
2162                 struct UPT1_RSSConf *rssConf = adapter->rss_conf;
2163                 devRead->misc.uptFeatures |= UPT1_F_RSS;
2164                 devRead->misc.numRxQueues = adapter->num_rx_queues;
2165                 rssConf->hashType = UPT1_RSS_HASH_TYPE_TCP_IPV4 |
2166                                     UPT1_RSS_HASH_TYPE_IPV4 |
2167                                     UPT1_RSS_HASH_TYPE_TCP_IPV6 |
2168                                     UPT1_RSS_HASH_TYPE_IPV6;
2169                 rssConf->hashFunc = UPT1_RSS_HASH_FUNC_TOEPLITZ;
2170                 rssConf->hashKeySize = UPT1_RSS_MAX_KEY_SIZE;
2171                 rssConf->indTableSize = VMXNET3_RSS_IND_TABLE_SIZE;
2172                 get_random_bytes(&rssConf->hashKey[0], rssConf->hashKeySize);
2173                 for (i = 0; i < rssConf->indTableSize; i++)
2174                         rssConf->indTable[i] = ethtool_rxfh_indir_default(
2175                                 i, adapter->num_rx_queues);
2176
2177                 devRead->rssConfDesc.confVer = 1;
2178                 devRead->rssConfDesc.confLen = sizeof(*rssConf);
2179                 devRead->rssConfDesc.confPA  = virt_to_phys(rssConf);
2180         }
2181
2182 #endif /* VMXNET3_RSS */
2183
2184         /* intr settings */
2185         devRead->intrConf.autoMask = adapter->intr.mask_mode ==
2186                                      VMXNET3_IMM_AUTO;
2187         devRead->intrConf.numIntrs = adapter->intr.num_intrs;
2188         for (i = 0; i < adapter->intr.num_intrs; i++)
2189                 devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i];
2190
2191         devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx;
2192         devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
2193
2194         /* rx filter settings */
2195         devRead->rxFilterConf.rxMode = 0;
2196         vmxnet3_restore_vlan(adapter);
2197         vmxnet3_write_mac_addr(adapter, adapter->netdev->dev_addr);
2198
2199         /* the rest are already zeroed */
2200 }
2201
2202
2203 int
2204 vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
2205 {
2206         int err, i;
2207         u32 ret;
2208         unsigned long flags;
2209
2210         netdev_dbg(adapter->netdev, "%s: skb_buf_size %d, rx_buf_per_pkt %d,"
2211                 " ring sizes %u %u %u\n", adapter->netdev->name,
2212                 adapter->skb_buf_size, adapter->rx_buf_per_pkt,
2213                 adapter->tx_queue[0].tx_ring.size,
2214                 adapter->rx_queue[0].rx_ring[0].size,
2215                 adapter->rx_queue[0].rx_ring[1].size);
2216
2217         vmxnet3_tq_init_all(adapter);
2218         err = vmxnet3_rq_init_all(adapter);
2219         if (err) {
2220                 netdev_err(adapter->netdev,
2221                            "Failed to init rx queue error %d\n", err);
2222                 goto rq_err;
2223         }
2224
2225         err = vmxnet3_request_irqs(adapter);
2226         if (err) {
2227                 netdev_err(adapter->netdev,
2228                            "Failed to setup irq for error %d\n", err);
2229                 goto irq_err;
2230         }
2231
2232         vmxnet3_setup_driver_shared(adapter);
2233
2234         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO(
2235                                adapter->shared_pa));
2236         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI(
2237                                adapter->shared_pa));
2238         spin_lock_irqsave(&adapter->cmd_lock, flags);
2239         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2240                                VMXNET3_CMD_ACTIVATE_DEV);
2241         ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2242         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2243
2244         if (ret != 0) {
2245                 netdev_err(adapter->netdev,
2246                            "Failed to activate dev: error %u\n", ret);
2247                 err = -EINVAL;
2248                 goto activate_err;
2249         }
2250
2251         for (i = 0; i < adapter->num_rx_queues; i++) {
2252                 VMXNET3_WRITE_BAR0_REG(adapter,
2253                                 VMXNET3_REG_RXPROD + i * VMXNET3_REG_ALIGN,
2254                                 adapter->rx_queue[i].rx_ring[0].next2fill);
2255                 VMXNET3_WRITE_BAR0_REG(adapter, (VMXNET3_REG_RXPROD2 +
2256                                 (i * VMXNET3_REG_ALIGN)),
2257                                 adapter->rx_queue[i].rx_ring[1].next2fill);
2258         }
2259
2260         /* Apply the rx filter settins last. */
2261         vmxnet3_set_mc(adapter->netdev);
2262
2263         /*
2264          * Check link state when first activating device. It will start the
2265          * tx queue if the link is up.
2266          */
2267         vmxnet3_check_link(adapter, true);
2268         for (i = 0; i < adapter->num_rx_queues; i++)
2269                 napi_enable(&adapter->rx_queue[i].napi);
2270         vmxnet3_enable_all_intrs(adapter);
2271         clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
2272         return 0;
2273
2274 activate_err:
2275         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0);
2276         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0);
2277         vmxnet3_free_irqs(adapter);
2278 irq_err:
2279 rq_err:
2280         /* free up buffers we allocated */
2281         vmxnet3_rq_cleanup_all(adapter);
2282         return err;
2283 }
2284
2285
2286 void
2287 vmxnet3_reset_dev(struct vmxnet3_adapter *adapter)
2288 {
2289         unsigned long flags;
2290         spin_lock_irqsave(&adapter->cmd_lock, flags);
2291         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
2292         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2293 }
2294
2295
2296 int
2297 vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter)
2298 {
2299         int i;
2300         unsigned long flags;
2301         if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state))
2302                 return 0;
2303
2304
2305         spin_lock_irqsave(&adapter->cmd_lock, flags);
2306         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2307                                VMXNET3_CMD_QUIESCE_DEV);
2308         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2309         vmxnet3_disable_all_intrs(adapter);
2310
2311         for (i = 0; i < adapter->num_rx_queues; i++)
2312                 napi_disable(&adapter->rx_queue[i].napi);
2313         netif_tx_disable(adapter->netdev);
2314         adapter->link_speed = 0;
2315         netif_carrier_off(adapter->netdev);
2316
2317         vmxnet3_tq_cleanup_all(adapter);
2318         vmxnet3_rq_cleanup_all(adapter);
2319         vmxnet3_free_irqs(adapter);
2320         return 0;
2321 }
2322
2323
2324 static void
2325 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2326 {
2327         u32 tmp;
2328
2329         tmp = *(u32 *)mac;
2330         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp);
2331
2332         tmp = (mac[5] << 8) | mac[4];
2333         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp);
2334 }
2335
2336
2337 static int
2338 vmxnet3_set_mac_addr(struct net_device *netdev, void *p)
2339 {
2340         struct sockaddr *addr = p;
2341         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2342
2343         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2344         vmxnet3_write_mac_addr(adapter, addr->sa_data);
2345
2346         return 0;
2347 }
2348
2349
2350 /* ==================== initialization and cleanup routines ============ */
2351
2352 static int
2353 vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64)
2354 {
2355         int err;
2356         unsigned long mmio_start, mmio_len;
2357         struct pci_dev *pdev = adapter->pdev;
2358
2359         err = pci_enable_device(pdev);
2360         if (err) {
2361                 dev_err(&pdev->dev, "Failed to enable adapter: error %d\n", err);
2362                 return err;
2363         }
2364
2365         if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
2366                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
2367                         dev_err(&pdev->dev,
2368                                 "pci_set_consistent_dma_mask failed\n");
2369                         err = -EIO;
2370                         goto err_set_mask;
2371                 }
2372                 *dma64 = true;
2373         } else {
2374                 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
2375                         dev_err(&pdev->dev,
2376                                 "pci_set_dma_mask failed\n");
2377                         err = -EIO;
2378                         goto err_set_mask;
2379                 }
2380                 *dma64 = false;
2381         }
2382
2383         err = pci_request_selected_regions(pdev, (1 << 2) - 1,
2384                                            vmxnet3_driver_name);
2385         if (err) {
2386                 dev_err(&pdev->dev,
2387                         "Failed to request region for adapter: error %d\n", err);
2388                 goto err_set_mask;
2389         }
2390
2391         pci_set_master(pdev);
2392
2393         mmio_start = pci_resource_start(pdev, 0);
2394         mmio_len = pci_resource_len(pdev, 0);
2395         adapter->hw_addr0 = ioremap(mmio_start, mmio_len);
2396         if (!adapter->hw_addr0) {
2397                 dev_err(&pdev->dev, "Failed to map bar0\n");
2398                 err = -EIO;
2399                 goto err_ioremap;
2400         }
2401
2402         mmio_start = pci_resource_start(pdev, 1);
2403         mmio_len = pci_resource_len(pdev, 1);
2404         adapter->hw_addr1 = ioremap(mmio_start, mmio_len);
2405         if (!adapter->hw_addr1) {
2406                 dev_err(&pdev->dev, "Failed to map bar1\n");
2407                 err = -EIO;
2408                 goto err_bar1;
2409         }
2410         return 0;
2411
2412 err_bar1:
2413         iounmap(adapter->hw_addr0);
2414 err_ioremap:
2415         pci_release_selected_regions(pdev, (1 << 2) - 1);
2416 err_set_mask:
2417         pci_disable_device(pdev);
2418         return err;
2419 }
2420
2421
2422 static void
2423 vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter)
2424 {
2425         BUG_ON(!adapter->pdev);
2426
2427         iounmap(adapter->hw_addr0);
2428         iounmap(adapter->hw_addr1);
2429         pci_release_selected_regions(adapter->pdev, (1 << 2) - 1);
2430         pci_disable_device(adapter->pdev);
2431 }
2432
2433
2434 static void
2435 vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter)
2436 {
2437         size_t sz, i, ring0_size, ring1_size, comp_size;
2438         struct vmxnet3_rx_queue *rq = &adapter->rx_queue[0];
2439
2440
2441         if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE -
2442                                     VMXNET3_MAX_ETH_HDR_SIZE) {
2443                 adapter->skb_buf_size = adapter->netdev->mtu +
2444                                         VMXNET3_MAX_ETH_HDR_SIZE;
2445                 if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE)
2446                         adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE;
2447
2448                 adapter->rx_buf_per_pkt = 1;
2449         } else {
2450                 adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE;
2451                 sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE +
2452                                             VMXNET3_MAX_ETH_HDR_SIZE;
2453                 adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE;
2454         }
2455
2456         /*
2457          * for simplicity, force the ring0 size to be a multiple of
2458          * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN
2459          */
2460         sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
2461         ring0_size = adapter->rx_queue[0].rx_ring[0].size;
2462         ring0_size = (ring0_size + sz - 1) / sz * sz;
2463         ring0_size = min_t(u32, ring0_size, VMXNET3_RX_RING_MAX_SIZE /
2464                            sz * sz);
2465         ring1_size = adapter->rx_queue[0].rx_ring[1].size;
2466         comp_size = ring0_size + ring1_size;
2467
2468         for (i = 0; i < adapter->num_rx_queues; i++) {
2469                 rq = &adapter->rx_queue[i];
2470                 rq->rx_ring[0].size = ring0_size;
2471                 rq->rx_ring[1].size = ring1_size;
2472                 rq->comp_ring.size = comp_size;
2473         }
2474 }
2475
2476
2477 int
2478 vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size,
2479                       u32 rx_ring_size, u32 rx_ring2_size)
2480 {
2481         int err = 0, i;
2482
2483         for (i = 0; i < adapter->num_tx_queues; i++) {
2484                 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i];
2485                 tq->tx_ring.size   = tx_ring_size;
2486                 tq->data_ring.size = tx_ring_size;
2487                 tq->comp_ring.size = tx_ring_size;
2488                 tq->shared = &adapter->tqd_start[i].ctrl;
2489                 tq->stopped = true;
2490                 tq->adapter = adapter;
2491                 tq->qid = i;
2492                 err = vmxnet3_tq_create(tq, adapter);
2493                 /*
2494                  * Too late to change num_tx_queues. We cannot do away with
2495                  * lesser number of queues than what we asked for
2496                  */
2497                 if (err)
2498                         goto queue_err;
2499         }
2500
2501         adapter->rx_queue[0].rx_ring[0].size = rx_ring_size;
2502         adapter->rx_queue[0].rx_ring[1].size = rx_ring2_size;
2503         vmxnet3_adjust_rx_ring_size(adapter);
2504         for (i = 0; i < adapter->num_rx_queues; i++) {
2505                 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2506                 /* qid and qid2 for rx queues will be assigned later when num
2507                  * of rx queues is finalized after allocating intrs */
2508                 rq->shared = &adapter->rqd_start[i].ctrl;
2509                 rq->adapter = adapter;
2510                 err = vmxnet3_rq_create(rq, adapter);
2511                 if (err) {
2512                         if (i == 0) {
2513                                 netdev_err(adapter->netdev,
2514                                            "Could not allocate any rx queues. "
2515                                            "Aborting.\n");
2516                                 goto queue_err;
2517                         } else {
2518                                 netdev_info(adapter->netdev,
2519                                             "Number of rx queues changed "
2520                                             "to : %d.\n", i);
2521                                 adapter->num_rx_queues = i;
2522                                 err = 0;
2523                                 break;
2524                         }
2525                 }
2526         }
2527         return err;
2528 queue_err:
2529         vmxnet3_tq_destroy_all(adapter);
2530         return err;
2531 }
2532
2533 static int
2534 vmxnet3_open(struct net_device *netdev)
2535 {
2536         struct vmxnet3_adapter *adapter;
2537         int err, i;
2538
2539         adapter = netdev_priv(netdev);
2540
2541         for (i = 0; i < adapter->num_tx_queues; i++)
2542                 spin_lock_init(&adapter->tx_queue[i].tx_lock);
2543
2544         err = vmxnet3_create_queues(adapter, VMXNET3_DEF_TX_RING_SIZE,
2545                                     VMXNET3_DEF_RX_RING_SIZE,
2546                                     VMXNET3_DEF_RX_RING_SIZE);
2547         if (err)
2548                 goto queue_err;
2549
2550         err = vmxnet3_activate_dev(adapter);
2551         if (err)
2552                 goto activate_err;
2553
2554         return 0;
2555
2556 activate_err:
2557         vmxnet3_rq_destroy_all(adapter);
2558         vmxnet3_tq_destroy_all(adapter);
2559 queue_err:
2560         return err;
2561 }
2562
2563
2564 static int
2565 vmxnet3_close(struct net_device *netdev)
2566 {
2567         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2568
2569         /*
2570          * Reset_work may be in the middle of resetting the device, wait for its
2571          * completion.
2572          */
2573         while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2574                 msleep(1);
2575
2576         vmxnet3_quiesce_dev(adapter);
2577
2578         vmxnet3_rq_destroy_all(adapter);
2579         vmxnet3_tq_destroy_all(adapter);
2580
2581         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2582
2583
2584         return 0;
2585 }
2586
2587
2588 void
2589 vmxnet3_force_close(struct vmxnet3_adapter *adapter)
2590 {
2591         int i;
2592
2593         /*
2594          * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise
2595          * vmxnet3_close() will deadlock.
2596          */
2597         BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state));
2598
2599         /* we need to enable NAPI, otherwise dev_close will deadlock */
2600         for (i = 0; i < adapter->num_rx_queues; i++)
2601                 napi_enable(&adapter->rx_queue[i].napi);
2602         dev_close(adapter->netdev);
2603 }
2604
2605
2606 static int
2607 vmxnet3_change_mtu(struct net_device *netdev, int new_mtu)
2608 {
2609         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2610         int err = 0;
2611
2612         if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU)
2613                 return -EINVAL;
2614
2615         netdev->mtu = new_mtu;
2616
2617         /*
2618          * Reset_work may be in the middle of resetting the device, wait for its
2619          * completion.
2620          */
2621         while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2622                 msleep(1);
2623
2624         if (netif_running(netdev)) {
2625                 vmxnet3_quiesce_dev(adapter);
2626                 vmxnet3_reset_dev(adapter);
2627
2628                 /* we need to re-create the rx queue based on the new mtu */
2629                 vmxnet3_rq_destroy_all(adapter);
2630                 vmxnet3_adjust_rx_ring_size(adapter);
2631                 err = vmxnet3_rq_create_all(adapter);
2632                 if (err) {
2633                         netdev_err(netdev,
2634                                    "failed to re-create rx queues, "
2635                                    " error %d. Closing it.\n", err);
2636                         goto out;
2637                 }
2638
2639                 err = vmxnet3_activate_dev(adapter);
2640                 if (err) {
2641                         netdev_err(netdev,
2642                                    "failed to re-activate, error %d. "
2643                                    "Closing it\n", err);
2644                         goto out;
2645                 }
2646         }
2647
2648 out:
2649         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2650         if (err)
2651                 vmxnet3_force_close(adapter);
2652
2653         return err;
2654 }
2655
2656
2657 static void
2658 vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64)
2659 {
2660         struct net_device *netdev = adapter->netdev;
2661
2662         netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM |
2663                 NETIF_F_HW_CSUM | NETIF_F_HW_VLAN_TX |
2664                 NETIF_F_HW_VLAN_RX | NETIF_F_TSO | NETIF_F_TSO6 |
2665                 NETIF_F_LRO;
2666         if (dma64)
2667                 netdev->hw_features |= NETIF_F_HIGHDMA;
2668         netdev->vlan_features = netdev->hw_features &
2669                                 ~(NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
2670         netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_FILTER;
2671 }
2672
2673
2674 static void
2675 vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2676 {
2677         u32 tmp;
2678
2679         tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL);
2680         *(u32 *)mac = tmp;
2681
2682         tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH);
2683         mac[4] = tmp & 0xff;
2684         mac[5] = (tmp >> 8) & 0xff;
2685 }
2686
2687 #ifdef CONFIG_PCI_MSI
2688
2689 /*
2690  * Enable MSIx vectors.
2691  * Returns :
2692  *      0 on successful enabling of required vectors,
2693  *      VMXNET3_LINUX_MIN_MSIX_VECT when only minimum number of vectors required
2694  *       could be enabled.
2695  *      number of vectors which can be enabled otherwise (this number is smaller
2696  *       than VMXNET3_LINUX_MIN_MSIX_VECT)
2697  */
2698
2699 static int
2700 vmxnet3_acquire_msix_vectors(struct vmxnet3_adapter *adapter,
2701                              int vectors)
2702 {
2703         int err = 0, vector_threshold;
2704         vector_threshold = VMXNET3_LINUX_MIN_MSIX_VECT;
2705
2706         while (vectors >= vector_threshold) {
2707                 err = pci_enable_msix(adapter->pdev, adapter->intr.msix_entries,
2708                                       vectors);
2709                 if (!err) {
2710                         adapter->intr.num_intrs = vectors;
2711                         return 0;
2712                 } else if (err < 0) {
2713                         dev_err(&adapter->netdev->dev,
2714                                    "Failed to enable MSI-X, error: %d\n", err);
2715                         vectors = 0;
2716                 } else if (err < vector_threshold) {
2717                         break;
2718                 } else {
2719                         /* If fails to enable required number of MSI-x vectors
2720                          * try enabling minimum number of vectors required.
2721                          */
2722                         dev_err(&adapter->netdev->dev,
2723                                 "Failed to enable %d MSI-X, trying %d instead\n",
2724                                     vectors, vector_threshold);
2725                         vectors = vector_threshold;
2726                 }
2727         }
2728
2729         dev_info(&adapter->pdev->dev,
2730                  "Number of MSI-X interrupts which can be allocated "
2731                  "is lower than min threshold required.\n");
2732         return err;
2733 }
2734
2735
2736 #endif /* CONFIG_PCI_MSI */
2737
2738 static void
2739 vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
2740 {
2741         u32 cfg;
2742         unsigned long flags;
2743
2744         /* intr settings */
2745         spin_lock_irqsave(&adapter->cmd_lock, flags);
2746         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2747                                VMXNET3_CMD_GET_CONF_INTR);
2748         cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2749         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2750         adapter->intr.type = cfg & 0x3;
2751         adapter->intr.mask_mode = (cfg >> 2) & 0x3;
2752
2753         if (adapter->intr.type == VMXNET3_IT_AUTO) {
2754                 adapter->intr.type = VMXNET3_IT_MSIX;
2755         }
2756
2757 #ifdef CONFIG_PCI_MSI
2758         if (adapter->intr.type == VMXNET3_IT_MSIX) {
2759                 int vector, err = 0;
2760
2761                 adapter->intr.num_intrs = (adapter->share_intr ==
2762                                            VMXNET3_INTR_TXSHARE) ? 1 :
2763                                            adapter->num_tx_queues;
2764                 adapter->intr.num_intrs += (adapter->share_intr ==
2765                                            VMXNET3_INTR_BUDDYSHARE) ? 0 :
2766                                            adapter->num_rx_queues;
2767                 adapter->intr.num_intrs += 1;           /* for link event */
2768
2769                 adapter->intr.num_intrs = (adapter->intr.num_intrs >
2770                                            VMXNET3_LINUX_MIN_MSIX_VECT
2771                                            ? adapter->intr.num_intrs :
2772                                            VMXNET3_LINUX_MIN_MSIX_VECT);
2773
2774                 for (vector = 0; vector < adapter->intr.num_intrs; vector++)
2775                         adapter->intr.msix_entries[vector].entry = vector;
2776
2777                 err = vmxnet3_acquire_msix_vectors(adapter,
2778                                                    adapter->intr.num_intrs);
2779                 /* If we cannot allocate one MSIx vector per queue
2780                  * then limit the number of rx queues to 1
2781                  */
2782                 if (err == VMXNET3_LINUX_MIN_MSIX_VECT) {
2783                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE
2784                             || adapter->num_rx_queues != 1) {
2785                                 adapter->share_intr = VMXNET3_INTR_TXSHARE;
2786                                 netdev_err(adapter->netdev,
2787                                            "Number of rx queues : 1\n");
2788                                 adapter->num_rx_queues = 1;
2789                                 adapter->intr.num_intrs =
2790                                                 VMXNET3_LINUX_MIN_MSIX_VECT;
2791                         }
2792                         return;
2793                 }
2794                 if (!err)
2795                         return;
2796
2797                 /* If we cannot allocate MSIx vectors use only one rx queue */
2798                 dev_info(&adapter->pdev->dev,
2799                          "Failed to enable MSI-X, error %d. "
2800                          "Limiting #rx queues to 1, try MSI.\n", err);
2801
2802                 adapter->intr.type = VMXNET3_IT_MSI;
2803         }
2804
2805         if (adapter->intr.type == VMXNET3_IT_MSI) {
2806                 int err;
2807                 err = pci_enable_msi(adapter->pdev);
2808                 if (!err) {
2809                         adapter->num_rx_queues = 1;
2810                         adapter->intr.num_intrs = 1;
2811                         return;
2812                 }
2813         }
2814 #endif /* CONFIG_PCI_MSI */
2815
2816         adapter->num_rx_queues = 1;
2817         dev_info(&adapter->netdev->dev,
2818                  "Using INTx interrupt, #Rx queues: 1.\n");
2819         adapter->intr.type = VMXNET3_IT_INTX;
2820
2821         /* INT-X related setting */
2822         adapter->intr.num_intrs = 1;
2823 }
2824
2825
2826 static void
2827 vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter)
2828 {
2829         if (adapter->intr.type == VMXNET3_IT_MSIX)
2830                 pci_disable_msix(adapter->pdev);
2831         else if (adapter->intr.type == VMXNET3_IT_MSI)
2832                 pci_disable_msi(adapter->pdev);
2833         else
2834                 BUG_ON(adapter->intr.type != VMXNET3_IT_INTX);
2835 }
2836
2837
2838 static void
2839 vmxnet3_tx_timeout(struct net_device *netdev)
2840 {
2841         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2842         adapter->tx_timeout_count++;
2843
2844         netdev_err(adapter->netdev, "tx hang\n");
2845         schedule_work(&adapter->work);
2846         netif_wake_queue(adapter->netdev);
2847 }
2848
2849
2850 static void
2851 vmxnet3_reset_work(struct work_struct *data)
2852 {
2853         struct vmxnet3_adapter *adapter;
2854
2855         adapter = container_of(data, struct vmxnet3_adapter, work);
2856
2857         /* if another thread is resetting the device, no need to proceed */
2858         if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2859                 return;
2860
2861         /* if the device is closed, we must leave it alone */
2862         rtnl_lock();
2863         if (netif_running(adapter->netdev)) {
2864                 netdev_notice(adapter->netdev, "resetting\n");
2865                 vmxnet3_quiesce_dev(adapter);
2866                 vmxnet3_reset_dev(adapter);
2867                 vmxnet3_activate_dev(adapter);
2868         } else {
2869                 netdev_info(adapter->netdev, "already closed\n");
2870         }
2871         rtnl_unlock();
2872
2873         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2874 }
2875
2876
2877 static int
2878 vmxnet3_probe_device(struct pci_dev *pdev,
2879                      const struct pci_device_id *id)
2880 {
2881         static const struct net_device_ops vmxnet3_netdev_ops = {
2882                 .ndo_open = vmxnet3_open,
2883                 .ndo_stop = vmxnet3_close,
2884                 .ndo_start_xmit = vmxnet3_xmit_frame,
2885                 .ndo_set_mac_address = vmxnet3_set_mac_addr,
2886                 .ndo_change_mtu = vmxnet3_change_mtu,
2887                 .ndo_set_features = vmxnet3_set_features,
2888                 .ndo_get_stats64 = vmxnet3_get_stats64,
2889                 .ndo_tx_timeout = vmxnet3_tx_timeout,
2890                 .ndo_set_rx_mode = vmxnet3_set_mc,
2891                 .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid,
2892                 .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid,
2893 #ifdef CONFIG_NET_POLL_CONTROLLER
2894                 .ndo_poll_controller = vmxnet3_netpoll,
2895 #endif
2896         };
2897         int err;
2898         bool dma64 = false; /* stupid gcc */
2899         u32 ver;
2900         struct net_device *netdev;
2901         struct vmxnet3_adapter *adapter;
2902         u8 mac[ETH_ALEN];
2903         int size;
2904         int num_tx_queues;
2905         int num_rx_queues;
2906
2907         if (!pci_msi_enabled())
2908                 enable_mq = 0;
2909
2910 #ifdef VMXNET3_RSS
2911         if (enable_mq)
2912                 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES,
2913                                     (int)num_online_cpus());
2914         else
2915 #endif
2916                 num_rx_queues = 1;
2917         num_rx_queues = rounddown_pow_of_two(num_rx_queues);
2918
2919         if (enable_mq)
2920                 num_tx_queues = min(VMXNET3_DEVICE_MAX_TX_QUEUES,
2921                                     (int)num_online_cpus());
2922         else
2923                 num_tx_queues = 1;
2924
2925         num_tx_queues = rounddown_pow_of_two(num_tx_queues);
2926         netdev = alloc_etherdev_mq(sizeof(struct vmxnet3_adapter),
2927                                    max(num_tx_queues, num_rx_queues));
2928         dev_info(&pdev->dev,
2929                  "# of Tx queues : %d, # of Rx queues : %d\n",
2930                  num_tx_queues, num_rx_queues);
2931
2932         if (!netdev)
2933                 return -ENOMEM;
2934
2935         pci_set_drvdata(pdev, netdev);
2936         adapter = netdev_priv(netdev);
2937         adapter->netdev = netdev;
2938         adapter->pdev = pdev;
2939
2940         spin_lock_init(&adapter->cmd_lock);
2941         adapter->shared = pci_alloc_consistent(adapter->pdev,
2942                                                sizeof(struct Vmxnet3_DriverShared),
2943                                                &adapter->shared_pa);
2944         if (!adapter->shared) {
2945                 dev_err(&pdev->dev, "Failed to allocate memory\n");
2946                 err = -ENOMEM;
2947                 goto err_alloc_shared;
2948         }
2949
2950         adapter->num_rx_queues = num_rx_queues;
2951         adapter->num_tx_queues = num_tx_queues;
2952
2953         size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues;
2954         size += sizeof(struct Vmxnet3_RxQueueDesc) * adapter->num_rx_queues;
2955         adapter->tqd_start = pci_alloc_consistent(adapter->pdev, size,
2956                                                   &adapter->queue_desc_pa);
2957
2958         if (!adapter->tqd_start) {
2959                 dev_err(&pdev->dev, "Failed to allocate memory\n");
2960                 err = -ENOMEM;
2961                 goto err_alloc_queue_desc;
2962         }
2963         adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start +
2964                                                             adapter->num_tx_queues);
2965
2966         adapter->pm_conf = kmalloc(sizeof(struct Vmxnet3_PMConf), GFP_KERNEL);
2967         if (adapter->pm_conf == NULL) {
2968                 err = -ENOMEM;
2969                 goto err_alloc_pm;
2970         }
2971
2972 #ifdef VMXNET3_RSS
2973
2974         adapter->rss_conf = kmalloc(sizeof(struct UPT1_RSSConf), GFP_KERNEL);
2975         if (adapter->rss_conf == NULL) {
2976                 err = -ENOMEM;
2977                 goto err_alloc_rss;
2978         }
2979 #endif /* VMXNET3_RSS */
2980
2981         err = vmxnet3_alloc_pci_resources(adapter, &dma64);
2982         if (err < 0)
2983                 goto err_alloc_pci;
2984
2985         ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS);
2986         if (ver & 1) {
2987                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1);
2988         } else {
2989                 dev_err(&pdev->dev,
2990                         "Incompatible h/w version (0x%x) for adapter\n", ver);
2991                 err = -EBUSY;
2992                 goto err_ver;
2993         }
2994
2995         ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS);
2996         if (ver & 1) {
2997                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1);
2998         } else {
2999                 dev_err(&pdev->dev,
3000                         "Incompatible upt version (0x%x) for adapter\n", ver);
3001                 err = -EBUSY;
3002                 goto err_ver;
3003         }
3004
3005         SET_NETDEV_DEV(netdev, &pdev->dev);
3006         vmxnet3_declare_features(adapter, dma64);
3007
3008         adapter->dev_number = atomic_read(&devices_found);
3009
3010         adapter->share_intr = irq_share_mode;
3011         if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE &&
3012             adapter->num_tx_queues != adapter->num_rx_queues)
3013                 adapter->share_intr = VMXNET3_INTR_DONTSHARE;
3014
3015         vmxnet3_alloc_intr_resources(adapter);
3016
3017 #ifdef VMXNET3_RSS
3018         if (adapter->num_rx_queues > 1 &&
3019             adapter->intr.type == VMXNET3_IT_MSIX) {
3020                 adapter->rss = true;
3021                 dev_dbg(&pdev->dev, "RSS is enabled.\n");
3022         } else {
3023                 adapter->rss = false;
3024         }
3025 #endif
3026
3027         vmxnet3_read_mac_addr(adapter, mac);
3028         memcpy(netdev->dev_addr,  mac, netdev->addr_len);
3029
3030         netdev->netdev_ops = &vmxnet3_netdev_ops;
3031         vmxnet3_set_ethtool_ops(netdev);
3032         netdev->watchdog_timeo = 5 * HZ;
3033
3034         INIT_WORK(&adapter->work, vmxnet3_reset_work);
3035         set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
3036
3037         if (adapter->intr.type == VMXNET3_IT_MSIX) {
3038                 int i;
3039                 for (i = 0; i < adapter->num_rx_queues; i++) {
3040                         netif_napi_add(adapter->netdev,
3041                                        &adapter->rx_queue[i].napi,
3042                                        vmxnet3_poll_rx_only, 64);
3043                 }
3044         } else {
3045                 netif_napi_add(adapter->netdev, &adapter->rx_queue[0].napi,
3046                                vmxnet3_poll, 64);
3047         }
3048
3049         netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues);
3050         netif_set_real_num_rx_queues(adapter->netdev, adapter->num_rx_queues);
3051
3052         err = register_netdev(netdev);
3053
3054         if (err) {
3055                 dev_err(&pdev->dev, "Failed to register adapter\n");
3056                 goto err_register;
3057         }
3058
3059         vmxnet3_check_link(adapter, false);
3060         atomic_inc(&devices_found);
3061         return 0;
3062
3063 err_register:
3064         vmxnet3_free_intr_resources(adapter);
3065 err_ver:
3066         vmxnet3_free_pci_resources(adapter);
3067 err_alloc_pci:
3068 #ifdef VMXNET3_RSS
3069         kfree(adapter->rss_conf);
3070 err_alloc_rss:
3071 #endif
3072         kfree(adapter->pm_conf);
3073 err_alloc_pm:
3074         pci_free_consistent(adapter->pdev, size, adapter->tqd_start,
3075                             adapter->queue_desc_pa);
3076 err_alloc_queue_desc:
3077         pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared),
3078                             adapter->shared, adapter->shared_pa);
3079 err_alloc_shared:
3080         pci_set_drvdata(pdev, NULL);
3081         free_netdev(netdev);
3082         return err;
3083 }
3084
3085
3086 static void
3087 vmxnet3_remove_device(struct pci_dev *pdev)
3088 {
3089         struct net_device *netdev = pci_get_drvdata(pdev);
3090         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3091         int size = 0;
3092         int num_rx_queues;
3093
3094 #ifdef VMXNET3_RSS
3095         if (enable_mq)
3096                 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES,
3097                                     (int)num_online_cpus());
3098         else
3099 #endif
3100                 num_rx_queues = 1;
3101         num_rx_queues = rounddown_pow_of_two(num_rx_queues);
3102
3103         cancel_work_sync(&adapter->work);
3104
3105         unregister_netdev(netdev);
3106
3107         vmxnet3_free_intr_resources(adapter);
3108         vmxnet3_free_pci_resources(adapter);
3109 #ifdef VMXNET3_RSS
3110         kfree(adapter->rss_conf);
3111 #endif
3112         kfree(adapter->pm_conf);
3113
3114         size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues;
3115         size += sizeof(struct Vmxnet3_RxQueueDesc) * num_rx_queues;
3116         pci_free_consistent(adapter->pdev, size, adapter->tqd_start,
3117                             adapter->queue_desc_pa);
3118         pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared),
3119                             adapter->shared, adapter->shared_pa);
3120         free_netdev(netdev);
3121 }
3122
3123
3124 #ifdef CONFIG_PM
3125
3126 static int
3127 vmxnet3_suspend(struct device *device)
3128 {
3129         struct pci_dev *pdev = to_pci_dev(device);
3130         struct net_device *netdev = pci_get_drvdata(pdev);
3131         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3132         struct Vmxnet3_PMConf *pmConf;
3133         struct ethhdr *ehdr;
3134         struct arphdr *ahdr;
3135         u8 *arpreq;
3136         struct in_device *in_dev;
3137         struct in_ifaddr *ifa;
3138         unsigned long flags;
3139         int i = 0;
3140
3141         if (!netif_running(netdev))
3142                 return 0;
3143
3144         for (i = 0; i < adapter->num_rx_queues; i++)
3145                 napi_disable(&adapter->rx_queue[i].napi);
3146
3147         vmxnet3_disable_all_intrs(adapter);
3148         vmxnet3_free_irqs(adapter);
3149         vmxnet3_free_intr_resources(adapter);
3150
3151         netif_device_detach(netdev);
3152         netif_tx_stop_all_queues(netdev);
3153
3154         /* Create wake-up filters. */
3155         pmConf = adapter->pm_conf;
3156         memset(pmConf, 0, sizeof(*pmConf));
3157
3158         if (adapter->wol & WAKE_UCAST) {
3159                 pmConf->filters[i].patternSize = ETH_ALEN;
3160                 pmConf->filters[i].maskSize = 1;
3161                 memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN);
3162                 pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */
3163
3164                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
3165                 i++;
3166         }
3167
3168         if (adapter->wol & WAKE_ARP) {
3169                 in_dev = in_dev_get(netdev);
3170                 if (!in_dev)
3171                         goto skip_arp;
3172
3173                 ifa = (struct in_ifaddr *)in_dev->ifa_list;
3174                 if (!ifa)
3175                         goto skip_arp;
3176
3177                 pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/
3178                         sizeof(struct arphdr) +         /* ARP header */
3179                         2 * ETH_ALEN +          /* 2 Ethernet addresses*/
3180                         2 * sizeof(u32);        /*2 IPv4 addresses */
3181                 pmConf->filters[i].maskSize =
3182                         (pmConf->filters[i].patternSize - 1) / 8 + 1;
3183
3184                 /* ETH_P_ARP in Ethernet header. */
3185                 ehdr = (struct ethhdr *)pmConf->filters[i].pattern;
3186                 ehdr->h_proto = htons(ETH_P_ARP);
3187
3188                 /* ARPOP_REQUEST in ARP header. */
3189                 ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN];
3190                 ahdr->ar_op = htons(ARPOP_REQUEST);
3191                 arpreq = (u8 *)(ahdr + 1);
3192
3193                 /* The Unicast IPv4 address in 'tip' field. */
3194                 arpreq += 2 * ETH_ALEN + sizeof(u32);
3195                 *(u32 *)arpreq = ifa->ifa_address;
3196
3197                 /* The mask for the relevant bits. */
3198                 pmConf->filters[i].mask[0] = 0x00;
3199                 pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */
3200                 pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */
3201                 pmConf->filters[i].mask[3] = 0x00;
3202                 pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */
3203                 pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */
3204                 in_dev_put(in_dev);
3205
3206                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
3207                 i++;
3208         }
3209
3210 skip_arp:
3211         if (adapter->wol & WAKE_MAGIC)
3212                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_MAGIC;
3213
3214         pmConf->numFilters = i;
3215
3216         adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
3217         adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
3218                                                                   *pmConf));
3219         adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys(
3220                                                                  pmConf));
3221
3222         spin_lock_irqsave(&adapter->cmd_lock, flags);
3223         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3224                                VMXNET3_CMD_UPDATE_PMCFG);
3225         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3226
3227         pci_save_state(pdev);
3228         pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND),
3229                         adapter->wol);
3230         pci_disable_device(pdev);
3231         pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND));
3232
3233         return 0;
3234 }
3235
3236
3237 static int
3238 vmxnet3_resume(struct device *device)
3239 {
3240         int err, i = 0;
3241         unsigned long flags;
3242         struct pci_dev *pdev = to_pci_dev(device);
3243         struct net_device *netdev = pci_get_drvdata(pdev);
3244         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3245         struct Vmxnet3_PMConf *pmConf;
3246
3247         if (!netif_running(netdev))
3248                 return 0;
3249
3250         /* Destroy wake-up filters. */
3251         pmConf = adapter->pm_conf;
3252         memset(pmConf, 0, sizeof(*pmConf));
3253
3254         adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
3255         adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
3256                                                                   *pmConf));
3257         adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys(
3258                                                                  pmConf));
3259
3260         netif_device_attach(netdev);
3261         pci_set_power_state(pdev, PCI_D0);
3262         pci_restore_state(pdev);
3263         err = pci_enable_device_mem(pdev);
3264         if (err != 0)
3265                 return err;
3266
3267         pci_enable_wake(pdev, PCI_D0, 0);
3268
3269         spin_lock_irqsave(&adapter->cmd_lock, flags);
3270         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3271                                VMXNET3_CMD_UPDATE_PMCFG);
3272         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3273         vmxnet3_alloc_intr_resources(adapter);
3274         vmxnet3_request_irqs(adapter);
3275         for (i = 0; i < adapter->num_rx_queues; i++)
3276                 napi_enable(&adapter->rx_queue[i].napi);
3277         vmxnet3_enable_all_intrs(adapter);
3278
3279         return 0;
3280 }
3281
3282 static const struct dev_pm_ops vmxnet3_pm_ops = {
3283         .suspend = vmxnet3_suspend,
3284         .resume = vmxnet3_resume,
3285 };
3286 #endif
3287
3288 static struct pci_driver vmxnet3_driver = {
3289         .name           = vmxnet3_driver_name,
3290         .id_table       = vmxnet3_pciid_table,
3291         .probe          = vmxnet3_probe_device,
3292         .remove         = vmxnet3_remove_device,
3293 #ifdef CONFIG_PM
3294         .driver.pm      = &vmxnet3_pm_ops,
3295 #endif
3296 };
3297
3298
3299 static int __init
3300 vmxnet3_init_module(void)
3301 {
3302         pr_info("%s - version %s\n", VMXNET3_DRIVER_DESC,
3303                 VMXNET3_DRIVER_VERSION_REPORT);
3304         return pci_register_driver(&vmxnet3_driver);
3305 }
3306
3307 module_init(vmxnet3_init_module);
3308
3309
3310 static void
3311 vmxnet3_exit_module(void)
3312 {
3313         pci_unregister_driver(&vmxnet3_driver);
3314 }
3315
3316 module_exit(vmxnet3_exit_module);
3317
3318 MODULE_AUTHOR("VMware, Inc.");
3319 MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC);
3320 MODULE_LICENSE("GPL v2");
3321 MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING);