drivers/net/ethernet/mellanox/mlx4/en_tx.c

   1 /*
   2  * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  *
  32  */
  33
  34 #include <asm/page.h>
  35 #include <linux/mlx4/cq.h>
  36 #include <linux/slab.h>
  37 #include <linux/mlx4/qp.h>
  38 #include <linux/skbuff.h>
  39 #include <linux/if_vlan.h>
  40 #include <linux/vmalloc.h>
  41 #include <linux/tcp.h>
  42 #include <linux/moduleparam.h>
  43
  44 #include "mlx4_en.h"
  45
  46 enum {
  47         MAX_INLINE = 104, /* 128 - 16 - 4 - 4 */
  48         MAX_BF = 256,
  49 };
  50
  51 static int inline_thold __read_mostly = MAX_INLINE;
  52
  53 module_param_named(inline_thold, inline_thold, int, 0444);
  54 MODULE_PARM_DESC(inline_thold, "threshold for using inline data");
  55
  56 int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv,
  57                            struct mlx4_en_tx_ring **pring, int qpn, u32 size,
  58                            u16 stride)
  59 {
  60         struct mlx4_en_dev *mdev = priv->mdev;
  61         struct mlx4_en_tx_ring *ring;
  62         int tmp;
  63         int err;
  64
  65         ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  66         if (!ring) {
  67                 en_err(priv, "Failed allocating TX ring\n");
  68                 return -ENOMEM;
  69         }
  70
  71         ring->size = size;
  72         ring->size_mask = size - 1;
  73         ring->stride = stride;
  74
  75         inline_thold = min(inline_thold, MAX_INLINE);
  76
  77         tmp = size * sizeof(struct mlx4_en_tx_info);
  78         ring->tx_info = vmalloc(tmp);
  79         if (!ring->tx_info) {
  80                 err = -ENOMEM;
  81                 goto err_ring;
  82         }
  83
  84         en_dbg(DRV, priv, "Allocated tx_info ring at addr:%p size:%d\n",
  85                  ring->tx_info, tmp);
  86
  87         ring->bounce_buf = kmalloc(MAX_DESC_SIZE, GFP_KERNEL);
  88         if (!ring->bounce_buf) {
  89                 err = -ENOMEM;
  90                 goto err_info;
  91         }
  92         ring->buf_size = ALIGN(size * ring->stride, MLX4_EN_PAGE_SIZE);
  93
  94         err = mlx4_alloc_hwq_res(mdev->dev, &ring->wqres, ring->buf_size,
  95                                  2 * PAGE_SIZE);
  96         if (err) {
  97                 en_err(priv, "Failed allocating hwq resources\n");
  98                 goto err_bounce;
  99         }
 100
 101         err = mlx4_en_map_buffer(&ring->wqres.buf);
 102         if (err) {
 103                 en_err(priv, "Failed to map TX buffer\n");
 104                 goto err_hwq_res;
 105         }
 106
 107         ring->buf = ring->wqres.buf.direct.buf;
 108
 109         en_dbg(DRV, priv, "Allocated TX ring (addr:%p) - buf:%p size:%d "
 110                "buf_size:%d dma:%llx\n", ring, ring->buf, ring->size,
 111                ring->buf_size, (unsigned long long) ring->wqres.buf.direct.map);
 112
 113         ring->qpn = qpn;
 114         err = mlx4_qp_alloc(mdev->dev, ring->qpn, &ring->qp);
 115         if (err) {
 116                 en_err(priv, "Failed allocating qp %d\n", ring->qpn);
 117                 goto err_map;
 118         }
 119         ring->qp.event = mlx4_en_sqp_event;
 120
 121         err = mlx4_bf_alloc(mdev->dev, &ring->bf);
 122         if (err) {
 123                 en_dbg(DRV, priv, "working without blueflame (%d)", err);
 124                 ring->bf.uar = &mdev->priv_uar;
 125                 ring->bf.uar->map = mdev->uar_map;
 126                 ring->bf_enabled = false;
 127         } else
 128                 ring->bf_enabled = true;
 129
 130         ring->hwtstamp_tx_type = priv->hwtstamp_config.tx_type;
 131
 132         *pring = ring;
 133         return 0;
 134
 135 err_map:
 136         mlx4_en_unmap_buffer(&ring->wqres.buf);
 137 err_hwq_res:
 138         mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
 139 err_bounce:
 140         kfree(ring->bounce_buf);
 141         ring->bounce_buf = NULL;
 142 err_info:
 143         vfree(ring->tx_info);
 144         ring->tx_info = NULL;
 145 err_ring:
 146         kfree(ring);
 147         *pring = NULL;
 148         return err;
 149 }
 150
 151 void mlx4_en_destroy_tx_ring(struct mlx4_en_priv *priv,
 152                              struct mlx4_en_tx_ring **pring)
 153 {
 154         struct mlx4_en_dev *mdev = priv->mdev;
 155         struct mlx4_en_tx_ring *ring = *pring;
 156         en_dbg(DRV, priv, "Destroying tx ring, qpn: %d\n", ring->qpn);
 157
 158         if (ring->bf_enabled)
 159                 mlx4_bf_free(mdev->dev, &ring->bf);
 160         mlx4_qp_remove(mdev->dev, &ring->qp);
 161         mlx4_qp_free(mdev->dev, &ring->qp);
 162         mlx4_en_unmap_buffer(&ring->wqres.buf);
 163         mlx4_free_hwq_res(mdev->dev, &ring->wqres, ring->buf_size);
 164         kfree(ring->bounce_buf);
 165         ring->bounce_buf = NULL;
 166         vfree(ring->tx_info);
 167         ring->tx_info = NULL;
 168         kfree(ring);
 169         *pring = NULL;
 170 }
 171
 172 int mlx4_en_activate_tx_ring(struct mlx4_en_priv *priv,
 173                              struct mlx4_en_tx_ring *ring,
 174                              int cq, int user_prio)
 175 {
 176         struct mlx4_en_dev *mdev = priv->mdev;
 177         int err;
 178
 179         ring->cqn = cq;
 180         ring->prod = 0;
 181         ring->cons = 0xffffffff;
 182         ring->last_nr_txbb = 1;
 183         ring->poll_cnt = 0;
 184         memset(ring->tx_info, 0, ring->size * sizeof(struct mlx4_en_tx_info));
 185         memset(ring->buf, 0, ring->buf_size);
 186
 187         ring->qp_state = MLX4_QP_STATE_RST;
 188         ring->doorbell_qpn = ring->qp.qpn << 8;
 189
 190         mlx4_en_fill_qp_context(priv, ring->size, ring->stride, 1, 0, ring->qpn,
 191                                 ring->cqn, user_prio, &ring->context);
 192         if (ring->bf_enabled)
 193                 ring->context.usr_page = cpu_to_be32(ring->bf.uar->index);
 194
 195         err = mlx4_qp_to_ready(mdev->dev, &ring->wqres.mtt, &ring->context,
 196                                &ring->qp, &ring->qp_state);
 197
 198         return err;
 199 }
 200
 201 void mlx4_en_deactivate_tx_ring(struct mlx4_en_priv *priv,
 202                                 struct mlx4_en_tx_ring *ring)
 203 {
 204         struct mlx4_en_dev *mdev = priv->mdev;
 205
 206         mlx4_qp_modify(mdev->dev, NULL, ring->qp_state,
 207                        MLX4_QP_STATE_RST, NULL, 0, 0, &ring->qp);
 208 }
 209
 210 static void mlx4_en_stamp_wqe(struct mlx4_en_priv *priv,
 211                               struct mlx4_en_tx_ring *ring, int index,
 212                               u8 owner)
 213 {
 214         __be32 stamp = cpu_to_be32(STAMP_VAL | (!!owner << STAMP_SHIFT));
 215         struct mlx4_en_tx_desc *tx_desc = ring->buf + index * TXBB_SIZE;
 216         struct mlx4_en_tx_info *tx_info = &ring->tx_info[index];
 217         void *end = ring->buf + ring->buf_size;
 218         __be32 *ptr = (__be32 *)tx_desc;
 219         int i;
 220
 221         /* Optimize the common case when there are no wraparounds */
 222         if (likely((void *)tx_desc + tx_info->nr_txbb * TXBB_SIZE <= end)) {
 223                 /* Stamp the freed descriptor */
 224                 for (i = 0; i < tx_info->nr_txbb * TXBB_SIZE;
 225                      i += STAMP_STRIDE) {
 226                         *ptr = stamp;
 227                         ptr += STAMP_DWORDS;
 228                 }
 229         } else {
 230                 /* Stamp the freed descriptor */
 231                 for (i = 0; i < tx_info->nr_txbb * TXBB_SIZE;
 232                      i += STAMP_STRIDE) {
 233                         *ptr = stamp;
 234                         ptr += STAMP_DWORDS;
 235                         if ((void *)ptr >= end) {
 236                                 ptr = ring->buf;
 237                                 stamp ^= cpu_to_be32(0x80000000);
 238                         }
 239                 }
 240         }
 241 }
 242
 243
 244 static u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv,
 245                                 struct mlx4_en_tx_ring *ring,
 246                                 int index, u8 owner, u64 timestamp)
 247 {
 248         struct mlx4_en_dev *mdev = priv->mdev;
 249         struct mlx4_en_tx_info *tx_info = &ring->tx_info[index];
 250         struct mlx4_en_tx_desc *tx_desc = ring->buf + index * TXBB_SIZE;
 251         struct mlx4_wqe_data_seg *data = (void *) tx_desc + tx_info->data_offset;
 252         struct sk_buff *skb = tx_info->skb;
 253         struct skb_frag_struct *frag;
 254         void *end = ring->buf + ring->buf_size;
 255         int frags = skb_shinfo(skb)->nr_frags;
 256         int i;
 257         struct skb_shared_hwtstamps hwts;
 258
 259         if (timestamp) {
 260                 mlx4_en_fill_hwtstamps(mdev, &hwts, timestamp);
 261                 skb_tstamp_tx(skb, &hwts);
 262         }
 263
 264         /* Optimize the common case when there are no wraparounds */
 265         if (likely((void *) tx_desc + tx_info->nr_txbb * TXBB_SIZE <= end)) {
 266                 if (!tx_info->inl) {
 267                         if (tx_info->linear) {
 268                                 dma_unmap_single(priv->ddev,
 269                                         (dma_addr_t) be64_to_cpu(data->addr),
 270                                          be32_to_cpu(data->byte_count),
 271                                          PCI_DMA_TODEVICE);
 272                                 ++data;
 273                         }
 274
 275                         for (i = 0; i < frags; i++) {
 276                                 frag = &skb_shinfo(skb)->frags[i];
 277                                 dma_unmap_page(priv->ddev,
 278                                         (dma_addr_t) be64_to_cpu(data[i].addr),
 279                                         skb_frag_size(frag), PCI_DMA_TODEVICE);
 280                         }
 281                 }
 282         } else {
 283                 if (!tx_info->inl) {
 284                         if ((void *) data >= end) {
 285                                 data = ring->buf + ((void *)data - end);
 286                         }
 287
 288                         if (tx_info->linear) {
 289                                 dma_unmap_single(priv->ddev,
 290                                         (dma_addr_t) be64_to_cpu(data->addr),
 291                                          be32_to_cpu(data->byte_count),
 292                                          PCI_DMA_TODEVICE);
 293                                 ++data;
 294                         }
 295
 296                         for (i = 0; i < frags; i++) {
 297                                 /* Check for wraparound before unmapping */
 298                                 if ((void *) data >= end)
 299                                         data = ring->buf;
 300                                 frag = &skb_shinfo(skb)->frags[i];
 301                                 dma_unmap_page(priv->ddev,
 302                                         (dma_addr_t) be64_to_cpu(data->addr),
 303                                          skb_frag_size(frag), PCI_DMA_TODEVICE);
 304                                 ++data;
 305                         }
 306                 }
 307         }
 308         dev_kfree_skb_any(skb);
 309         return tx_info->nr_txbb;
 310 }
 311
 312
 313 int mlx4_en_free_tx_buf(struct net_device *dev, struct mlx4_en_tx_ring *ring)
 314 {
 315         struct mlx4_en_priv *priv = netdev_priv(dev);
 316         int cnt = 0;
 317
 318         /* Skip last polled descriptor */
 319         ring->cons += ring->last_nr_txbb;
 320         en_dbg(DRV, priv, "Freeing Tx buf - cons:0x%x prod:0x%x\n",
 321                  ring->cons, ring->prod);
 322
 323         if ((u32) (ring->prod - ring->cons) > ring->size) {
 324                 if (netif_msg_tx_err(priv))
 325                         en_warn(priv, "Tx consumer passed producer!\n");
 326                 return 0;
 327         }
 328
 329         while (ring->cons != ring->prod) {
 330                 ring->last_nr_txbb = mlx4_en_free_tx_desc(priv, ring,
 331                                                 ring->cons & ring->size_mask,
 332                                                 !!(ring->cons & ring->size), 0);
 333                 ring->cons += ring->last_nr_txbb;
 334                 cnt++;
 335         }
 336
 337         netdev_tx_reset_queue(ring->tx_queue);
 338
 339         if (cnt)
 340                 en_dbg(DRV, priv, "Freed %d uncompleted tx descriptors\n", cnt);
 341
 342         return cnt;
 343 }
 344
 345 static void mlx4_en_process_tx_cq(struct net_device *dev, struct mlx4_en_cq *cq)
 346 {
 347         struct mlx4_en_priv *priv = netdev_priv(dev);
 348         struct mlx4_cq *mcq = &cq->mcq;
 349         struct mlx4_en_tx_ring *ring = priv->tx_ring[cq->ring];
 350         struct mlx4_cqe *cqe;
 351         u16 index;
 352         u16 new_index, ring_index, stamp_index;
 353         u32 txbbs_skipped = 0;
 354         u32 txbbs_stamp = 0;
 355         u32 cons_index = mcq->cons_index;
 356         int size = cq->size;
 357         u32 size_mask = ring->size_mask;
 358         struct mlx4_cqe *buf = cq->buf;
 359         u32 packets = 0;
 360         u32 bytes = 0;
 361         int factor = priv->cqe_factor;
 362         u64 timestamp = 0;
 363
 364         if (!priv->port_up)
 365                 return;
 366
 367         index = cons_index & size_mask;
 368         cqe = &buf[(index << factor) + factor];
 369         ring_index = ring->cons & size_mask;
 370         stamp_index = ring_index;
 371
 372         /* Process all completed CQEs */
 373         while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK,
 374                         cons_index & size)) {
 375                 /*
 376                  * make sure we read the CQE after we read the
 377                  * ownership bit
 378                  */
 379                 rmb();
 380
 381                 if (unlikely((cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) ==
 382                              MLX4_CQE_OPCODE_ERROR)) {
 383                         struct mlx4_err_cqe *cqe_err = (struct mlx4_err_cqe *)cqe;
 384
 385                         en_err(priv, "CQE error - vendor syndrome: 0x%x syndrome: 0x%x\n",
 386                                cqe_err->vendor_err_syndrome,
 387                                cqe_err->syndrome);
 388                 }
 389
 390                 /* Skip over last polled CQE */
 391                 new_index = be16_to_cpu(cqe->wqe_index) & size_mask;
 392
 393                 do {
 394                         txbbs_skipped += ring->last_nr_txbb;
 395                         ring_index = (ring_index + ring->last_nr_txbb) & size_mask;
 396                         if (ring->tx_info[ring_index].ts_requested)
 397                                 timestamp = mlx4_en_get_cqe_ts(cqe);
 398
 399                         /* free next descriptor */
 400                         ring->last_nr_txbb = mlx4_en_free_tx_desc(
 401                                         priv, ring, ring_index,
 402                                         !!((ring->cons + txbbs_skipped) &
 403                                         ring->size), timestamp);
 404
 405                         mlx4_en_stamp_wqe(priv, ring, stamp_index,
 406                                           !!((ring->cons + txbbs_stamp) &
 407                                                 ring->size));
 408                         stamp_index = ring_index;
 409                         txbbs_stamp = txbbs_skipped;
 410                         packets++;
 411                         bytes += ring->tx_info[ring_index].nr_bytes;
 412                 } while (ring_index != new_index);
 413
 414                 ++cons_index;
 415                 index = cons_index & size_mask;
 416                 cqe = &buf[(index << factor) + factor];
 417         }
 418
 419
 420         /*
 421          * To prevent CQ overflow we first update CQ consumer and only then
 422          * the ring consumer.
 423          */
 424         mcq->cons_index = cons_index;
 425         mlx4_cq_set_ci(mcq);
 426         wmb();
 427         ring->cons += txbbs_skipped;
 428         netdev_tx_completed_queue(ring->tx_queue, packets, bytes);
 429
 430         /*
 431          * Wakeup Tx queue if this stopped, and at least 1 packet
 432          * was completed
 433          */
 434         if (netif_tx_queue_stopped(ring->tx_queue) && txbbs_skipped > 0) {
 435                 netif_tx_wake_queue(ring->tx_queue);
 436                 priv->port_stats.wake_queue++;
 437         }
 438 }
 439
 440 void mlx4_en_tx_irq(struct mlx4_cq *mcq)
 441 {
 442         struct mlx4_en_cq *cq = container_of(mcq, struct mlx4_en_cq, mcq);
 443         struct mlx4_en_priv *priv = netdev_priv(cq->dev);
 444
 445         mlx4_en_process_tx_cq(cq->dev, cq);
 446         mlx4_en_arm_cq(priv, cq);
 447 }
 448
 449
 450 static struct mlx4_en_tx_desc *mlx4_en_bounce_to_desc(struct mlx4_en_priv *priv,
 451                                                       struct mlx4_en_tx_ring *ring,
 452                                                       u32 index,
 453                                                       unsigned int desc_size)
 454 {
 455         u32 copy = (ring->size - index) * TXBB_SIZE;
 456         int i;
 457
 458         for (i = desc_size - copy - 4; i >= 0; i -= 4) {
 459                 if ((i & (TXBB_SIZE - 1)) == 0)
 460                         wmb();
 461
 462                 *((u32 *) (ring->buf + i)) =
 463                         *((u32 *) (ring->bounce_buf + copy + i));
 464         }
 465
 466         for (i = copy - 4; i >= 4 ; i -= 4) {
 467                 if ((i & (TXBB_SIZE - 1)) == 0)
 468                         wmb();
 469
 470                 *((u32 *) (ring->buf + index * TXBB_SIZE + i)) =
 471                         *((u32 *) (ring->bounce_buf + i));
 472         }
 473
 474         /* Return real descriptor location */
 475         return ring->buf + index * TXBB_SIZE;
 476 }
 477
 478 static int is_inline(struct sk_buff *skb, void **pfrag)
 479 {
 480         void *ptr;
 481
 482         if (inline_thold && !skb_is_gso(skb) && skb->len <= inline_thold) {
 483                 if (skb_shinfo(skb)->nr_frags == 1) {
 484                         ptr = skb_frag_address_safe(&skb_shinfo(skb)->frags[0]);
 485                         if (unlikely(!ptr))
 486                                 return 0;
 487
 488                         if (pfrag)
 489                                 *pfrag = ptr;
 490
 491                         return 1;
 492                 } else if (unlikely(skb_shinfo(skb)->nr_frags))
 493                         return 0;
 494                 else
 495                         return 1;
 496         }
 497
 498         return 0;
 499 }
 500
 501 static int inline_size(struct sk_buff *skb)
 502 {
 503         if (skb->len + CTRL_SIZE + sizeof(struct mlx4_wqe_inline_seg)
 504             <= MLX4_INLINE_ALIGN)
 505                 return ALIGN(skb->len + CTRL_SIZE +
 506                              sizeof(struct mlx4_wqe_inline_seg), 16);
 507         else
 508                 return ALIGN(skb->len + CTRL_SIZE + 2 *
 509                              sizeof(struct mlx4_wqe_inline_seg), 16);
 510 }
 511
 512 static int get_real_size(struct sk_buff *skb, struct net_device *dev,
 513                          int *lso_header_size)
 514 {
 515         struct mlx4_en_priv *priv = netdev_priv(dev);
 516         int real_size;
 517
 518         if (skb_is_gso(skb)) {
 519                 *lso_header_size = skb_transport_offset(skb) + tcp_hdrlen(skb);
 520                 real_size = CTRL_SIZE + skb_shinfo(skb)->nr_frags * DS_SIZE +
 521                         ALIGN(*lso_header_size + 4, DS_SIZE);
 522                 if (unlikely(*lso_header_size != skb_headlen(skb))) {
 523                         /* We add a segment for the skb linear buffer only if
 524                          * it contains data */
 525                         if (*lso_header_size < skb_headlen(skb))
 526                                 real_size += DS_SIZE;
 527                         else {
 528                                 if (netif_msg_tx_err(priv))
 529                                         en_warn(priv, "Non-linear headers\n");
 530                                 return 0;
 531                         }
 532                 }
 533         } else {
 534                 *lso_header_size = 0;
 535                 if (!is_inline(skb, NULL))
 536                         real_size = CTRL_SIZE + (skb_shinfo(skb)->nr_frags + 1) * DS_SIZE;
 537                 else
 538                         real_size = inline_size(skb);
 539         }
 540
 541         return real_size;
 542 }
 543
 544 static void build_inline_wqe(struct mlx4_en_tx_desc *tx_desc, struct sk_buff *skb,
 545                              int real_size, u16 *vlan_tag, int tx_ind, void *fragptr)
 546 {
 547         struct mlx4_wqe_inline_seg *inl = &tx_desc->inl;
 548         int spc = MLX4_INLINE_ALIGN - CTRL_SIZE - sizeof *inl;
 549
 550         if (skb->len <= spc) {
 551                 inl->byte_count = cpu_to_be32(1 << 31 | skb->len);
 552                 skb_copy_from_linear_data(skb, inl + 1, skb_headlen(skb));
 553                 if (skb_shinfo(skb)->nr_frags)
 554                         memcpy(((void *)(inl + 1)) + skb_headlen(skb), fragptr,
 555                                skb_frag_size(&skb_shinfo(skb)->frags[0]));
 556
 557         } else {
 558                 inl->byte_count = cpu_to_be32(1 << 31 | spc);
 559                 if (skb_headlen(skb) <= spc) {
 560                         skb_copy_from_linear_data(skb, inl + 1, skb_headlen(skb));
 561                         if (skb_headlen(skb) < spc) {
 562                                 memcpy(((void *)(inl + 1)) + skb_headlen(skb),
 563                                         fragptr, spc - skb_headlen(skb));
 564                                 fragptr +=  spc - skb_headlen(skb);
 565                         }
 566                         inl = (void *) (inl + 1) + spc;
 567                         memcpy(((void *)(inl + 1)), fragptr, skb->len - spc);
 568                 } else {
 569                         skb_copy_from_linear_data(skb, inl + 1, spc);
 570                         inl = (void *) (inl + 1) + spc;
 571                         skb_copy_from_linear_data_offset(skb, spc, inl + 1,
 572                                         skb_headlen(skb) - spc);
 573                         if (skb_shinfo(skb)->nr_frags)
 574                                 memcpy(((void *)(inl + 1)) + skb_headlen(skb) - spc,
 575                                         fragptr, skb_frag_size(&skb_shinfo(skb)->frags[0]));
 576                 }
 577
 578                 wmb();
 579                 inl->byte_count = cpu_to_be32(1 << 31 | (skb->len - spc));
 580         }
 581 }
 582
 583 u16 mlx4_en_select_queue(struct net_device *dev, struct sk_buff *skb)
 584 {
 585         struct mlx4_en_priv *priv = netdev_priv(dev);
 586         u16 rings_p_up = priv->num_tx_rings_p_up;
 587         u8 up = 0;
 588
 589         if (dev->num_tc)
 590                 return skb_tx_hash(dev, skb);
 591
 592         if (vlan_tx_tag_present(skb))
 593                 up = vlan_tx_tag_get(skb) >> VLAN_PRIO_SHIFT;
 594
 595         return __netdev_pick_tx(dev, skb) % rings_p_up + up * rings_p_up;
 596 }
 597
 598 static void mlx4_bf_copy(void __iomem *dst, unsigned long *src, unsigned bytecnt)
 599 {
 600         __iowrite64_copy(dst, src, bytecnt / 8);
 601 }
 602
 603 netdev_tx_t mlx4_en_xmit(struct sk_buff *skb, struct net_device *dev)
 604 {
 605         struct mlx4_en_priv *priv = netdev_priv(dev);
 606         struct mlx4_en_dev *mdev = priv->mdev;
 607         struct device *ddev = priv->ddev;
 608         struct mlx4_en_tx_ring *ring;
 609         struct mlx4_en_tx_desc *tx_desc;
 610         struct mlx4_wqe_data_seg *data;
 611         struct mlx4_en_tx_info *tx_info;
 612         int tx_ind = 0;
 613         int nr_txbb;
 614         int desc_size;
 615         int real_size;
 616         u32 index, bf_index;
 617         __be32 op_own;
 618         u16 vlan_tag = 0;
 619         int i;
 620         int lso_header_size;
 621         void *fragptr;
 622         bool bounce = false;
 623
 624         if (!priv->port_up)
 625                 goto tx_drop;
 626
 627         real_size = get_real_size(skb, dev, &lso_header_size);
 628         if (unlikely(!real_size))
 629                 goto tx_drop;
 630
 631         /* Align descriptor to TXBB size */
 632         desc_size = ALIGN(real_size, TXBB_SIZE);
 633         nr_txbb = desc_size / TXBB_SIZE;
 634         if (unlikely(nr_txbb > MAX_DESC_TXBBS)) {
 635                 if (netif_msg_tx_err(priv))
 636                         en_warn(priv, "Oversized header or SG list\n");
 637                 goto tx_drop;
 638         }
 639
 640         tx_ind = skb->queue_mapping;
 641         ring = priv->tx_ring[tx_ind];
 642         if (vlan_tx_tag_present(skb))
 643                 vlan_tag = vlan_tx_tag_get(skb);
 644
 645         /* Check available TXBBs And 2K spare for prefetch */
 646         if (unlikely(((int)(ring->prod - ring->cons)) >
 647                      ring->size - HEADROOM - MAX_DESC_TXBBS)) {
 648                 /* every full Tx ring stops queue */
 649                 netif_tx_stop_queue(ring->tx_queue);
 650                 priv->port_stats.queue_stopped++;
 651
 652                 /* If queue was emptied after the if, and before the
 653                  * stop_queue - need to wake the queue, or else it will remain
 654                  * stopped forever.
 655                  * Need a memory barrier to make sure ring->cons was not
 656                  * updated before queue was stopped.
 657                  */
 658                 wmb();
 659
 660                 if (unlikely(((int)(ring->prod - ring->cons)) <=
 661                              ring->size - HEADROOM - MAX_DESC_TXBBS)) {
 662                         netif_tx_wake_queue(ring->tx_queue);
 663                         priv->port_stats.wake_queue++;
 664                 } else {
 665                         return NETDEV_TX_BUSY;
 666                 }
 667         }
 668
 669         /* Track current inflight packets for performance analysis */
 670         AVG_PERF_COUNTER(priv->pstats.inflight_avg,
 671                          (u32) (ring->prod - ring->cons - 1));
 672
 673         /* Packet is good - grab an index and transmit it */
 674         index = ring->prod & ring->size_mask;
 675         bf_index = ring->prod;
 676
 677         /* See if we have enough space for whole descriptor TXBB for setting
 678          * SW ownership on next descriptor; if not, use a bounce buffer. */
 679         if (likely(index + nr_txbb <= ring->size))
 680                 tx_desc = ring->buf + index * TXBB_SIZE;
 681         else {
 682                 tx_desc = (struct mlx4_en_tx_desc *) ring->bounce_buf;
 683                 bounce = true;
 684         }
 685
 686         /* Save skb in tx_info ring */
 687         tx_info = &ring->tx_info[index];
 688         tx_info->skb = skb;
 689         tx_info->nr_txbb = nr_txbb;
 690
 691         if (lso_header_size)
 692                 data = ((void *)&tx_desc->lso + ALIGN(lso_header_size + 4,
 693                                                       DS_SIZE));
 694         else
 695                 data = &tx_desc->data;
 696
 697         /* valid only for none inline segments */
 698         tx_info->data_offset = (void *)data - (void *)tx_desc;
 699
 700         tx_info->linear = (lso_header_size < skb_headlen(skb) &&
 701                            !is_inline(skb, NULL)) ? 1 : 0;
 702
 703         data += skb_shinfo(skb)->nr_frags + tx_info->linear - 1;
 704
 705         if (is_inline(skb, &fragptr)) {
 706                 tx_info->inl = 1;
 707         } else {
 708                 /* Map fragments */
 709                 for (i = skb_shinfo(skb)->nr_frags - 1; i >= 0; i--) {
 710                         struct skb_frag_struct *frag;
 711                         dma_addr_t dma;
 712
 713                         frag = &skb_shinfo(skb)->frags[i];
 714                         dma = skb_frag_dma_map(ddev, frag,
 715                                                0, skb_frag_size(frag),
 716                                                DMA_TO_DEVICE);
 717                         if (dma_mapping_error(ddev, dma))
 718                                 goto tx_drop_unmap;
 719
 720                         data->addr = cpu_to_be64(dma);
 721                         data->lkey = cpu_to_be32(mdev->mr.key);
 722                         wmb();
 723                         data->byte_count = cpu_to_be32(skb_frag_size(frag));
 724                         --data;
 725                 }
 726
 727                 /* Map linear part */
 728                 if (tx_info->linear) {
 729                         u32 byte_count = skb_headlen(skb) - lso_header_size;
 730                         dma_addr_t dma;
 731
 732                         dma = dma_map_single(ddev, skb->data +
 733                                              lso_header_size, byte_count,
 734                                              PCI_DMA_TODEVICE);
 735                         if (dma_mapping_error(ddev, dma))
 736                                 goto tx_drop_unmap;
 737
 738                         data->addr = cpu_to_be64(dma);
 739                         data->lkey = cpu_to_be32(mdev->mr.key);
 740                         wmb();
 741                         data->byte_count = cpu_to_be32(byte_count);
 742                 }
 743                 tx_info->inl = 0;
 744         }
 745
 746         /*
 747          * For timestamping add flag to skb_shinfo and
 748          * set flag for further reference
 749          */
 750         if (ring->hwtstamp_tx_type == HWTSTAMP_TX_ON &&
 751             skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
 752                 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
 753                 tx_info->ts_requested = 1;
 754         }
 755
 756         /* Prepare ctrl segement apart opcode+ownership, which depends on
 757          * whether LSO is used */
 758         tx_desc->ctrl.vlan_tag = cpu_to_be16(vlan_tag);
 759         tx_desc->ctrl.ins_vlan = MLX4_WQE_CTRL_INS_VLAN *
 760                 !!vlan_tx_tag_present(skb);
 761         tx_desc->ctrl.fence_size = (real_size / 16) & 0x3f;
 762         tx_desc->ctrl.srcrb_flags = priv->ctrl_flags;
 763         if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
 764                 tx_desc->ctrl.srcrb_flags |= cpu_to_be32(MLX4_WQE_CTRL_IP_CSUM |
 765                                                          MLX4_WQE_CTRL_TCP_UDP_CSUM);
 766                 ring->tx_csum++;
 767         }
 768
 769         if (priv->flags & MLX4_EN_FLAG_ENABLE_HW_LOOPBACK) {
 770                 struct ethhdr *ethh;
 771
 772                 /* Copy dst mac address to wqe. This allows loopback in eSwitch,
 773                  * so that VFs and PF can communicate with each other
 774                  */
 775                 ethh = (struct ethhdr *)skb->data;
 776                 tx_desc->ctrl.srcrb_flags16[0] = get_unaligned((__be16 *)ethh->h_dest);
 777                 tx_desc->ctrl.imm = get_unaligned((__be32 *)(ethh->h_dest + 2));
 778         }
 779
 780         /* Handle LSO (TSO) packets */
 781         if (lso_header_size) {
 782                 /* Mark opcode as LSO */
 783                 op_own = cpu_to_be32(MLX4_OPCODE_LSO | (1 << 6)) |
 784                         ((ring->prod & ring->size) ?
 785                                 cpu_to_be32(MLX4_EN_BIT_DESC_OWN) : 0);
 786
 787                 /* Fill in the LSO prefix */
 788                 tx_desc->lso.mss_hdr_size = cpu_to_be32(
 789                         skb_shinfo(skb)->gso_size << 16 | lso_header_size);
 790
 791                 /* Copy headers;
 792                  * note that we already verified that it is linear */
 793                 memcpy(tx_desc->lso.header, skb->data, lso_header_size);
 794
 795                 priv->port_stats.tso_packets++;
 796                 i = ((skb->len - lso_header_size) / skb_shinfo(skb)->gso_size) +
 797                         !!((skb->len - lso_header_size) % skb_shinfo(skb)->gso_size);
 798                 tx_info->nr_bytes = skb->len + (i - 1) * lso_header_size;
 799                 ring->packets += i;
 800         } else {
 801                 /* Normal (Non LSO) packet */
 802                 op_own = cpu_to_be32(MLX4_OPCODE_SEND) |
 803                         ((ring->prod & ring->size) ?
 804                          cpu_to_be32(MLX4_EN_BIT_DESC_OWN) : 0);
 805                 tx_info->nr_bytes = max_t(unsigned int, skb->len, ETH_ZLEN);
 806                 ring->packets++;
 807
 808         }
 809         ring->bytes += tx_info->nr_bytes;
 810         netdev_tx_sent_queue(ring->tx_queue, tx_info->nr_bytes);
 811         AVG_PERF_COUNTER(priv->pstats.tx_pktsz_avg, skb->len);
 812
 813         if (tx_info->inl) {
 814                 build_inline_wqe(tx_desc, skb, real_size, &vlan_tag, tx_ind, fragptr);
 815                 tx_info->inl = 1;
 816         }
 817
 818         ring->prod += nr_txbb;
 819
 820         /* If we used a bounce buffer then copy descriptor back into place */
 821         if (bounce)
 822                 tx_desc = mlx4_en_bounce_to_desc(priv, ring, index, desc_size);
 823
 824         skb_tx_timestamp(skb);
 825
 826         if (ring->bf_enabled && desc_size <= MAX_BF && !bounce && !vlan_tx_tag_present(skb)) {
 827                 *(__be32 *) (&tx_desc->ctrl.vlan_tag) |= cpu_to_be32(ring->doorbell_qpn);
 828                 op_own |= htonl((bf_index & 0xffff) << 8);
 829                 /* Ensure new descirptor hits memory
 830                 * before setting ownership of this descriptor to HW */
 831                 wmb();
 832                 tx_desc->ctrl.owner_opcode = op_own;
 833
 834                 wmb();
 835
 836                 mlx4_bf_copy(ring->bf.reg + ring->bf.offset, (unsigned long *) &tx_desc->ctrl,
 837                      desc_size);
 838
 839                 wmb();
 840
 841                 ring->bf.offset ^= ring->bf.buf_size;
 842         } else {
 843                 /* Ensure new descirptor hits memory
 844                 * before setting ownership of this descriptor to HW */
 845                 wmb();
 846                 tx_desc->ctrl.owner_opcode = op_own;
 847                 wmb();
 848                 iowrite32be(ring->doorbell_qpn, ring->bf.uar->map + MLX4_SEND_DOORBELL);
 849         }
 850
 851         return NETDEV_TX_OK;
 852
 853 tx_drop_unmap:
 854         en_err(priv, "DMA mapping error\n");
 855
 856         for (i++; i < skb_shinfo(skb)->nr_frags; i++) {
 857                 data++;
 858                 dma_unmap_page(ddev, (dma_addr_t) be64_to_cpu(data->addr),
 859                                be32_to_cpu(data->byte_count),
 860                                PCI_DMA_TODEVICE);
 861         }
 862
 863 tx_drop:
 864         dev_kfree_skb_any(skb);
 865         priv->stats.tx_dropped++;
 866         return NETDEV_TX_OK;
 867 }
 868