1 /*******************************************************************************
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2014 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *******************************************************************************/
28 #include <linux/types.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/netdevice.h>
32 #include <linux/vmalloc.h>
33 #include <linux/string.h>
35 #include <linux/interrupt.h>
37 #include <linux/tcp.h>
38 #include <linux/sctp.h>
39 #include <linux/pkt_sched.h>
40 #include <linux/ipv6.h>
41 #include <linux/slab.h>
42 #include <net/checksum.h>
43 #include <net/ip6_checksum.h>
44 #include <linux/ethtool.h>
46 #include <linux/if_vlan.h>
47 #include <linux/if_macvlan.h>
48 #include <linux/if_bridge.h>
49 #include <linux/prefetch.h>
50 #include <scsi/fc/fc_fcoe.h>
53 #include "ixgbe_common.h"
54 #include "ixgbe_dcb_82599.h"
55 #include "ixgbe_sriov.h"
57 char ixgbe_driver_name[] = "ixgbe";
58 static const char ixgbe_driver_string[] =
59 "Intel(R) 10 Gigabit PCI Express Network Driver";
61 char ixgbe_default_device_descr[] =
62 "Intel(R) 10 Gigabit Network Connection";
64 static char ixgbe_default_device_descr[] =
65 "Intel(R) 10 Gigabit Network Connection";
67 #define DRV_VERSION "3.19.1-k"
68 const char ixgbe_driver_version[] = DRV_VERSION;
69 static const char ixgbe_copyright[] =
70 "Copyright (c) 1999-2014 Intel Corporation.";
72 static const struct ixgbe_info *ixgbe_info_tbl[] = {
73 [board_82598] = &ixgbe_82598_info,
74 [board_82599] = &ixgbe_82599_info,
75 [board_X540] = &ixgbe_X540_info,
78 /* ixgbe_pci_tbl - PCI Device ID Table
80 * Wildcard entries (PCI_ANY_ID) should come last
81 * Last entry must be all 0s
83 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
84 * Class, Class Mask, private data (not used) }
86 static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = {
87 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598), board_82598 },
88 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT), board_82598 },
89 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT), board_82598 },
90 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT), board_82598 },
91 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2), board_82598 },
92 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4), board_82598 },
93 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT), board_82598 },
94 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT), board_82598 },
95 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM), board_82598 },
96 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR), board_82598 },
97 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM), board_82598 },
98 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX), board_82598 },
99 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4), board_82599 },
100 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM), board_82599 },
101 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR), board_82599 },
102 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), board_82599 },
103 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM), board_82599 },
104 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ), board_82599 },
105 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), board_82599 },
106 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE), board_82599 },
107 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE), board_82599 },
108 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM), board_82599 },
109 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE), board_82599 },
110 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T), board_X540 },
111 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2), board_82599 },
112 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
113 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP), board_82599 },
114 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
115 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
116 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
117 /* required last entry */
120 MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
122 #ifdef CONFIG_IXGBE_DCA
123 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
125 static struct notifier_block dca_notifier = {
126 .notifier_call = ixgbe_notify_dca,
132 #ifdef CONFIG_PCI_IOV
133 static unsigned int max_vfs;
134 module_param(max_vfs, uint, 0);
135 MODULE_PARM_DESC(max_vfs,
136 "Maximum number of virtual functions to allocate per physical function - default is zero and maximum value is 63. (Deprecated)");
137 #endif /* CONFIG_PCI_IOV */
139 static unsigned int allow_unsupported_sfp;
140 module_param(allow_unsupported_sfp, uint, 0);
141 MODULE_PARM_DESC(allow_unsupported_sfp,
142 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
144 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
145 static int debug = -1;
146 module_param(debug, int, 0);
147 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
149 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
150 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
151 MODULE_LICENSE("GPL");
152 MODULE_VERSION(DRV_VERSION);
154 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev);
156 static int ixgbe_read_pci_cfg_word_parent(struct ixgbe_adapter *adapter,
159 struct pci_dev *parent_dev;
160 struct pci_bus *parent_bus;
162 parent_bus = adapter->pdev->bus->parent;
166 parent_dev = parent_bus->self;
170 if (!pci_is_pcie(parent_dev))
173 pcie_capability_read_word(parent_dev, reg, value);
174 if (*value == IXGBE_FAILED_READ_CFG_WORD &&
175 ixgbe_check_cfg_remove(&adapter->hw, parent_dev))
180 static s32 ixgbe_get_parent_bus_info(struct ixgbe_adapter *adapter)
182 struct ixgbe_hw *hw = &adapter->hw;
186 hw->bus.type = ixgbe_bus_type_pci_express;
188 /* Get the negotiated link width and speed from PCI config space of the
189 * parent, as this device is behind a switch
191 err = ixgbe_read_pci_cfg_word_parent(adapter, 18, &link_status);
193 /* assume caller will handle error case */
197 hw->bus.width = ixgbe_convert_bus_width(link_status);
198 hw->bus.speed = ixgbe_convert_bus_speed(link_status);
204 * ixgbe_check_from_parent - Determine whether PCIe info should come from parent
205 * @hw: hw specific details
207 * This function is used by probe to determine whether a device's PCI-Express
208 * bandwidth details should be gathered from the parent bus instead of from the
209 * device. Used to ensure that various locations all have the correct device ID
212 static inline bool ixgbe_pcie_from_parent(struct ixgbe_hw *hw)
214 switch (hw->device_id) {
215 case IXGBE_DEV_ID_82599_SFP_SF_QP:
216 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
223 static void ixgbe_check_minimum_link(struct ixgbe_adapter *adapter,
227 enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
228 enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
229 struct pci_dev *pdev;
231 /* determine whether to use the the parent device
233 if (ixgbe_pcie_from_parent(&adapter->hw))
234 pdev = adapter->pdev->bus->parent->self;
236 pdev = adapter->pdev;
238 if (pcie_get_minimum_link(pdev, &speed, &width) ||
239 speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
240 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
245 case PCIE_SPEED_2_5GT:
246 /* 8b/10b encoding reduces max throughput by 20% */
249 case PCIE_SPEED_5_0GT:
250 /* 8b/10b encoding reduces max throughput by 20% */
253 case PCIE_SPEED_8_0GT:
254 /* 128b/130b encoding reduces throughput by less than 2% */
258 e_dev_warn("Unable to determine PCI Express bandwidth.\n");
262 e_dev_info("PCI Express bandwidth of %dGT/s available\n",
264 e_dev_info("(Speed:%s, Width: x%d, Encoding Loss:%s)\n",
265 (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
266 speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
267 speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
270 (speed == PCIE_SPEED_2_5GT ? "20%" :
271 speed == PCIE_SPEED_5_0GT ? "20%" :
272 speed == PCIE_SPEED_8_0GT ? "<2%" :
275 if (max_gts < expected_gts) {
276 e_dev_warn("This is not sufficient for optimal performance of this card.\n");
277 e_dev_warn("For optimal performance, at least %dGT/s of bandwidth is required.\n",
279 e_dev_warn("A slot with more lanes and/or higher speed is suggested.\n");
283 static void ixgbe_service_event_schedule(struct ixgbe_adapter *adapter)
285 if (!test_bit(__IXGBE_DOWN, &adapter->state) &&
286 !test_bit(__IXGBE_REMOVING, &adapter->state) &&
287 !test_and_set_bit(__IXGBE_SERVICE_SCHED, &adapter->state))
288 schedule_work(&adapter->service_task);
291 static void ixgbe_remove_adapter(struct ixgbe_hw *hw)
293 struct ixgbe_adapter *adapter = hw->back;
298 e_dev_err("Adapter removed\n");
299 ixgbe_service_event_schedule(adapter);
302 void ixgbe_check_remove(struct ixgbe_hw *hw, u32 reg)
306 /* The following check not only optimizes a bit by not
307 * performing a read on the status register when the
308 * register just read was a status register read that
309 * returned IXGBE_FAILED_READ_REG. It also blocks any
310 * potential recursion.
312 if (reg == IXGBE_STATUS) {
313 ixgbe_remove_adapter(hw);
316 value = ixgbe_read_reg(hw, IXGBE_STATUS);
317 if (value == IXGBE_FAILED_READ_REG)
318 ixgbe_remove_adapter(hw);
321 static bool ixgbe_check_cfg_remove(struct ixgbe_hw *hw, struct pci_dev *pdev)
325 pci_read_config_word(pdev, PCI_VENDOR_ID, &value);
326 if (value == IXGBE_FAILED_READ_CFG_WORD) {
327 ixgbe_remove_adapter(hw);
333 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
335 struct ixgbe_adapter *adapter = hw->back;
338 if (ixgbe_removed(hw->hw_addr))
339 return IXGBE_FAILED_READ_CFG_WORD;
340 pci_read_config_word(adapter->pdev, reg, &value);
341 if (value == IXGBE_FAILED_READ_CFG_WORD &&
342 ixgbe_check_cfg_remove(hw, adapter->pdev))
343 return IXGBE_FAILED_READ_CFG_WORD;
347 #ifdef CONFIG_PCI_IOV
348 static u32 ixgbe_read_pci_cfg_dword(struct ixgbe_hw *hw, u32 reg)
350 struct ixgbe_adapter *adapter = hw->back;
353 if (ixgbe_removed(hw->hw_addr))
354 return IXGBE_FAILED_READ_CFG_DWORD;
355 pci_read_config_dword(adapter->pdev, reg, &value);
356 if (value == IXGBE_FAILED_READ_CFG_DWORD &&
357 ixgbe_check_cfg_remove(hw, adapter->pdev))
358 return IXGBE_FAILED_READ_CFG_DWORD;
361 #endif /* CONFIG_PCI_IOV */
363 static void ixgbe_service_event_complete(struct ixgbe_adapter *adapter)
365 BUG_ON(!test_bit(__IXGBE_SERVICE_SCHED, &adapter->state));
367 /* flush memory to make sure state is correct before next watchdog */
368 smp_mb__before_clear_bit();
369 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
372 struct ixgbe_reg_info {
377 static const struct ixgbe_reg_info ixgbe_reg_info_tbl[] = {
379 /* General Registers */
380 {IXGBE_CTRL, "CTRL"},
381 {IXGBE_STATUS, "STATUS"},
382 {IXGBE_CTRL_EXT, "CTRL_EXT"},
384 /* Interrupt Registers */
385 {IXGBE_EICR, "EICR"},
388 {IXGBE_SRRCTL(0), "SRRCTL"},
389 {IXGBE_DCA_RXCTRL(0), "DRXCTL"},
390 {IXGBE_RDLEN(0), "RDLEN"},
391 {IXGBE_RDH(0), "RDH"},
392 {IXGBE_RDT(0), "RDT"},
393 {IXGBE_RXDCTL(0), "RXDCTL"},
394 {IXGBE_RDBAL(0), "RDBAL"},
395 {IXGBE_RDBAH(0), "RDBAH"},
398 {IXGBE_TDBAL(0), "TDBAL"},
399 {IXGBE_TDBAH(0), "TDBAH"},
400 {IXGBE_TDLEN(0), "TDLEN"},
401 {IXGBE_TDH(0), "TDH"},
402 {IXGBE_TDT(0), "TDT"},
403 {IXGBE_TXDCTL(0), "TXDCTL"},
405 /* List Terminator */
411 * ixgbe_regdump - register printout routine
413 static void ixgbe_regdump(struct ixgbe_hw *hw, struct ixgbe_reg_info *reginfo)
419 switch (reginfo->ofs) {
420 case IXGBE_SRRCTL(0):
421 for (i = 0; i < 64; i++)
422 regs[i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
424 case IXGBE_DCA_RXCTRL(0):
425 for (i = 0; i < 64; i++)
426 regs[i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
429 for (i = 0; i < 64; i++)
430 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
433 for (i = 0; i < 64; i++)
434 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
437 for (i = 0; i < 64; i++)
438 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
440 case IXGBE_RXDCTL(0):
441 for (i = 0; i < 64; i++)
442 regs[i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
445 for (i = 0; i < 64; i++)
446 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
449 for (i = 0; i < 64; i++)
450 regs[i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
453 for (i = 0; i < 64; i++)
454 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
457 for (i = 0; i < 64; i++)
458 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
461 for (i = 0; i < 64; i++)
462 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
465 for (i = 0; i < 64; i++)
466 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
469 for (i = 0; i < 64; i++)
470 regs[i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
472 case IXGBE_TXDCTL(0):
473 for (i = 0; i < 64; i++)
474 regs[i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
477 pr_info("%-15s %08x\n", reginfo->name,
478 IXGBE_READ_REG(hw, reginfo->ofs));
482 for (i = 0; i < 8; i++) {
483 snprintf(rname, 16, "%s[%d-%d]", reginfo->name, i*8, i*8+7);
484 pr_err("%-15s", rname);
485 for (j = 0; j < 8; j++)
486 pr_cont(" %08x", regs[i*8+j]);
493 * ixgbe_dump - Print registers, tx-rings and rx-rings
495 static void ixgbe_dump(struct ixgbe_adapter *adapter)
497 struct net_device *netdev = adapter->netdev;
498 struct ixgbe_hw *hw = &adapter->hw;
499 struct ixgbe_reg_info *reginfo;
501 struct ixgbe_ring *tx_ring;
502 struct ixgbe_tx_buffer *tx_buffer;
503 union ixgbe_adv_tx_desc *tx_desc;
504 struct my_u0 { u64 a; u64 b; } *u0;
505 struct ixgbe_ring *rx_ring;
506 union ixgbe_adv_rx_desc *rx_desc;
507 struct ixgbe_rx_buffer *rx_buffer_info;
511 if (!netif_msg_hw(adapter))
514 /* Print netdevice Info */
516 dev_info(&adapter->pdev->dev, "Net device Info\n");
517 pr_info("Device Name state "
518 "trans_start last_rx\n");
519 pr_info("%-15s %016lX %016lX %016lX\n",
526 /* Print Registers */
527 dev_info(&adapter->pdev->dev, "Register Dump\n");
528 pr_info(" Register Name Value\n");
529 for (reginfo = (struct ixgbe_reg_info *)ixgbe_reg_info_tbl;
530 reginfo->name; reginfo++) {
531 ixgbe_regdump(hw, reginfo);
534 /* Print TX Ring Summary */
535 if (!netdev || !netif_running(netdev))
538 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
539 pr_info(" %s %s %s %s\n",
540 "Queue [NTU] [NTC] [bi(ntc)->dma ]",
541 "leng", "ntw", "timestamp");
542 for (n = 0; n < adapter->num_tx_queues; n++) {
543 tx_ring = adapter->tx_ring[n];
544 tx_buffer = &tx_ring->tx_buffer_info[tx_ring->next_to_clean];
545 pr_info(" %5d %5X %5X %016llX %08X %p %016llX\n",
546 n, tx_ring->next_to_use, tx_ring->next_to_clean,
547 (u64)dma_unmap_addr(tx_buffer, dma),
548 dma_unmap_len(tx_buffer, len),
549 tx_buffer->next_to_watch,
550 (u64)tx_buffer->time_stamp);
554 if (!netif_msg_tx_done(adapter))
555 goto rx_ring_summary;
557 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
559 /* Transmit Descriptor Formats
561 * 82598 Advanced Transmit Descriptor
562 * +--------------------------------------------------------------+
563 * 0 | Buffer Address [63:0] |
564 * +--------------------------------------------------------------+
565 * 8 | PAYLEN | POPTS | IDX | STA | DCMD |DTYP | RSV | DTALEN |
566 * +--------------------------------------------------------------+
567 * 63 46 45 40 39 36 35 32 31 24 23 20 19 0
569 * 82598 Advanced Transmit Descriptor (Write-Back Format)
570 * +--------------------------------------------------------------+
572 * +--------------------------------------------------------------+
573 * 8 | RSV | STA | NXTSEQ |
574 * +--------------------------------------------------------------+
577 * 82599+ Advanced Transmit Descriptor
578 * +--------------------------------------------------------------+
579 * 0 | Buffer Address [63:0] |
580 * +--------------------------------------------------------------+
581 * 8 |PAYLEN |POPTS|CC|IDX |STA |DCMD |DTYP |MAC |RSV |DTALEN |
582 * +--------------------------------------------------------------+
583 * 63 46 45 40 39 38 36 35 32 31 24 23 20 19 18 17 16 15 0
585 * 82599+ Advanced Transmit Descriptor (Write-Back Format)
586 * +--------------------------------------------------------------+
588 * +--------------------------------------------------------------+
589 * 8 | RSV | STA | RSV |
590 * +--------------------------------------------------------------+
594 for (n = 0; n < adapter->num_tx_queues; n++) {
595 tx_ring = adapter->tx_ring[n];
596 pr_info("------------------------------------\n");
597 pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
598 pr_info("------------------------------------\n");
599 pr_info("%s%s %s %s %s %s\n",
600 "T [desc] [address 63:0 ] ",
601 "[PlPOIdStDDt Ln] [bi->dma ] ",
602 "leng", "ntw", "timestamp", "bi->skb");
604 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
605 tx_desc = IXGBE_TX_DESC(tx_ring, i);
606 tx_buffer = &tx_ring->tx_buffer_info[i];
607 u0 = (struct my_u0 *)tx_desc;
608 if (dma_unmap_len(tx_buffer, len) > 0) {
609 pr_info("T [0x%03X] %016llX %016llX %016llX %08X %p %016llX %p",
613 (u64)dma_unmap_addr(tx_buffer, dma),
614 dma_unmap_len(tx_buffer, len),
615 tx_buffer->next_to_watch,
616 (u64)tx_buffer->time_stamp,
618 if (i == tx_ring->next_to_use &&
619 i == tx_ring->next_to_clean)
621 else if (i == tx_ring->next_to_use)
623 else if (i == tx_ring->next_to_clean)
628 if (netif_msg_pktdata(adapter) &&
630 print_hex_dump(KERN_INFO, "",
631 DUMP_PREFIX_ADDRESS, 16, 1,
632 tx_buffer->skb->data,
633 dma_unmap_len(tx_buffer, len),
639 /* Print RX Rings Summary */
641 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
642 pr_info("Queue [NTU] [NTC]\n");
643 for (n = 0; n < adapter->num_rx_queues; n++) {
644 rx_ring = adapter->rx_ring[n];
645 pr_info("%5d %5X %5X\n",
646 n, rx_ring->next_to_use, rx_ring->next_to_clean);
650 if (!netif_msg_rx_status(adapter))
653 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
655 /* Receive Descriptor Formats
657 * 82598 Advanced Receive Descriptor (Read) Format
659 * +-----------------------------------------------------+
660 * 0 | Packet Buffer Address [63:1] |A0/NSE|
661 * +----------------------------------------------+------+
662 * 8 | Header Buffer Address [63:1] | DD |
663 * +-----------------------------------------------------+
666 * 82598 Advanced Receive Descriptor (Write-Back) Format
668 * 63 48 47 32 31 30 21 20 16 15 4 3 0
669 * +------------------------------------------------------+
670 * 0 | RSS Hash / |SPH| HDR_LEN | RSV |Packet| RSS |
671 * | Packet | IP | | | | Type | Type |
672 * | Checksum | Ident | | | | | |
673 * +------------------------------------------------------+
674 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
675 * +------------------------------------------------------+
676 * 63 48 47 32 31 20 19 0
678 * 82599+ Advanced Receive Descriptor (Read) Format
680 * +-----------------------------------------------------+
681 * 0 | Packet Buffer Address [63:1] |A0/NSE|
682 * +----------------------------------------------+------+
683 * 8 | Header Buffer Address [63:1] | DD |
684 * +-----------------------------------------------------+
687 * 82599+ Advanced Receive Descriptor (Write-Back) Format
689 * 63 48 47 32 31 30 21 20 17 16 4 3 0
690 * +------------------------------------------------------+
691 * 0 |RSS / Frag Checksum|SPH| HDR_LEN |RSC- |Packet| RSS |
692 * |/ RTT / PCoE_PARAM | | | CNT | Type | Type |
693 * |/ Flow Dir Flt ID | | | | | |
694 * +------------------------------------------------------+
695 * 8 | VLAN Tag | Length |Extended Error| Xtnd Status/NEXTP |
696 * +------------------------------------------------------+
697 * 63 48 47 32 31 20 19 0
700 for (n = 0; n < adapter->num_rx_queues; n++) {
701 rx_ring = adapter->rx_ring[n];
702 pr_info("------------------------------------\n");
703 pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
704 pr_info("------------------------------------\n");
706 "R [desc] [ PktBuf A0] ",
707 "[ HeadBuf DD] [bi->dma ] [bi->skb ] ",
708 "<-- Adv Rx Read format\n");
710 "RWB[desc] [PcsmIpSHl PtRs] ",
711 "[vl er S cks ln] ---------------- [bi->skb ] ",
712 "<-- Adv Rx Write-Back format\n");
714 for (i = 0; i < rx_ring->count; i++) {
715 rx_buffer_info = &rx_ring->rx_buffer_info[i];
716 rx_desc = IXGBE_RX_DESC(rx_ring, i);
717 u0 = (struct my_u0 *)rx_desc;
718 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
719 if (staterr & IXGBE_RXD_STAT_DD) {
720 /* Descriptor Done */
721 pr_info("RWB[0x%03X] %016llX "
722 "%016llX ---------------- %p", i,
725 rx_buffer_info->skb);
727 pr_info("R [0x%03X] %016llX "
728 "%016llX %016llX %p", i,
731 (u64)rx_buffer_info->dma,
732 rx_buffer_info->skb);
734 if (netif_msg_pktdata(adapter) &&
735 rx_buffer_info->dma) {
736 print_hex_dump(KERN_INFO, "",
737 DUMP_PREFIX_ADDRESS, 16, 1,
738 page_address(rx_buffer_info->page) +
739 rx_buffer_info->page_offset,
740 ixgbe_rx_bufsz(rx_ring), true);
744 if (i == rx_ring->next_to_use)
746 else if (i == rx_ring->next_to_clean)
758 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
762 /* Let firmware take over control of h/w */
763 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
764 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
765 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
768 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
772 /* Let firmware know the driver has taken over */
773 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
774 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
775 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
779 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
780 * @adapter: pointer to adapter struct
781 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
782 * @queue: queue to map the corresponding interrupt to
783 * @msix_vector: the vector to map to the corresponding queue
786 static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, s8 direction,
787 u8 queue, u8 msix_vector)
790 struct ixgbe_hw *hw = &adapter->hw;
791 switch (hw->mac.type) {
792 case ixgbe_mac_82598EB:
793 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
796 index = (((direction * 64) + queue) >> 2) & 0x1F;
797 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(index));
798 ivar &= ~(0xFF << (8 * (queue & 0x3)));
799 ivar |= (msix_vector << (8 * (queue & 0x3)));
800 IXGBE_WRITE_REG(hw, IXGBE_IVAR(index), ivar);
802 case ixgbe_mac_82599EB:
804 if (direction == -1) {
806 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
807 index = ((queue & 1) * 8);
808 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR_MISC);
809 ivar &= ~(0xFF << index);
810 ivar |= (msix_vector << index);
811 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR_MISC, ivar);
814 /* tx or rx causes */
815 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
816 index = ((16 * (queue & 1)) + (8 * direction));
817 ivar = IXGBE_READ_REG(hw, IXGBE_IVAR(queue >> 1));
818 ivar &= ~(0xFF << index);
819 ivar |= (msix_vector << index);
820 IXGBE_WRITE_REG(hw, IXGBE_IVAR(queue >> 1), ivar);
828 static inline void ixgbe_irq_rearm_queues(struct ixgbe_adapter *adapter,
833 switch (adapter->hw.mac.type) {
834 case ixgbe_mac_82598EB:
835 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
836 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
838 case ixgbe_mac_82599EB:
840 mask = (qmask & 0xFFFFFFFF);
841 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(0), mask);
842 mask = (qmask >> 32);
843 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS_EX(1), mask);
850 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *ring,
851 struct ixgbe_tx_buffer *tx_buffer)
853 if (tx_buffer->skb) {
854 dev_kfree_skb_any(tx_buffer->skb);
855 if (dma_unmap_len(tx_buffer, len))
856 dma_unmap_single(ring->dev,
857 dma_unmap_addr(tx_buffer, dma),
858 dma_unmap_len(tx_buffer, len),
860 } else if (dma_unmap_len(tx_buffer, len)) {
861 dma_unmap_page(ring->dev,
862 dma_unmap_addr(tx_buffer, dma),
863 dma_unmap_len(tx_buffer, len),
866 tx_buffer->next_to_watch = NULL;
867 tx_buffer->skb = NULL;
868 dma_unmap_len_set(tx_buffer, len, 0);
869 /* tx_buffer must be completely set up in the transmit path */
872 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
874 struct ixgbe_hw *hw = &adapter->hw;
875 struct ixgbe_hw_stats *hwstats = &adapter->stats;
879 if ((hw->fc.current_mode != ixgbe_fc_full) &&
880 (hw->fc.current_mode != ixgbe_fc_rx_pause))
883 switch (hw->mac.type) {
884 case ixgbe_mac_82598EB:
885 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
888 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
890 hwstats->lxoffrxc += data;
892 /* refill credits (no tx hang) if we received xoff */
896 for (i = 0; i < adapter->num_tx_queues; i++)
897 clear_bit(__IXGBE_HANG_CHECK_ARMED,
898 &adapter->tx_ring[i]->state);
901 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
903 struct ixgbe_hw *hw = &adapter->hw;
904 struct ixgbe_hw_stats *hwstats = &adapter->stats;
908 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
910 if (adapter->ixgbe_ieee_pfc)
911 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
913 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
914 ixgbe_update_xoff_rx_lfc(adapter);
918 /* update stats for each tc, only valid with PFC enabled */
919 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
922 switch (hw->mac.type) {
923 case ixgbe_mac_82598EB:
924 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
927 pxoffrxc = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
929 hwstats->pxoffrxc[i] += pxoffrxc;
930 /* Get the TC for given UP */
931 tc = netdev_get_prio_tc_map(adapter->netdev, i);
932 xoff[tc] += pxoffrxc;
935 /* disarm tx queues that have received xoff frames */
936 for (i = 0; i < adapter->num_tx_queues; i++) {
937 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
939 tc = tx_ring->dcb_tc;
941 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
945 static u64 ixgbe_get_tx_completed(struct ixgbe_ring *ring)
947 return ring->stats.packets;
950 static u64 ixgbe_get_tx_pending(struct ixgbe_ring *ring)
952 struct ixgbe_adapter *adapter;
956 if (ring->l2_accel_priv)
957 adapter = ring->l2_accel_priv->real_adapter;
959 adapter = netdev_priv(ring->netdev);
962 head = IXGBE_READ_REG(hw, IXGBE_TDH(ring->reg_idx));
963 tail = IXGBE_READ_REG(hw, IXGBE_TDT(ring->reg_idx));
966 return (head < tail) ?
967 tail - head : (tail + ring->count - head);
972 static inline bool ixgbe_check_tx_hang(struct ixgbe_ring *tx_ring)
974 u32 tx_done = ixgbe_get_tx_completed(tx_ring);
975 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
976 u32 tx_pending = ixgbe_get_tx_pending(tx_ring);
979 clear_check_for_tx_hang(tx_ring);
982 * Check for a hung queue, but be thorough. This verifies
983 * that a transmit has been completed since the previous
984 * check AND there is at least one packet pending. The
985 * ARMED bit is set to indicate a potential hang. The
986 * bit is cleared if a pause frame is received to remove
987 * false hang detection due to PFC or 802.3x frames. By
988 * requiring this to fail twice we avoid races with
989 * pfc clearing the ARMED bit and conditions where we
990 * run the check_tx_hang logic with a transmit completion
991 * pending but without time to complete it yet.
993 if ((tx_done_old == tx_done) && tx_pending) {
994 /* make sure it is true for two checks in a row */
995 ret = test_and_set_bit(__IXGBE_HANG_CHECK_ARMED,
998 /* update completed stats and continue */
999 tx_ring->tx_stats.tx_done_old = tx_done;
1000 /* reset the countdown */
1001 clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
1008 * ixgbe_tx_timeout_reset - initiate reset due to Tx timeout
1009 * @adapter: driver private struct
1011 static void ixgbe_tx_timeout_reset(struct ixgbe_adapter *adapter)
1014 /* Do the reset outside of interrupt context */
1015 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
1016 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
1017 e_warn(drv, "initiating reset due to tx timeout\n");
1018 ixgbe_service_event_schedule(adapter);
1023 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
1024 * @q_vector: structure containing interrupt and ring information
1025 * @tx_ring: tx ring to clean
1027 static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
1028 struct ixgbe_ring *tx_ring)
1030 struct ixgbe_adapter *adapter = q_vector->adapter;
1031 struct ixgbe_tx_buffer *tx_buffer;
1032 union ixgbe_adv_tx_desc *tx_desc;
1033 unsigned int total_bytes = 0, total_packets = 0;
1034 unsigned int budget = q_vector->tx.work_limit;
1035 unsigned int i = tx_ring->next_to_clean;
1037 if (test_bit(__IXGBE_DOWN, &adapter->state))
1040 tx_buffer = &tx_ring->tx_buffer_info[i];
1041 tx_desc = IXGBE_TX_DESC(tx_ring, i);
1042 i -= tx_ring->count;
1045 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
1047 /* if next_to_watch is not set then there is no work pending */
1051 /* prevent any other reads prior to eop_desc */
1052 read_barrier_depends();
1054 /* if DD is not set pending work has not been completed */
1055 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
1058 /* clear next_to_watch to prevent false hangs */
1059 tx_buffer->next_to_watch = NULL;
1061 /* update the statistics for this packet */
1062 total_bytes += tx_buffer->bytecount;
1063 total_packets += tx_buffer->gso_segs;
1066 dev_kfree_skb_any(tx_buffer->skb);
1068 /* unmap skb header data */
1069 dma_unmap_single(tx_ring->dev,
1070 dma_unmap_addr(tx_buffer, dma),
1071 dma_unmap_len(tx_buffer, len),
1074 /* clear tx_buffer data */
1075 tx_buffer->skb = NULL;
1076 dma_unmap_len_set(tx_buffer, len, 0);
1078 /* unmap remaining buffers */
1079 while (tx_desc != eop_desc) {
1084 i -= tx_ring->count;
1085 tx_buffer = tx_ring->tx_buffer_info;
1086 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1089 /* unmap any remaining paged data */
1090 if (dma_unmap_len(tx_buffer, len)) {
1091 dma_unmap_page(tx_ring->dev,
1092 dma_unmap_addr(tx_buffer, dma),
1093 dma_unmap_len(tx_buffer, len),
1095 dma_unmap_len_set(tx_buffer, len, 0);
1099 /* move us one more past the eop_desc for start of next pkt */
1104 i -= tx_ring->count;
1105 tx_buffer = tx_ring->tx_buffer_info;
1106 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
1109 /* issue prefetch for next Tx descriptor */
1112 /* update budget accounting */
1114 } while (likely(budget));
1116 i += tx_ring->count;
1117 tx_ring->next_to_clean = i;
1118 u64_stats_update_begin(&tx_ring->syncp);
1119 tx_ring->stats.bytes += total_bytes;
1120 tx_ring->stats.packets += total_packets;
1121 u64_stats_update_end(&tx_ring->syncp);
1122 q_vector->tx.total_bytes += total_bytes;
1123 q_vector->tx.total_packets += total_packets;
1125 if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
1126 /* schedule immediate reset if we believe we hung */
1127 struct ixgbe_hw *hw = &adapter->hw;
1128 e_err(drv, "Detected Tx Unit Hang\n"
1130 " TDH, TDT <%x>, <%x>\n"
1131 " next_to_use <%x>\n"
1132 " next_to_clean <%x>\n"
1133 "tx_buffer_info[next_to_clean]\n"
1134 " time_stamp <%lx>\n"
1136 tx_ring->queue_index,
1137 IXGBE_READ_REG(hw, IXGBE_TDH(tx_ring->reg_idx)),
1138 IXGBE_READ_REG(hw, IXGBE_TDT(tx_ring->reg_idx)),
1139 tx_ring->next_to_use, i,
1140 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
1142 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
1145 "tx hang %d detected on queue %d, resetting adapter\n",
1146 adapter->tx_timeout_count + 1, tx_ring->queue_index);
1148 /* schedule immediate reset if we believe we hung */
1149 ixgbe_tx_timeout_reset(adapter);
1151 /* the adapter is about to reset, no point in enabling stuff */
1155 netdev_tx_completed_queue(txring_txq(tx_ring),
1156 total_packets, total_bytes);
1158 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
1159 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
1160 (ixgbe_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
1161 /* Make sure that anybody stopping the queue after this
1162 * sees the new next_to_clean.
1165 if (__netif_subqueue_stopped(tx_ring->netdev,
1166 tx_ring->queue_index)
1167 && !test_bit(__IXGBE_DOWN, &adapter->state)) {
1168 netif_wake_subqueue(tx_ring->netdev,
1169 tx_ring->queue_index);
1170 ++tx_ring->tx_stats.restart_queue;
1177 #ifdef CONFIG_IXGBE_DCA
1178 static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
1179 struct ixgbe_ring *tx_ring,
1182 struct ixgbe_hw *hw = &adapter->hw;
1183 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
1186 switch (hw->mac.type) {
1187 case ixgbe_mac_82598EB:
1188 reg_offset = IXGBE_DCA_TXCTRL(tx_ring->reg_idx);
1190 case ixgbe_mac_82599EB:
1191 case ixgbe_mac_X540:
1192 reg_offset = IXGBE_DCA_TXCTRL_82599(tx_ring->reg_idx);
1193 txctrl <<= IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599;
1196 /* for unknown hardware do not write register */
1201 * We can enable relaxed ordering for reads, but not writes when
1202 * DCA is enabled. This is due to a known issue in some chipsets
1203 * which will cause the DCA tag to be cleared.
1205 txctrl |= IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1206 IXGBE_DCA_TXCTRL_DATA_RRO_EN |
1207 IXGBE_DCA_TXCTRL_DESC_DCA_EN;
1209 IXGBE_WRITE_REG(hw, reg_offset, txctrl);
1212 static void ixgbe_update_rx_dca(struct ixgbe_adapter *adapter,
1213 struct ixgbe_ring *rx_ring,
1216 struct ixgbe_hw *hw = &adapter->hw;
1217 u32 rxctrl = dca3_get_tag(rx_ring->dev, cpu);
1218 u8 reg_idx = rx_ring->reg_idx;
1221 switch (hw->mac.type) {
1222 case ixgbe_mac_82599EB:
1223 case ixgbe_mac_X540:
1224 rxctrl <<= IXGBE_DCA_RXCTRL_CPUID_SHIFT_82599;
1231 * We can enable relaxed ordering for reads, but not writes when
1232 * DCA is enabled. This is due to a known issue in some chipsets
1233 * which will cause the DCA tag to be cleared.
1235 rxctrl |= IXGBE_DCA_RXCTRL_DESC_RRO_EN |
1236 IXGBE_DCA_RXCTRL_DESC_DCA_EN;
1238 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(reg_idx), rxctrl);
1241 static void ixgbe_update_dca(struct ixgbe_q_vector *q_vector)
1243 struct ixgbe_adapter *adapter = q_vector->adapter;
1244 struct ixgbe_ring *ring;
1245 int cpu = get_cpu();
1247 if (q_vector->cpu == cpu)
1250 ixgbe_for_each_ring(ring, q_vector->tx)
1251 ixgbe_update_tx_dca(adapter, ring, cpu);
1253 ixgbe_for_each_ring(ring, q_vector->rx)
1254 ixgbe_update_rx_dca(adapter, ring, cpu);
1256 q_vector->cpu = cpu;
1261 static void ixgbe_setup_dca(struct ixgbe_adapter *adapter)
1265 if (!(adapter->flags & IXGBE_FLAG_DCA_ENABLED))
1268 /* always use CB2 mode, difference is masked in the CB driver */
1269 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 2);
1271 for (i = 0; i < adapter->num_q_vectors; i++) {
1272 adapter->q_vector[i]->cpu = -1;
1273 ixgbe_update_dca(adapter->q_vector[i]);
1277 static int __ixgbe_notify_dca(struct device *dev, void *data)
1279 struct ixgbe_adapter *adapter = dev_get_drvdata(dev);
1280 unsigned long event = *(unsigned long *)data;
1282 if (!(adapter->flags & IXGBE_FLAG_DCA_CAPABLE))
1286 case DCA_PROVIDER_ADD:
1287 /* if we're already enabled, don't do it again */
1288 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
1290 if (dca_add_requester(dev) == 0) {
1291 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
1292 ixgbe_setup_dca(adapter);
1295 /* Fall Through since DCA is disabled. */
1296 case DCA_PROVIDER_REMOVE:
1297 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
1298 dca_remove_requester(dev);
1299 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
1300 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
1308 #endif /* CONFIG_IXGBE_DCA */
1309 static inline void ixgbe_rx_hash(struct ixgbe_ring *ring,
1310 union ixgbe_adv_rx_desc *rx_desc,
1311 struct sk_buff *skb)
1313 if (ring->netdev->features & NETIF_F_RXHASH)
1314 skb->rxhash = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
1319 * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
1320 * @ring: structure containing ring specific data
1321 * @rx_desc: advanced rx descriptor
1323 * Returns : true if it is FCoE pkt
1325 static inline bool ixgbe_rx_is_fcoe(struct ixgbe_ring *ring,
1326 union ixgbe_adv_rx_desc *rx_desc)
1328 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1330 return test_bit(__IXGBE_RX_FCOE, &ring->state) &&
1331 ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_ETQF_MASK)) ==
1332 (cpu_to_le16(IXGBE_ETQF_FILTER_FCOE <<
1333 IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT)));
1336 #endif /* IXGBE_FCOE */
1338 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
1339 * @ring: structure containing ring specific data
1340 * @rx_desc: current Rx descriptor being processed
1341 * @skb: skb currently being received and modified
1343 static inline void ixgbe_rx_checksum(struct ixgbe_ring *ring,
1344 union ixgbe_adv_rx_desc *rx_desc,
1345 struct sk_buff *skb)
1347 skb_checksum_none_assert(skb);
1349 /* Rx csum disabled */
1350 if (!(ring->netdev->features & NETIF_F_RXCSUM))
1353 /* if IP and error */
1354 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
1355 ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
1356 ring->rx_stats.csum_err++;
1360 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
1363 if (ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
1364 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
1367 * 82599 errata, UDP frames with a 0 checksum can be marked as
1370 if ((pkt_info & cpu_to_le16(IXGBE_RXDADV_PKTTYPE_UDP)) &&
1371 test_bit(__IXGBE_RX_CSUM_UDP_ZERO_ERR, &ring->state))
1374 ring->rx_stats.csum_err++;
1378 /* It must be a TCP or UDP packet with a valid checksum */
1379 skb->ip_summed = CHECKSUM_UNNECESSARY;
1382 static inline void ixgbe_release_rx_desc(struct ixgbe_ring *rx_ring, u32 val)
1384 rx_ring->next_to_use = val;
1386 /* update next to alloc since we have filled the ring */
1387 rx_ring->next_to_alloc = val;
1389 * Force memory writes to complete before letting h/w
1390 * know there are new descriptors to fetch. (Only
1391 * applicable for weak-ordered memory model archs,
1395 ixgbe_write_tail(rx_ring, val);
1398 static bool ixgbe_alloc_mapped_page(struct ixgbe_ring *rx_ring,
1399 struct ixgbe_rx_buffer *bi)
1401 struct page *page = bi->page;
1402 dma_addr_t dma = bi->dma;
1404 /* since we are recycling buffers we should seldom need to alloc */
1408 /* alloc new page for storage */
1409 if (likely(!page)) {
1410 page = __skb_alloc_pages(GFP_ATOMIC | __GFP_COLD | __GFP_COMP,
1411 bi->skb, ixgbe_rx_pg_order(rx_ring));
1412 if (unlikely(!page)) {
1413 rx_ring->rx_stats.alloc_rx_page_failed++;
1419 /* map page for use */
1420 dma = dma_map_page(rx_ring->dev, page, 0,
1421 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1424 * if mapping failed free memory back to system since
1425 * there isn't much point in holding memory we can't use
1427 if (dma_mapping_error(rx_ring->dev, dma)) {
1428 __free_pages(page, ixgbe_rx_pg_order(rx_ring));
1431 rx_ring->rx_stats.alloc_rx_page_failed++;
1436 bi->page_offset = 0;
1442 * ixgbe_alloc_rx_buffers - Replace used receive buffers
1443 * @rx_ring: ring to place buffers on
1444 * @cleaned_count: number of buffers to replace
1446 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *rx_ring, u16 cleaned_count)
1448 union ixgbe_adv_rx_desc *rx_desc;
1449 struct ixgbe_rx_buffer *bi;
1450 u16 i = rx_ring->next_to_use;
1456 rx_desc = IXGBE_RX_DESC(rx_ring, i);
1457 bi = &rx_ring->rx_buffer_info[i];
1458 i -= rx_ring->count;
1461 if (!ixgbe_alloc_mapped_page(rx_ring, bi))
1465 * Refresh the desc even if buffer_addrs didn't change
1466 * because each write-back erases this info.
1468 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
1474 rx_desc = IXGBE_RX_DESC(rx_ring, 0);
1475 bi = rx_ring->rx_buffer_info;
1476 i -= rx_ring->count;
1479 /* clear the hdr_addr for the next_to_use descriptor */
1480 rx_desc->read.hdr_addr = 0;
1483 } while (cleaned_count);
1485 i += rx_ring->count;
1487 if (rx_ring->next_to_use != i)
1488 ixgbe_release_rx_desc(rx_ring, i);
1492 * ixgbe_get_headlen - determine size of header for RSC/LRO/GRO/FCOE
1493 * @data: pointer to the start of the headers
1494 * @max_len: total length of section to find headers in
1496 * This function is meant to determine the length of headers that will
1497 * be recognized by hardware for LRO, GRO, and RSC offloads. The main
1498 * motivation of doing this is to only perform one pull for IPv4 TCP
1499 * packets so that we can do basic things like calculating the gso_size
1500 * based on the average data per packet.
1502 static unsigned int ixgbe_get_headlen(unsigned char *data,
1503 unsigned int max_len)
1506 unsigned char *network;
1509 struct vlan_hdr *vlan;
1512 struct ipv6hdr *ipv6;
1515 u8 nexthdr = 0; /* default to not TCP */
1518 /* this should never happen, but better safe than sorry */
1519 if (max_len < ETH_HLEN)
1522 /* initialize network frame pointer */
1525 /* set first protocol and move network header forward */
1526 protocol = hdr.eth->h_proto;
1527 hdr.network += ETH_HLEN;
1529 /* handle any vlan tag if present */
1530 if (protocol == __constant_htons(ETH_P_8021Q)) {
1531 if ((hdr.network - data) > (max_len - VLAN_HLEN))
1534 protocol = hdr.vlan->h_vlan_encapsulated_proto;
1535 hdr.network += VLAN_HLEN;
1538 /* handle L3 protocols */
1539 if (protocol == __constant_htons(ETH_P_IP)) {
1540 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
1543 /* access ihl as a u8 to avoid unaligned access on ia64 */
1544 hlen = (hdr.network[0] & 0x0F) << 2;
1546 /* verify hlen meets minimum size requirements */
1547 if (hlen < sizeof(struct iphdr))
1548 return hdr.network - data;
1550 /* record next protocol if header is present */
1551 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
1552 nexthdr = hdr.ipv4->protocol;
1553 } else if (protocol == __constant_htons(ETH_P_IPV6)) {
1554 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
1557 /* record next protocol */
1558 nexthdr = hdr.ipv6->nexthdr;
1559 hlen = sizeof(struct ipv6hdr);
1561 } else if (protocol == __constant_htons(ETH_P_FCOE)) {
1562 if ((hdr.network - data) > (max_len - FCOE_HEADER_LEN))
1564 hlen = FCOE_HEADER_LEN;
1567 return hdr.network - data;
1570 /* relocate pointer to start of L4 header */
1571 hdr.network += hlen;
1573 /* finally sort out TCP/UDP */
1574 if (nexthdr == IPPROTO_TCP) {
1575 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
1578 /* access doff as a u8 to avoid unaligned access on ia64 */
1579 hlen = (hdr.network[12] & 0xF0) >> 2;
1581 /* verify hlen meets minimum size requirements */
1582 if (hlen < sizeof(struct tcphdr))
1583 return hdr.network - data;
1585 hdr.network += hlen;
1586 } else if (nexthdr == IPPROTO_UDP) {
1587 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
1590 hdr.network += sizeof(struct udphdr);
1594 * If everything has gone correctly hdr.network should be the
1595 * data section of the packet and will be the end of the header.
1596 * If not then it probably represents the end of the last recognized
1599 if ((hdr.network - data) < max_len)
1600 return hdr.network - data;
1605 static void ixgbe_set_rsc_gso_size(struct ixgbe_ring *ring,
1606 struct sk_buff *skb)
1608 u16 hdr_len = skb_headlen(skb);
1610 /* set gso_size to avoid messing up TCP MSS */
1611 skb_shinfo(skb)->gso_size = DIV_ROUND_UP((skb->len - hdr_len),
1612 IXGBE_CB(skb)->append_cnt);
1613 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1616 static void ixgbe_update_rsc_stats(struct ixgbe_ring *rx_ring,
1617 struct sk_buff *skb)
1619 /* if append_cnt is 0 then frame is not RSC */
1620 if (!IXGBE_CB(skb)->append_cnt)
1623 rx_ring->rx_stats.rsc_count += IXGBE_CB(skb)->append_cnt;
1624 rx_ring->rx_stats.rsc_flush++;
1626 ixgbe_set_rsc_gso_size(rx_ring, skb);
1628 /* gso_size is computed using append_cnt so always clear it last */
1629 IXGBE_CB(skb)->append_cnt = 0;
1633 * ixgbe_process_skb_fields - Populate skb header fields from Rx descriptor
1634 * @rx_ring: rx descriptor ring packet is being transacted on
1635 * @rx_desc: pointer to the EOP Rx descriptor
1636 * @skb: pointer to current skb being populated
1638 * This function checks the ring, descriptor, and packet information in
1639 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
1640 * other fields within the skb.
1642 static void ixgbe_process_skb_fields(struct ixgbe_ring *rx_ring,
1643 union ixgbe_adv_rx_desc *rx_desc,
1644 struct sk_buff *skb)
1646 struct net_device *dev = rx_ring->netdev;
1648 ixgbe_update_rsc_stats(rx_ring, skb);
1650 ixgbe_rx_hash(rx_ring, rx_desc, skb);
1652 ixgbe_rx_checksum(rx_ring, rx_desc, skb);
1654 ixgbe_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
1656 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1657 ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
1658 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
1659 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
1662 skb_record_rx_queue(skb, rx_ring->queue_index);
1664 skb->protocol = eth_type_trans(skb, dev);
1667 static void ixgbe_rx_skb(struct ixgbe_q_vector *q_vector,
1668 struct sk_buff *skb)
1670 struct ixgbe_adapter *adapter = q_vector->adapter;
1672 if (ixgbe_qv_busy_polling(q_vector))
1673 netif_receive_skb(skb);
1674 else if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL))
1675 napi_gro_receive(&q_vector->napi, skb);
1681 * ixgbe_is_non_eop - process handling of non-EOP buffers
1682 * @rx_ring: Rx ring being processed
1683 * @rx_desc: Rx descriptor for current buffer
1684 * @skb: Current socket buffer containing buffer in progress
1686 * This function updates next to clean. If the buffer is an EOP buffer
1687 * this function exits returning false, otherwise it will place the
1688 * sk_buff in the next buffer to be chained and return true indicating
1689 * that this is in fact a non-EOP buffer.
1691 static bool ixgbe_is_non_eop(struct ixgbe_ring *rx_ring,
1692 union ixgbe_adv_rx_desc *rx_desc,
1693 struct sk_buff *skb)
1695 u32 ntc = rx_ring->next_to_clean + 1;
1697 /* fetch, update, and store next to clean */
1698 ntc = (ntc < rx_ring->count) ? ntc : 0;
1699 rx_ring->next_to_clean = ntc;
1701 prefetch(IXGBE_RX_DESC(rx_ring, ntc));
1703 /* update RSC append count if present */
1704 if (ring_is_rsc_enabled(rx_ring)) {
1705 __le32 rsc_enabled = rx_desc->wb.lower.lo_dword.data &
1706 cpu_to_le32(IXGBE_RXDADV_RSCCNT_MASK);
1708 if (unlikely(rsc_enabled)) {
1709 u32 rsc_cnt = le32_to_cpu(rsc_enabled);
1711 rsc_cnt >>= IXGBE_RXDADV_RSCCNT_SHIFT;
1712 IXGBE_CB(skb)->append_cnt += rsc_cnt - 1;
1714 /* update ntc based on RSC value */
1715 ntc = le32_to_cpu(rx_desc->wb.upper.status_error);
1716 ntc &= IXGBE_RXDADV_NEXTP_MASK;
1717 ntc >>= IXGBE_RXDADV_NEXTP_SHIFT;
1721 /* if we are the last buffer then there is nothing else to do */
1722 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
1725 /* place skb in next buffer to be received */
1726 rx_ring->rx_buffer_info[ntc].skb = skb;
1727 rx_ring->rx_stats.non_eop_descs++;
1733 * ixgbe_pull_tail - ixgbe specific version of skb_pull_tail
1734 * @rx_ring: rx descriptor ring packet is being transacted on
1735 * @skb: pointer to current skb being adjusted
1737 * This function is an ixgbe specific version of __pskb_pull_tail. The
1738 * main difference between this version and the original function is that
1739 * this function can make several assumptions about the state of things
1740 * that allow for significant optimizations versus the standard function.
1741 * As a result we can do things like drop a frag and maintain an accurate
1742 * truesize for the skb.
1744 static void ixgbe_pull_tail(struct ixgbe_ring *rx_ring,
1745 struct sk_buff *skb)
1747 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1749 unsigned int pull_len;
1752 * it is valid to use page_address instead of kmap since we are
1753 * working with pages allocated out of the lomem pool per
1754 * alloc_page(GFP_ATOMIC)
1756 va = skb_frag_address(frag);
1759 * we need the header to contain the greater of either ETH_HLEN or
1760 * 60 bytes if the skb->len is less than 60 for skb_pad.
1762 pull_len = ixgbe_get_headlen(va, IXGBE_RX_HDR_SIZE);
1764 /* align pull length to size of long to optimize memcpy performance */
1765 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
1767 /* update all of the pointers */
1768 skb_frag_size_sub(frag, pull_len);
1769 frag->page_offset += pull_len;
1770 skb->data_len -= pull_len;
1771 skb->tail += pull_len;
1775 * ixgbe_dma_sync_frag - perform DMA sync for first frag of SKB
1776 * @rx_ring: rx descriptor ring packet is being transacted on
1777 * @skb: pointer to current skb being updated
1779 * This function provides a basic DMA sync up for the first fragment of an
1780 * skb. The reason for doing this is that the first fragment cannot be
1781 * unmapped until we have reached the end of packet descriptor for a buffer
1784 static void ixgbe_dma_sync_frag(struct ixgbe_ring *rx_ring,
1785 struct sk_buff *skb)
1787 /* if the page was released unmap it, else just sync our portion */
1788 if (unlikely(IXGBE_CB(skb)->page_released)) {
1789 dma_unmap_page(rx_ring->dev, IXGBE_CB(skb)->dma,
1790 ixgbe_rx_pg_size(rx_ring), DMA_FROM_DEVICE);
1791 IXGBE_CB(skb)->page_released = false;
1793 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
1795 dma_sync_single_range_for_cpu(rx_ring->dev,
1798 ixgbe_rx_bufsz(rx_ring),
1801 IXGBE_CB(skb)->dma = 0;
1805 * ixgbe_cleanup_headers - Correct corrupted or empty headers
1806 * @rx_ring: rx descriptor ring packet is being transacted on
1807 * @rx_desc: pointer to the EOP Rx descriptor
1808 * @skb: pointer to current skb being fixed
1810 * Check for corrupted packet headers caused by senders on the local L2
1811 * embedded NIC switch not setting up their Tx Descriptors right. These
1812 * should be very rare.
1814 * Also address the case where we are pulling data in on pages only
1815 * and as such no data is present in the skb header.
1817 * In addition if skb is not at least 60 bytes we need to pad it so that
1818 * it is large enough to qualify as a valid Ethernet frame.
1820 * Returns true if an error was encountered and skb was freed.
1822 static bool ixgbe_cleanup_headers(struct ixgbe_ring *rx_ring,
1823 union ixgbe_adv_rx_desc *rx_desc,
1824 struct sk_buff *skb)
1826 struct net_device *netdev = rx_ring->netdev;
1828 /* verify that the packet does not have any known errors */
1829 if (unlikely(ixgbe_test_staterr(rx_desc,
1830 IXGBE_RXDADV_ERR_FRAME_ERR_MASK) &&
1831 !(netdev->features & NETIF_F_RXALL))) {
1832 dev_kfree_skb_any(skb);
1836 /* place header in linear portion of buffer */
1837 if (skb_is_nonlinear(skb))
1838 ixgbe_pull_tail(rx_ring, skb);
1841 /* do not attempt to pad FCoE Frames as this will disrupt DDP */
1842 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc))
1846 /* if skb_pad returns an error the skb was freed */
1847 if (unlikely(skb->len < 60)) {
1848 int pad_len = 60 - skb->len;
1850 if (skb_pad(skb, pad_len))
1852 __skb_put(skb, pad_len);
1859 * ixgbe_reuse_rx_page - page flip buffer and store it back on the ring
1860 * @rx_ring: rx descriptor ring to store buffers on
1861 * @old_buff: donor buffer to have page reused
1863 * Synchronizes page for reuse by the adapter
1865 static void ixgbe_reuse_rx_page(struct ixgbe_ring *rx_ring,
1866 struct ixgbe_rx_buffer *old_buff)
1868 struct ixgbe_rx_buffer *new_buff;
1869 u16 nta = rx_ring->next_to_alloc;
1871 new_buff = &rx_ring->rx_buffer_info[nta];
1873 /* update, and store next to alloc */
1875 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
1877 /* transfer page from old buffer to new buffer */
1878 new_buff->page = old_buff->page;
1879 new_buff->dma = old_buff->dma;
1880 new_buff->page_offset = old_buff->page_offset;
1882 /* sync the buffer for use by the device */
1883 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
1884 new_buff->page_offset,
1885 ixgbe_rx_bufsz(rx_ring),
1890 * ixgbe_add_rx_frag - Add contents of Rx buffer to sk_buff
1891 * @rx_ring: rx descriptor ring to transact packets on
1892 * @rx_buffer: buffer containing page to add
1893 * @rx_desc: descriptor containing length of buffer written by hardware
1894 * @skb: sk_buff to place the data into
1896 * This function will add the data contained in rx_buffer->page to the skb.
1897 * This is done either through a direct copy if the data in the buffer is
1898 * less than the skb header size, otherwise it will just attach the page as
1899 * a frag to the skb.
1901 * The function will then update the page offset if necessary and return
1902 * true if the buffer can be reused by the adapter.
1904 static bool ixgbe_add_rx_frag(struct ixgbe_ring *rx_ring,
1905 struct ixgbe_rx_buffer *rx_buffer,
1906 union ixgbe_adv_rx_desc *rx_desc,
1907 struct sk_buff *skb)
1909 struct page *page = rx_buffer->page;
1910 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
1911 #if (PAGE_SIZE < 8192)
1912 unsigned int truesize = ixgbe_rx_bufsz(rx_ring);
1914 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
1915 unsigned int last_offset = ixgbe_rx_pg_size(rx_ring) -
1916 ixgbe_rx_bufsz(rx_ring);
1919 if ((size <= IXGBE_RX_HDR_SIZE) && !skb_is_nonlinear(skb)) {
1920 unsigned char *va = page_address(page) + rx_buffer->page_offset;
1922 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
1924 /* we can reuse buffer as-is, just make sure it is local */
1925 if (likely(page_to_nid(page) == numa_node_id()))
1928 /* this page cannot be reused so discard it */
1933 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
1934 rx_buffer->page_offset, size, truesize);
1936 /* avoid re-using remote pages */
1937 if (unlikely(page_to_nid(page) != numa_node_id()))
1940 #if (PAGE_SIZE < 8192)
1941 /* if we are only owner of page we can reuse it */
1942 if (unlikely(page_count(page) != 1))
1945 /* flip page offset to other buffer */
1946 rx_buffer->page_offset ^= truesize;
1949 * since we are the only owner of the page and we need to
1950 * increment it, just set the value to 2 in order to avoid
1951 * an unecessary locked operation
1953 atomic_set(&page->_count, 2);
1955 /* move offset up to the next cache line */
1956 rx_buffer->page_offset += truesize;
1958 if (rx_buffer->page_offset > last_offset)
1961 /* bump ref count on page before it is given to the stack */
1968 static struct sk_buff *ixgbe_fetch_rx_buffer(struct ixgbe_ring *rx_ring,
1969 union ixgbe_adv_rx_desc *rx_desc)
1971 struct ixgbe_rx_buffer *rx_buffer;
1972 struct sk_buff *skb;
1975 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
1976 page = rx_buffer->page;
1979 skb = rx_buffer->skb;
1982 void *page_addr = page_address(page) +
1983 rx_buffer->page_offset;
1985 /* prefetch first cache line of first page */
1986 prefetch(page_addr);
1987 #if L1_CACHE_BYTES < 128
1988 prefetch(page_addr + L1_CACHE_BYTES);
1991 /* allocate a skb to store the frags */
1992 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
1994 if (unlikely(!skb)) {
1995 rx_ring->rx_stats.alloc_rx_buff_failed++;
2000 * we will be copying header into skb->data in
2001 * pskb_may_pull so it is in our interest to prefetch
2002 * it now to avoid a possible cache miss
2004 prefetchw(skb->data);
2007 * Delay unmapping of the first packet. It carries the
2008 * header information, HW may still access the header
2009 * after the writeback. Only unmap it when EOP is
2012 if (likely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
2015 IXGBE_CB(skb)->dma = rx_buffer->dma;
2017 if (ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP))
2018 ixgbe_dma_sync_frag(rx_ring, skb);
2021 /* we are reusing so sync this buffer for CPU use */
2022 dma_sync_single_range_for_cpu(rx_ring->dev,
2024 rx_buffer->page_offset,
2025 ixgbe_rx_bufsz(rx_ring),
2029 /* pull page into skb */
2030 if (ixgbe_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
2031 /* hand second half of page back to the ring */
2032 ixgbe_reuse_rx_page(rx_ring, rx_buffer);
2033 } else if (IXGBE_CB(skb)->dma == rx_buffer->dma) {
2034 /* the page has been released from the ring */
2035 IXGBE_CB(skb)->page_released = true;
2037 /* we are not reusing the buffer so unmap it */
2038 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
2039 ixgbe_rx_pg_size(rx_ring),
2043 /* clear contents of buffer_info */
2044 rx_buffer->skb = NULL;
2046 rx_buffer->page = NULL;
2052 * ixgbe_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
2053 * @q_vector: structure containing interrupt and ring information
2054 * @rx_ring: rx descriptor ring to transact packets on
2055 * @budget: Total limit on number of packets to process
2057 * This function provides a "bounce buffer" approach to Rx interrupt
2058 * processing. The advantage to this is that on systems that have
2059 * expensive overhead for IOMMU access this provides a means of avoiding
2060 * it by maintaining the mapping of the page to the syste.
2062 * Returns amount of work completed
2064 static int ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
2065 struct ixgbe_ring *rx_ring,
2068 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
2070 struct ixgbe_adapter *adapter = q_vector->adapter;
2072 unsigned int mss = 0;
2073 #endif /* IXGBE_FCOE */
2074 u16 cleaned_count = ixgbe_desc_unused(rx_ring);
2077 union ixgbe_adv_rx_desc *rx_desc;
2078 struct sk_buff *skb;
2080 /* return some buffers to hardware, one at a time is too slow */
2081 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
2082 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2086 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ring->next_to_clean);
2088 if (!ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
2092 * This memory barrier is needed to keep us from reading
2093 * any other fields out of the rx_desc until we know the
2094 * RXD_STAT_DD bit is set
2098 /* retrieve a buffer from the ring */
2099 skb = ixgbe_fetch_rx_buffer(rx_ring, rx_desc);
2101 /* exit if we failed to retrieve a buffer */
2107 /* place incomplete frames back on ring for completion */
2108 if (ixgbe_is_non_eop(rx_ring, rx_desc, skb))
2111 /* verify the packet layout is correct */
2112 if (ixgbe_cleanup_headers(rx_ring, rx_desc, skb))
2115 /* probably a little skewed due to removing CRC */
2116 total_rx_bytes += skb->len;
2118 /* populate checksum, timestamp, VLAN, and protocol */
2119 ixgbe_process_skb_fields(rx_ring, rx_desc, skb);
2122 /* if ddp, not passing to ULD unless for FCP_RSP or error */
2123 if (ixgbe_rx_is_fcoe(rx_ring, rx_desc)) {
2124 ddp_bytes = ixgbe_fcoe_ddp(adapter, rx_desc, skb);
2125 /* include DDPed FCoE data */
2126 if (ddp_bytes > 0) {
2128 mss = rx_ring->netdev->mtu -
2129 sizeof(struct fcoe_hdr) -
2130 sizeof(struct fc_frame_header) -
2131 sizeof(struct fcoe_crc_eof);
2135 total_rx_bytes += ddp_bytes;
2136 total_rx_packets += DIV_ROUND_UP(ddp_bytes,
2140 dev_kfree_skb_any(skb);
2145 #endif /* IXGBE_FCOE */
2146 skb_mark_napi_id(skb, &q_vector->napi);
2147 ixgbe_rx_skb(q_vector, skb);
2149 /* update budget accounting */
2151 } while (likely(total_rx_packets < budget));
2153 u64_stats_update_begin(&rx_ring->syncp);
2154 rx_ring->stats.packets += total_rx_packets;
2155 rx_ring->stats.bytes += total_rx_bytes;
2156 u64_stats_update_end(&rx_ring->syncp);
2157 q_vector->rx.total_packets += total_rx_packets;
2158 q_vector->rx.total_bytes += total_rx_bytes;
2161 ixgbe_alloc_rx_buffers(rx_ring, cleaned_count);
2163 return total_rx_packets;
2166 #ifdef CONFIG_NET_RX_BUSY_POLL
2167 /* must be called with local_bh_disable()d */
2168 static int ixgbe_low_latency_recv(struct napi_struct *napi)
2170 struct ixgbe_q_vector *q_vector =
2171 container_of(napi, struct ixgbe_q_vector, napi);
2172 struct ixgbe_adapter *adapter = q_vector->adapter;
2173 struct ixgbe_ring *ring;
2176 if (test_bit(__IXGBE_DOWN, &adapter->state))
2177 return LL_FLUSH_FAILED;
2179 if (!ixgbe_qv_lock_poll(q_vector))
2180 return LL_FLUSH_BUSY;
2182 ixgbe_for_each_ring(ring, q_vector->rx) {
2183 found = ixgbe_clean_rx_irq(q_vector, ring, 4);
2184 #ifdef BP_EXTENDED_STATS
2186 ring->stats.cleaned += found;
2188 ring->stats.misses++;
2194 ixgbe_qv_unlock_poll(q_vector);
2198 #endif /* CONFIG_NET_RX_BUSY_POLL */
2201 * ixgbe_configure_msix - Configure MSI-X hardware
2202 * @adapter: board private structure
2204 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
2207 static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
2209 struct ixgbe_q_vector *q_vector;
2213 /* Populate MSIX to EITR Select */
2214 if (adapter->num_vfs > 32) {
2215 u32 eitrsel = (1 << (adapter->num_vfs - 32)) - 1;
2216 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, eitrsel);
2220 * Populate the IVAR table and set the ITR values to the
2221 * corresponding register.
2223 for (v_idx = 0; v_idx < adapter->num_q_vectors; v_idx++) {
2224 struct ixgbe_ring *ring;
2225 q_vector = adapter->q_vector[v_idx];
2227 ixgbe_for_each_ring(ring, q_vector->rx)
2228 ixgbe_set_ivar(adapter, 0, ring->reg_idx, v_idx);
2230 ixgbe_for_each_ring(ring, q_vector->tx)
2231 ixgbe_set_ivar(adapter, 1, ring->reg_idx, v_idx);
2233 ixgbe_write_eitr(q_vector);
2236 switch (adapter->hw.mac.type) {
2237 case ixgbe_mac_82598EB:
2238 ixgbe_set_ivar(adapter, -1, IXGBE_IVAR_OTHER_CAUSES_INDEX,
2241 case ixgbe_mac_82599EB:
2242 case ixgbe_mac_X540:
2243 ixgbe_set_ivar(adapter, -1, 1, v_idx);
2248 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(v_idx), 1950);
2250 /* set up to autoclear timer, and the vectors */
2251 mask = IXGBE_EIMS_ENABLE_MASK;
2252 mask &= ~(IXGBE_EIMS_OTHER |
2253 IXGBE_EIMS_MAILBOX |
2256 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);
2259 enum latency_range {
2263 latency_invalid = 255
2267 * ixgbe_update_itr - update the dynamic ITR value based on statistics
2268 * @q_vector: structure containing interrupt and ring information
2269 * @ring_container: structure containing ring performance data
2271 * Stores a new ITR value based on packets and byte
2272 * counts during the last interrupt. The advantage of per interrupt
2273 * computation is faster updates and more accurate ITR for the current
2274 * traffic pattern. Constants in this function were computed
2275 * based on theoretical maximum wire speed and thresholds were set based
2276 * on testing data as well as attempting to minimize response time
2277 * while increasing bulk throughput.
2278 * this functionality is controlled by the InterruptThrottleRate module
2279 * parameter (see ixgbe_param.c)
2281 static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
2282 struct ixgbe_ring_container *ring_container)
2284 int bytes = ring_container->total_bytes;
2285 int packets = ring_container->total_packets;
2288 u8 itr_setting = ring_container->itr;
2293 /* simple throttlerate management
2294 * 0-10MB/s lowest (100000 ints/s)
2295 * 10-20MB/s low (20000 ints/s)
2296 * 20-1249MB/s bulk (8000 ints/s)
2298 /* what was last interrupt timeslice? */
2299 timepassed_us = q_vector->itr >> 2;
2300 if (timepassed_us == 0)
2303 bytes_perint = bytes / timepassed_us; /* bytes/usec */
2305 switch (itr_setting) {
2306 case lowest_latency:
2307 if (bytes_perint > 10)
2308 itr_setting = low_latency;
2311 if (bytes_perint > 20)
2312 itr_setting = bulk_latency;
2313 else if (bytes_perint <= 10)
2314 itr_setting = lowest_latency;
2317 if (bytes_perint <= 20)
2318 itr_setting = low_latency;
2322 /* clear work counters since we have the values we need */
2323 ring_container->total_bytes = 0;
2324 ring_container->total_packets = 0;
2326 /* write updated itr to ring container */
2327 ring_container->itr = itr_setting;
2331 * ixgbe_write_eitr - write EITR register in hardware specific way
2332 * @q_vector: structure containing interrupt and ring information
2334 * This function is made to be called by ethtool and by the driver
2335 * when it needs to update EITR registers at runtime. Hardware
2336 * specific quirks/differences are taken care of here.
2338 void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
2340 struct ixgbe_adapter *adapter = q_vector->adapter;
2341 struct ixgbe_hw *hw = &adapter->hw;
2342 int v_idx = q_vector->v_idx;
2343 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
2345 switch (adapter->hw.mac.type) {
2346 case ixgbe_mac_82598EB:
2347 /* must write high and low 16 bits to reset counter */
2348 itr_reg |= (itr_reg << 16);
2350 case ixgbe_mac_82599EB:
2351 case ixgbe_mac_X540:
2353 * set the WDIS bit to not clear the timer bits and cause an
2354 * immediate assertion of the interrupt
2356 itr_reg |= IXGBE_EITR_CNT_WDIS;
2361 IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
2364 static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
2366 u32 new_itr = q_vector->itr;
2369 ixgbe_update_itr(q_vector, &q_vector->tx);
2370 ixgbe_update_itr(q_vector, &q_vector->rx);
2372 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
2374 switch (current_itr) {
2375 /* counts and packets in update_itr are dependent on these numbers */
2376 case lowest_latency:
2377 new_itr = IXGBE_100K_ITR;
2380 new_itr = IXGBE_20K_ITR;
2383 new_itr = IXGBE_8K_ITR;
2389 if (new_itr != q_vector->itr) {
2390 /* do an exponential smoothing */
2391 new_itr = (10 * new_itr * q_vector->itr) /
2392 ((9 * new_itr) + q_vector->itr);
2394 /* save the algorithm value here */
2395 q_vector->itr = new_itr;
2397 ixgbe_write_eitr(q_vector);
2402 * ixgbe_check_overtemp_subtask - check for over temperature
2403 * @adapter: pointer to adapter
2405 static void ixgbe_check_overtemp_subtask(struct ixgbe_adapter *adapter)
2407 struct ixgbe_hw *hw = &adapter->hw;
2408 u32 eicr = adapter->interrupt_event;
2410 if (test_bit(__IXGBE_DOWN, &adapter->state))
2413 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) &&
2414 !(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_EVENT))
2417 adapter->flags2 &= ~IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2419 switch (hw->device_id) {
2420 case IXGBE_DEV_ID_82599_T3_LOM:
2422 * Since the warning interrupt is for both ports
2423 * we don't have to check if:
2424 * - This interrupt wasn't for our port.
2425 * - We may have missed the interrupt so always have to
2426 * check if we got a LSC
2428 if (!(eicr & IXGBE_EICR_GPI_SDP0) &&
2429 !(eicr & IXGBE_EICR_LSC))
2432 if (!(eicr & IXGBE_EICR_LSC) && hw->mac.ops.check_link) {
2434 bool link_up = false;
2436 hw->mac.ops.check_link(hw, &speed, &link_up, false);
2442 /* Check if this is not due to overtemp */
2443 if (hw->phy.ops.check_overtemp(hw) != IXGBE_ERR_OVERTEMP)
2448 if (!(eicr & IXGBE_EICR_GPI_SDP0))
2453 "Network adapter has been stopped because it has over heated. "
2454 "Restart the computer. If the problem persists, "
2455 "power off the system and replace the adapter\n");
2457 adapter->interrupt_event = 0;
2460 static void ixgbe_check_fan_failure(struct ixgbe_adapter *adapter, u32 eicr)
2462 struct ixgbe_hw *hw = &adapter->hw;
2464 if ((adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) &&
2465 (eicr & IXGBE_EICR_GPI_SDP1)) {
2466 e_crit(probe, "Fan has stopped, replace the adapter\n");
2467 /* write to clear the interrupt */
2468 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2472 static void ixgbe_check_overtemp_event(struct ixgbe_adapter *adapter, u32 eicr)
2474 if (!(adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE))
2477 switch (adapter->hw.mac.type) {
2478 case ixgbe_mac_82599EB:
2480 * Need to check link state so complete overtemp check
2483 if (((eicr & IXGBE_EICR_GPI_SDP0) || (eicr & IXGBE_EICR_LSC)) &&
2484 (!test_bit(__IXGBE_DOWN, &adapter->state))) {
2485 adapter->interrupt_event = eicr;
2486 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_EVENT;
2487 ixgbe_service_event_schedule(adapter);
2491 case ixgbe_mac_X540:
2492 if (!(eicr & IXGBE_EICR_TS))
2500 "Network adapter has been stopped because it has over heated. "
2501 "Restart the computer. If the problem persists, "
2502 "power off the system and replace the adapter\n");
2505 static void ixgbe_check_sfp_event(struct ixgbe_adapter *adapter, u32 eicr)
2507 struct ixgbe_hw *hw = &adapter->hw;
2509 if (eicr & IXGBE_EICR_GPI_SDP2) {
2510 /* Clear the interrupt */
2511 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP2);
2512 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2513 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
2514 ixgbe_service_event_schedule(adapter);
2518 if (eicr & IXGBE_EICR_GPI_SDP1) {
2519 /* Clear the interrupt */
2520 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_GPI_SDP1);
2521 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2522 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
2523 ixgbe_service_event_schedule(adapter);
2528 static void ixgbe_check_lsc(struct ixgbe_adapter *adapter)
2530 struct ixgbe_hw *hw = &adapter->hw;
2533 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
2534 adapter->link_check_timeout = jiffies;
2535 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
2536 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_LSC);
2537 IXGBE_WRITE_FLUSH(hw);
2538 ixgbe_service_event_schedule(adapter);
2542 static inline void ixgbe_irq_enable_queues(struct ixgbe_adapter *adapter,
2546 struct ixgbe_hw *hw = &adapter->hw;
2548 switch (hw->mac.type) {
2549 case ixgbe_mac_82598EB:
2550 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2551 IXGBE_WRITE_REG(hw, IXGBE_EIMS, mask);
2553 case ixgbe_mac_82599EB:
2554 case ixgbe_mac_X540:
2555 mask = (qmask & 0xFFFFFFFF);
2557 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(0), mask);
2558 mask = (qmask >> 32);
2560 IXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);
2565 /* skip the flush */
2568 static inline void ixgbe_irq_disable_queues(struct ixgbe_adapter *adapter,
2572 struct ixgbe_hw *hw = &adapter->hw;
2574 switch (hw->mac.type) {
2575 case ixgbe_mac_82598EB:
2576 mask = (IXGBE_EIMS_RTX_QUEUE & qmask);
2577 IXGBE_WRITE_REG(hw, IXGBE_EIMC, mask);
2579 case ixgbe_mac_82599EB:
2580 case ixgbe_mac_X540:
2581 mask = (qmask & 0xFFFFFFFF);
2583 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(0), mask);
2584 mask = (qmask >> 32);
2586 IXGBE_WRITE_REG(hw, IXGBE_EIMC_EX(1), mask);
2591 /* skip the flush */
2595 * ixgbe_irq_enable - Enable default interrupt generation settings
2596 * @adapter: board private structure
2598 static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
2601 u32 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
2603 /* don't reenable LSC while waiting for link */
2604 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
2605 mask &= ~IXGBE_EIMS_LSC;
2607 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE)
2608 switch (adapter->hw.mac.type) {
2609 case ixgbe_mac_82599EB:
2610 mask |= IXGBE_EIMS_GPI_SDP0;
2612 case ixgbe_mac_X540:
2613 mask |= IXGBE_EIMS_TS;
2618 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
2619 mask |= IXGBE_EIMS_GPI_SDP1;
2620 switch (adapter->hw.mac.type) {
2621 case ixgbe_mac_82599EB:
2622 mask |= IXGBE_EIMS_GPI_SDP1;
2623 mask |= IXGBE_EIMS_GPI_SDP2;
2624 case ixgbe_mac_X540:
2625 mask |= IXGBE_EIMS_ECC;
2626 mask |= IXGBE_EIMS_MAILBOX;
2632 if (adapter->hw.mac.type == ixgbe_mac_X540)
2633 mask |= IXGBE_EIMS_TIMESYNC;
2635 if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
2636 !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
2637 mask |= IXGBE_EIMS_FLOW_DIR;
2639 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
2641 ixgbe_irq_enable_queues(adapter, ~0);
2643 IXGBE_WRITE_FLUSH(&adapter->hw);
2646 static irqreturn_t ixgbe_msix_other(int irq, void *data)
2648 struct ixgbe_adapter *adapter = data;
2649 struct ixgbe_hw *hw = &adapter->hw;
2653 * Workaround for Silicon errata. Use clear-by-write instead
2654 * of clear-by-read. Reading with EICS will return the
2655 * interrupt causes without clearing, which later be done
2656 * with the write to EICR.
2658 eicr = IXGBE_READ_REG(hw, IXGBE_EICS);
2660 /* The lower 16bits of the EICR register are for the queue interrupts
2661 * which should be masked here in order to not accidently clear them if
2662 * the bits are high when ixgbe_msix_other is called. There is a race
2663 * condition otherwise which results in possible performance loss
2664 * especially if the ixgbe_msix_other interrupt is triggering
2665 * consistently (as it would when PPS is turned on for the X540 device)
2669 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr);
2671 if (eicr & IXGBE_EICR_LSC)
2672 ixgbe_check_lsc(adapter);
2674 if (eicr & IXGBE_EICR_MAILBOX)
2675 ixgbe_msg_task(adapter);
2677 switch (hw->mac.type) {
2678 case ixgbe_mac_82599EB:
2679 case ixgbe_mac_X540:
2680 if (eicr & IXGBE_EICR_ECC) {
2681 e_info(link, "Received ECC Err, initiating reset\n");
2682 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2683 ixgbe_service_event_schedule(adapter);
2684 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2686 /* Handle Flow Director Full threshold interrupt */
2687 if (eicr & IXGBE_EICR_FLOW_DIR) {
2688 int reinit_count = 0;
2690 for (i = 0; i < adapter->num_tx_queues; i++) {
2691 struct ixgbe_ring *ring = adapter->tx_ring[i];
2692 if (test_and_clear_bit(__IXGBE_TX_FDIR_INIT_DONE,
2697 /* no more flow director interrupts until after init */
2698 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EIMC_FLOW_DIR);
2699 adapter->flags2 |= IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
2700 ixgbe_service_event_schedule(adapter);
2703 ixgbe_check_sfp_event(adapter, eicr);
2704 ixgbe_check_overtemp_event(adapter, eicr);
2710 ixgbe_check_fan_failure(adapter, eicr);
2712 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2713 ixgbe_ptp_check_pps_event(adapter, eicr);
2715 /* re-enable the original interrupt state, no lsc, no queues */
2716 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2717 ixgbe_irq_enable(adapter, false, false);
2722 static irqreturn_t ixgbe_msix_clean_rings(int irq, void *data)
2724 struct ixgbe_q_vector *q_vector = data;
2726 /* EIAM disabled interrupts (on this vector) for us */
2728 if (q_vector->rx.ring || q_vector->tx.ring)
2729 napi_schedule(&q_vector->napi);
2735 * ixgbe_poll - NAPI Rx polling callback
2736 * @napi: structure for representing this polling device
2737 * @budget: how many packets driver is allowed to clean
2739 * This function is used for legacy and MSI, NAPI mode
2741 int ixgbe_poll(struct napi_struct *napi, int budget)
2743 struct ixgbe_q_vector *q_vector =
2744 container_of(napi, struct ixgbe_q_vector, napi);
2745 struct ixgbe_adapter *adapter = q_vector->adapter;
2746 struct ixgbe_ring *ring;
2747 int per_ring_budget;
2748 bool clean_complete = true;
2750 #ifdef CONFIG_IXGBE_DCA
2751 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED)
2752 ixgbe_update_dca(q_vector);
2755 ixgbe_for_each_ring(ring, q_vector->tx)
2756 clean_complete &= !!ixgbe_clean_tx_irq(q_vector, ring);
2758 if (!ixgbe_qv_lock_napi(q_vector))
2761 /* attempt to distribute budget to each queue fairly, but don't allow
2762 * the budget to go below 1 because we'll exit polling */
2763 if (q_vector->rx.count > 1)
2764 per_ring_budget = max(budget/q_vector->rx.count, 1);
2766 per_ring_budget = budget;
2768 ixgbe_for_each_ring(ring, q_vector->rx)
2769 clean_complete &= (ixgbe_clean_rx_irq(q_vector, ring,
2770 per_ring_budget) < per_ring_budget);
2772 ixgbe_qv_unlock_napi(q_vector);
2773 /* If all work not completed, return budget and keep polling */
2774 if (!clean_complete)
2777 /* all work done, exit the polling mode */
2778 napi_complete(napi);
2779 if (adapter->rx_itr_setting & 1)
2780 ixgbe_set_itr(q_vector);
2781 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2782 ixgbe_irq_enable_queues(adapter, ((u64)1 << q_vector->v_idx));
2788 * ixgbe_request_msix_irqs - Initialize MSI-X interrupts
2789 * @adapter: board private structure
2791 * ixgbe_request_msix_irqs allocates MSI-X vectors and requests
2792 * interrupts from the kernel.
2794 static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
2796 struct net_device *netdev = adapter->netdev;
2800 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2801 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2802 struct msix_entry *entry = &adapter->msix_entries[vector];
2804 if (q_vector->tx.ring && q_vector->rx.ring) {
2805 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2806 "%s-%s-%d", netdev->name, "TxRx", ri++);
2808 } else if (q_vector->rx.ring) {
2809 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2810 "%s-%s-%d", netdev->name, "rx", ri++);
2811 } else if (q_vector->tx.ring) {
2812 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
2813 "%s-%s-%d", netdev->name, "tx", ti++);
2815 /* skip this unused q_vector */
2818 err = request_irq(entry->vector, &ixgbe_msix_clean_rings, 0,
2819 q_vector->name, q_vector);
2821 e_err(probe, "request_irq failed for MSIX interrupt "
2822 "Error: %d\n", err);
2823 goto free_queue_irqs;
2825 /* If Flow Director is enabled, set interrupt affinity */
2826 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2827 /* assign the mask for this irq */
2828 irq_set_affinity_hint(entry->vector,
2829 &q_vector->affinity_mask);
2833 err = request_irq(adapter->msix_entries[vector].vector,
2834 ixgbe_msix_other, 0, netdev->name, adapter);
2836 e_err(probe, "request_irq for msix_other failed: %d\n", err);
2837 goto free_queue_irqs;
2845 irq_set_affinity_hint(adapter->msix_entries[vector].vector,
2847 free_irq(adapter->msix_entries[vector].vector,
2848 adapter->q_vector[vector]);
2850 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
2851 pci_disable_msix(adapter->pdev);
2852 kfree(adapter->msix_entries);
2853 adapter->msix_entries = NULL;
2858 * ixgbe_intr - legacy mode Interrupt Handler
2859 * @irq: interrupt number
2860 * @data: pointer to a network interface device structure
2862 static irqreturn_t ixgbe_intr(int irq, void *data)
2864 struct ixgbe_adapter *adapter = data;
2865 struct ixgbe_hw *hw = &adapter->hw;
2866 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
2870 * Workaround for silicon errata #26 on 82598. Mask the interrupt
2871 * before the read of EICR.
2873 IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_IRQ_CLEAR_MASK);
2875 /* for NAPI, using EIAM to auto-mask tx/rx interrupt bits on read
2876 * therefore no explicit interrupt disable is necessary */
2877 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
2880 * shared interrupt alert!
2881 * make sure interrupts are enabled because the read will
2882 * have disabled interrupts due to EIAM
2883 * finish the workaround of silicon errata on 82598. Unmask
2884 * the interrupt that we masked before the EICR read.
2886 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2887 ixgbe_irq_enable(adapter, true, true);
2888 return IRQ_NONE; /* Not our interrupt */
2891 if (eicr & IXGBE_EICR_LSC)
2892 ixgbe_check_lsc(adapter);
2894 switch (hw->mac.type) {
2895 case ixgbe_mac_82599EB:
2896 ixgbe_check_sfp_event(adapter, eicr);
2898 case ixgbe_mac_X540:
2899 if (eicr & IXGBE_EICR_ECC) {
2900 e_info(link, "Received ECC Err, initiating reset\n");
2901 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
2902 ixgbe_service_event_schedule(adapter);
2903 IXGBE_WRITE_REG(hw, IXGBE_EICR, IXGBE_EICR_ECC);
2905 ixgbe_check_overtemp_event(adapter, eicr);
2911 ixgbe_check_fan_failure(adapter, eicr);
2912 if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
2913 ixgbe_ptp_check_pps_event(adapter, eicr);
2915 /* would disable interrupts here but EIAM disabled it */
2916 napi_schedule(&q_vector->napi);
2919 * re-enable link(maybe) and non-queue interrupts, no flush.
2920 * ixgbe_poll will re-enable the queue interrupts
2922 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2923 ixgbe_irq_enable(adapter, false, false);
2929 * ixgbe_request_irq - initialize interrupts
2930 * @adapter: board private structure
2932 * Attempts to configure interrupts using the best available
2933 * capabilities of the hardware and kernel.
2935 static int ixgbe_request_irq(struct ixgbe_adapter *adapter)
2937 struct net_device *netdev = adapter->netdev;
2940 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2941 err = ixgbe_request_msix_irqs(adapter);
2942 else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED)
2943 err = request_irq(adapter->pdev->irq, ixgbe_intr, 0,
2944 netdev->name, adapter);
2946 err = request_irq(adapter->pdev->irq, ixgbe_intr, IRQF_SHARED,
2947 netdev->name, adapter);
2950 e_err(probe, "request_irq failed, Error %d\n", err);
2955 static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
2959 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
2960 free_irq(adapter->pdev->irq, adapter);
2964 for (vector = 0; vector < adapter->num_q_vectors; vector++) {
2965 struct ixgbe_q_vector *q_vector = adapter->q_vector[vector];
2966 struct msix_entry *entry = &adapter->msix_entries[vector];
2968 /* free only the irqs that were actually requested */
2969 if (!q_vector->rx.ring && !q_vector->tx.ring)
2972 /* clear the affinity_mask in the IRQ descriptor */
2973 irq_set_affinity_hint(entry->vector, NULL);
2975 free_irq(entry->vector, q_vector);
2978 free_irq(adapter->msix_entries[vector++].vector, adapter);
2982 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
2983 * @adapter: board private structure
2985 static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
2987 switch (adapter->hw.mac.type) {
2988 case ixgbe_mac_82598EB:
2989 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
2991 case ixgbe_mac_82599EB:
2992 case ixgbe_mac_X540:
2993 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFF0000);
2994 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(0), ~0);
2995 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC_EX(1), ~0);
3000 IXGBE_WRITE_FLUSH(&adapter->hw);
3001 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
3004 for (vector = 0; vector < adapter->num_q_vectors; vector++)
3005 synchronize_irq(adapter->msix_entries[vector].vector);
3007 synchronize_irq(adapter->msix_entries[vector++].vector);
3009 synchronize_irq(adapter->pdev->irq);
3014 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
3017 static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
3019 struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
3021 ixgbe_write_eitr(q_vector);
3023 ixgbe_set_ivar(adapter, 0, 0, 0);
3024 ixgbe_set_ivar(adapter, 1, 0, 0);
3026 e_info(hw, "Legacy interrupt IVAR setup done\n");
3030 * ixgbe_configure_tx_ring - Configure 8259x Tx ring after Reset
3031 * @adapter: board private structure
3032 * @ring: structure containing ring specific data
3034 * Configure the Tx descriptor ring after a reset.
3036 void ixgbe_configure_tx_ring(struct ixgbe_adapter *adapter,
3037 struct ixgbe_ring *ring)
3039 struct ixgbe_hw *hw = &adapter->hw;
3040 u64 tdba = ring->dma;
3042 u32 txdctl = IXGBE_TXDCTL_ENABLE;
3043 u8 reg_idx = ring->reg_idx;
3045 /* disable queue to avoid issues while updating state */
3046 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), 0);
3047 IXGBE_WRITE_FLUSH(hw);
3049 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(reg_idx),
3050 (tdba & DMA_BIT_MASK(32)));
3051 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(reg_idx), (tdba >> 32));
3052 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(reg_idx),
3053 ring->count * sizeof(union ixgbe_adv_tx_desc));
3054 IXGBE_WRITE_REG(hw, IXGBE_TDH(reg_idx), 0);
3055 IXGBE_WRITE_REG(hw, IXGBE_TDT(reg_idx), 0);
3056 ring->tail = adapter->io_addr + IXGBE_TDT(reg_idx);
3059 * set WTHRESH to encourage burst writeback, it should not be set
3060 * higher than 1 when:
3061 * - ITR is 0 as it could cause false TX hangs
3062 * - ITR is set to > 100k int/sec and BQL is enabled
3064 * In order to avoid issues WTHRESH + PTHRESH should always be equal
3065 * to or less than the number of on chip descriptors, which is
3068 #if IS_ENABLED(CONFIG_BQL)
3069 if (!ring->q_vector || (ring->q_vector->itr < IXGBE_100K_ITR))
3071 if (!ring->q_vector || (ring->q_vector->itr < 8))
3073 txdctl |= (1 << 16); /* WTHRESH = 1 */
3075 txdctl |= (8 << 16); /* WTHRESH = 8 */
3078 * Setting PTHRESH to 32 both improves performance
3079 * and avoids a TX hang with DFP enabled
3081 txdctl |= (1 << 8) | /* HTHRESH = 1 */
3082 32; /* PTHRESH = 32 */
3084 /* reinitialize flowdirector state */
3085 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
3086 ring->atr_sample_rate = adapter->atr_sample_rate;
3087 ring->atr_count = 0;
3088 set_bit(__IXGBE_TX_FDIR_INIT_DONE, &ring->state);
3090 ring->atr_sample_rate = 0;
3093 /* initialize XPS */
3094 if (!test_and_set_bit(__IXGBE_TX_XPS_INIT_DONE, &ring->state)) {
3095 struct ixgbe_q_vector *q_vector = ring->q_vector;
3098 netif_set_xps_queue(ring->netdev,
3099 &q_vector->affinity_mask,
3103 clear_bit(__IXGBE_HANG_CHECK_ARMED, &ring->state);
3106 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), txdctl);
3108 /* TXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3109 if (hw->mac.type == ixgbe_mac_82598EB &&
3110 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3113 /* poll to verify queue is enabled */
3115 usleep_range(1000, 2000);
3116 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(reg_idx));
3117 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
3119 e_err(drv, "Could not enable Tx Queue %d\n", reg_idx);
3122 static void ixgbe_setup_mtqc(struct ixgbe_adapter *adapter)
3124 struct ixgbe_hw *hw = &adapter->hw;
3126 u8 tcs = netdev_get_num_tc(adapter->netdev);
3128 if (hw->mac.type == ixgbe_mac_82598EB)
3131 /* disable the arbiter while setting MTQC */
3132 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
3133 rttdcs |= IXGBE_RTTDCS_ARBDIS;
3134 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3136 /* set transmit pool layout */
3137 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3138 mtqc = IXGBE_MTQC_VT_ENA;
3140 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3142 mtqc |= IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3143 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3144 mtqc |= IXGBE_MTQC_32VF;
3146 mtqc |= IXGBE_MTQC_64VF;
3149 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_8TC_8TQ;
3151 mtqc = IXGBE_MTQC_RT_ENA | IXGBE_MTQC_4TC_4TQ;
3153 mtqc = IXGBE_MTQC_64Q_1PB;
3156 IXGBE_WRITE_REG(hw, IXGBE_MTQC, mtqc);
3158 /* Enable Security TX Buffer IFG for multiple pb */
3160 u32 sectx = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
3161 sectx |= IXGBE_SECTX_DCB;
3162 IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, sectx);
3165 /* re-enable the arbiter */
3166 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
3167 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
3171 * ixgbe_configure_tx - Configure 8259x Transmit Unit after Reset
3172 * @adapter: board private structure
3174 * Configure the Tx unit of the MAC after a reset.
3176 static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
3178 struct ixgbe_hw *hw = &adapter->hw;
3182 ixgbe_setup_mtqc(adapter);
3184 if (hw->mac.type != ixgbe_mac_82598EB) {
3185 /* DMATXCTL.EN must be before Tx queues are enabled */
3186 dmatxctl = IXGBE_READ_REG(hw, IXGBE_DMATXCTL);
3187 dmatxctl |= IXGBE_DMATXCTL_TE;
3188 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, dmatxctl);
3191 /* Setup the HW Tx Head and Tail descriptor pointers */
3192 for (i = 0; i < adapter->num_tx_queues; i++)
3193 ixgbe_configure_tx_ring(adapter, adapter->tx_ring[i]);
3196 static void ixgbe_enable_rx_drop(struct ixgbe_adapter *adapter,
3197 struct ixgbe_ring *ring)
3199 struct ixgbe_hw *hw = &adapter->hw;
3200 u8 reg_idx = ring->reg_idx;
3201 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3203 srrctl |= IXGBE_SRRCTL_DROP_EN;
3205 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3208 static void ixgbe_disable_rx_drop(struct ixgbe_adapter *adapter,
3209 struct ixgbe_ring *ring)
3211 struct ixgbe_hw *hw = &adapter->hw;
3212 u8 reg_idx = ring->reg_idx;
3213 u32 srrctl = IXGBE_READ_REG(hw, IXGBE_SRRCTL(reg_idx));
3215 srrctl &= ~IXGBE_SRRCTL_DROP_EN;
3217 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3220 #ifdef CONFIG_IXGBE_DCB
3221 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3223 static void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter)
3227 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
3229 if (adapter->ixgbe_ieee_pfc)
3230 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
3233 * We should set the drop enable bit if:
3236 * Number of Rx queues > 1 and flow control is disabled
3238 * This allows us to avoid head of line blocking for security
3239 * and performance reasons.
3241 if (adapter->num_vfs || (adapter->num_rx_queues > 1 &&
3242 !(adapter->hw.fc.current_mode & ixgbe_fc_tx_pause) && !pfc_en)) {
3243 for (i = 0; i < adapter->num_rx_queues; i++)
3244 ixgbe_enable_rx_drop(adapter, adapter->rx_ring[i]);
3246 for (i = 0; i < adapter->num_rx_queues; i++)
3247 ixgbe_disable_rx_drop(adapter, adapter->rx_ring[i]);
3251 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
3253 static void ixgbe_configure_srrctl(struct ixgbe_adapter *adapter,
3254 struct ixgbe_ring *rx_ring)
3256 struct ixgbe_hw *hw = &adapter->hw;
3258 u8 reg_idx = rx_ring->reg_idx;
3260 if (hw->mac.type == ixgbe_mac_82598EB) {
3261 u16 mask = adapter->ring_feature[RING_F_RSS].mask;
3264 * if VMDq is not active we must program one srrctl register
3265 * per RSS queue since we have enabled RDRXCTL.MVMEN
3270 /* configure header buffer length, needed for RSC */
3271 srrctl = IXGBE_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
3273 /* configure the packet buffer length */
3274 srrctl |= ixgbe_rx_bufsz(rx_ring) >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
3276 /* configure descriptor type */
3277 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
3279 IXGBE_WRITE_REG(hw, IXGBE_SRRCTL(reg_idx), srrctl);
3282 static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
3284 struct ixgbe_hw *hw = &adapter->hw;
3285 static const u32 seed[10] = { 0xE291D73D, 0x1805EC6C, 0x2A94B30D,
3286 0xA54F2BEC, 0xEA49AF7C, 0xE214AD3D, 0xB855AABE,
3287 0x6A3E67EA, 0x14364D17, 0x3BED200D};
3288 u32 mrqc = 0, reta = 0;
3291 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
3294 * Program table for at least 2 queues w/ SR-IOV so that VFs can
3295 * make full use of any rings they may have. We will use the
3296 * PSRTYPE register to control how many rings we use within the PF.
3298 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && (rss_i < 2))
3301 /* Fill out hash function seeds */
3302 for (i = 0; i < 10; i++)
3303 IXGBE_WRITE_REG(hw, IXGBE_RSSRK(i), seed[i]);
3305 /* Fill out redirection table */
3306 for (i = 0, j = 0; i < 128; i++, j++) {
3309 /* reta = 4-byte sliding window of
3310 * 0x00..(indices-1)(indices-1)00..etc. */
3311 reta = (reta << 8) | (j * 0x11);
3313 IXGBE_WRITE_REG(hw, IXGBE_RETA(i >> 2), reta);
3316 /* Disable indicating checksum in descriptor, enables RSS hash */
3317 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
3318 rxcsum |= IXGBE_RXCSUM_PCSD;
3319 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
3321 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
3322 if (adapter->ring_feature[RING_F_RSS].mask)
3323 mrqc = IXGBE_MRQC_RSSEN;
3325 u8 tcs = netdev_get_num_tc(adapter->netdev);
3327 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
3329 mrqc = IXGBE_MRQC_VMDQRT8TCEN; /* 8 TCs */
3331 mrqc = IXGBE_MRQC_VMDQRT4TCEN; /* 4 TCs */
3332 else if (adapter->ring_feature[RING_F_RSS].indices == 4)
3333 mrqc = IXGBE_MRQC_VMDQRSS32EN;
3335 mrqc = IXGBE_MRQC_VMDQRSS64EN;
3338 mrqc = IXGBE_MRQC_RTRSS8TCEN;
3340 mrqc = IXGBE_MRQC_RTRSS4TCEN;
3342 mrqc = IXGBE_MRQC_RSSEN;
3346 /* Perform hash on these packet types */
3347 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4 |
3348 IXGBE_MRQC_RSS_FIELD_IPV4_TCP |
3349 IXGBE_MRQC_RSS_FIELD_IPV6 |
3350 IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
3352 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
3353 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
3354 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
3355 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
3357 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
3361 * ixgbe_configure_rscctl - enable RSC for the indicated ring
3362 * @adapter: address of board private structure
3363 * @index: index of ring to set
3365 static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
3366 struct ixgbe_ring *ring)
3368 struct ixgbe_hw *hw = &adapter->hw;
3370 u8 reg_idx = ring->reg_idx;
3372 if (!ring_is_rsc_enabled(ring))
3375 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
3376 rscctrl |= IXGBE_RSCCTL_RSCEN;
3378 * we must limit the number of descriptors so that the
3379 * total size of max desc * buf_len is not greater
3382 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
3383 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
3386 #define IXGBE_MAX_RX_DESC_POLL 10
3387 static void ixgbe_rx_desc_queue_enable(struct ixgbe_adapter *adapter,
3388 struct ixgbe_ring *ring)
3390 struct ixgbe_hw *hw = &adapter->hw;
3391 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3393 u8 reg_idx = ring->reg_idx;
3395 if (ixgbe_removed(hw->hw_addr))
3397 /* RXDCTL.EN will return 0 on 82598 if link is down, so skip it */
3398 if (hw->mac.type == ixgbe_mac_82598EB &&
3399 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3403 usleep_range(1000, 2000);
3404 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3405 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
3408 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not set within "
3409 "the polling period\n", reg_idx);
3413 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter,
3414 struct ixgbe_ring *ring)
3416 struct ixgbe_hw *hw = &adapter->hw;
3417 int wait_loop = IXGBE_MAX_RX_DESC_POLL;
3419 u8 reg_idx = ring->reg_idx;
3421 if (ixgbe_removed(hw->hw_addr))
3423 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3424 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
3426 /* write value back with RXDCTL.ENABLE bit cleared */
3427 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3429 if (hw->mac.type == ixgbe_mac_82598EB &&
3430 !(IXGBE_READ_REG(hw, IXGBE_LINKS) & IXGBE_LINKS_UP))
3433 /* the hardware may take up to 100us to really disable the rx queue */
3436 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3437 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
3440 e_err(drv, "RXDCTL.ENABLE on Rx queue %d not cleared within "
3441 "the polling period\n", reg_idx);
3445 void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
3446 struct ixgbe_ring *ring)
3448 struct ixgbe_hw *hw = &adapter->hw;
3449 u64 rdba = ring->dma;
3451 u8 reg_idx = ring->reg_idx;
3453 /* disable queue to avoid issues while updating state */
3454 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
3455 ixgbe_disable_rx_queue(adapter, ring);
3457 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(reg_idx), (rdba & DMA_BIT_MASK(32)));
3458 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(reg_idx), (rdba >> 32));
3459 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(reg_idx),
3460 ring->count * sizeof(union ixgbe_adv_rx_desc));
3461 IXGBE_WRITE_REG(hw, IXGBE_RDH(reg_idx), 0);
3462 IXGBE_WRITE_REG(hw, IXGBE_RDT(reg_idx), 0);
3463 ring->tail = adapter->io_addr + IXGBE_RDT(reg_idx);
3465 ixgbe_configure_srrctl(adapter, ring);
3466 ixgbe_configure_rscctl(adapter, ring);
3468 if (hw->mac.type == ixgbe_mac_82598EB) {
3470 * enable cache line friendly hardware writes:
3471 * PTHRESH=32 descriptors (half the internal cache),
3472 * this also removes ugly rx_no_buffer_count increment
3473 * HTHRESH=4 descriptors (to minimize latency on fetch)
3474 * WTHRESH=8 burst writeback up to two cache lines
3476 rxdctl &= ~0x3FFFFF;
3480 /* enable receive descriptor ring */
3481 rxdctl |= IXGBE_RXDCTL_ENABLE;
3482 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), rxdctl);
3484 ixgbe_rx_desc_queue_enable(adapter, ring);
3485 ixgbe_alloc_rx_buffers(ring, ixgbe_desc_unused(ring));
3488 static void ixgbe_setup_psrtype(struct ixgbe_adapter *adapter)
3490 struct ixgbe_hw *hw = &adapter->hw;
3491 int rss_i = adapter->ring_feature[RING_F_RSS].indices;
3494 /* PSRTYPE must be initialized in non 82598 adapters */
3495 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
3496 IXGBE_PSRTYPE_UDPHDR |
3497 IXGBE_PSRTYPE_IPV4HDR |
3498 IXGBE_PSRTYPE_L2HDR |
3499 IXGBE_PSRTYPE_IPV6HDR;
3501 if (hw->mac.type == ixgbe_mac_82598EB)
3509 for_each_set_bit(pool, &adapter->fwd_bitmask, 32)
3510 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
3513 static void ixgbe_configure_virtualization(struct ixgbe_adapter *adapter)
3515 struct ixgbe_hw *hw = &adapter->hw;
3516 u32 reg_offset, vf_shift;
3517 u32 gcr_ext, vmdctl;
3520 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
3523 vmdctl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
3524 vmdctl |= IXGBE_VMD_CTL_VMDQ_EN;
3525 vmdctl &= ~IXGBE_VT_CTL_POOL_MASK;
3526 vmdctl |= VMDQ_P(0) << IXGBE_VT_CTL_POOL_SHIFT;
3527 vmdctl |= IXGBE_VT_CTL_REPLEN;
3528 IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, vmdctl);
3530 vf_shift = VMDQ_P(0) % 32;
3531 reg_offset = (VMDQ_P(0) >= 32) ? 1 : 0;
3533 /* Enable only the PF's pool for Tx/Rx */
3534 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset), (~0) << vf_shift);
3535 IXGBE_WRITE_REG(hw, IXGBE_VFRE(reg_offset ^ 1), reg_offset - 1);
3536 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset), (~0) << vf_shift);
3537 IXGBE_WRITE_REG(hw, IXGBE_VFTE(reg_offset ^ 1), reg_offset - 1);
3538 if (adapter->flags2 & IXGBE_FLAG2_BRIDGE_MODE_VEB)
3539 IXGBE_WRITE_REG(hw, IXGBE_PFDTXGSWC, IXGBE_PFDTXGSWC_VT_LBEN);
3541 /* Map PF MAC address in RAR Entry 0 to first pool following VFs */
3542 hw->mac.ops.set_vmdq(hw, 0, VMDQ_P(0));
3545 * Set up VF register offsets for selected VT Mode,
3546 * i.e. 32 or 64 VFs for SR-IOV
3548 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
3549 case IXGBE_82599_VMDQ_8Q_MASK:
3550 gcr_ext = IXGBE_GCR_EXT_VT_MODE_16;
3552 case IXGBE_82599_VMDQ_4Q_MASK:
3553 gcr_ext = IXGBE_GCR_EXT_VT_MODE_32;
3556 gcr_ext = IXGBE_GCR_EXT_VT_MODE_64;
3560 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
3563 /* Enable MAC Anti-Spoofing */
3564 hw->mac.ops.set_mac_anti_spoofing(hw, (adapter->num_vfs != 0),
3566 /* For VFs that have spoof checking turned off */
3567 for (i = 0; i < adapter->num_vfs; i++) {
3568 if (!adapter->vfinfo[i].spoofchk_enabled)
3569 ixgbe_ndo_set_vf_spoofchk(adapter->netdev, i, false);
3573 static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
3575 struct ixgbe_hw *hw = &adapter->hw;
3576 struct net_device *netdev = adapter->netdev;
3577 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3578 struct ixgbe_ring *rx_ring;
3583 /* adjust max frame to be able to do baby jumbo for FCoE */
3584 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
3585 (max_frame < IXGBE_FCOE_JUMBO_FRAME_SIZE))
3586 max_frame = IXGBE_FCOE_JUMBO_FRAME_SIZE;
3588 #endif /* IXGBE_FCOE */
3590 /* adjust max frame to be at least the size of a standard frame */
3591 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
3592 max_frame = (ETH_FRAME_LEN + ETH_FCS_LEN);
3594 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
3595 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
3596 mhadd &= ~IXGBE_MHADD_MFS_MASK;
3597 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
3599 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
3602 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
3603 /* set jumbo enable since MHADD.MFS is keeping size locked at max_frame */
3604 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
3605 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
3608 * Setup the HW Rx Head and Tail Descriptor Pointers and
3609 * the Base and Length of the Rx Descriptor Ring
3611 for (i = 0; i < adapter->num_rx_queues; i++) {
3612 rx_ring = adapter->rx_ring[i];
3613 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
3614 set_ring_rsc_enabled(rx_ring);
3616 clear_ring_rsc_enabled(rx_ring);
3620 static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
3622 struct ixgbe_hw *hw = &adapter->hw;
3623 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
3625 switch (hw->mac.type) {
3626 case ixgbe_mac_82598EB:
3628 * For VMDq support of different descriptor types or
3629 * buffer sizes through the use of multiple SRRCTL
3630 * registers, RDRXCTL.MVMEN must be set to 1
3632 * also, the manual doesn't mention it clearly but DCA hints
3633 * will only use queue 0's tags unless this bit is set. Side
3634 * effects of setting this bit are only that SRRCTL must be
3635 * fully programmed [0..15]
3637 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
3639 case ixgbe_mac_82599EB:
3640 case ixgbe_mac_X540:
3641 /* Disable RSC for ACK packets */
3642 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
3643 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
3644 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
3645 /* hardware requires some bits to be set by default */
3646 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
3647 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
3650 /* We should do nothing since we don't know this hardware */
3654 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
3658 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
3659 * @adapter: board private structure
3661 * Configure the Rx unit of the MAC after a reset.
3663 static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
3665 struct ixgbe_hw *hw = &adapter->hw;
3669 /* disable receives while setting up the descriptors */
3670 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
3671 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
3673 ixgbe_setup_psrtype(adapter);
3674 ixgbe_setup_rdrxctl(adapter);
3677 rfctl = IXGBE_READ_REG(hw, IXGBE_RFCTL);
3678 rfctl &= ~IXGBE_RFCTL_RSC_DIS;
3679 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
3680 rfctl |= IXGBE_RFCTL_RSC_DIS;
3681 IXGBE_WRITE_REG(hw, IXGBE_RFCTL, rfctl);
3683 /* Program registers for the distribution of queues */
3684 ixgbe_setup_mrqc(adapter);
3686 /* set_rx_buffer_len must be called before ring initialization */
3687 ixgbe_set_rx_buffer_len(adapter);
3690 * Setup the HW Rx Head and Tail Descriptor Pointers and
3691 * the Base and Length of the Rx Descriptor Ring
3693 for (i = 0; i < adapter->num_rx_queues; i++)
3694 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[i]);
3696 /* disable drop enable for 82598 parts */
3697 if (hw->mac.type == ixgbe_mac_82598EB)
3698 rxctrl |= IXGBE_RXCTRL_DMBYPS;
3700 /* enable all receives */
3701 rxctrl |= IXGBE_RXCTRL_RXEN;
3702 hw->mac.ops.enable_rx_dma(hw, rxctrl);
3705 static int ixgbe_vlan_rx_add_vid(struct net_device *netdev,
3706 __be16 proto, u16 vid)
3708 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3709 struct ixgbe_hw *hw = &adapter->hw;
3711 /* add VID to filter table */
3712 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), true);
3713 set_bit(vid, adapter->active_vlans);
3718 static int ixgbe_vlan_rx_kill_vid(struct net_device *netdev,
3719 __be16 proto, u16 vid)
3721 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3722 struct ixgbe_hw *hw = &adapter->hw;
3724 /* remove VID from filter table */
3725 hw->mac.ops.set_vfta(&adapter->hw, vid, VMDQ_P(0), false);
3726 clear_bit(vid, adapter->active_vlans);
3732 * ixgbe_vlan_filter_disable - helper to disable hw vlan filtering
3733 * @adapter: driver data
3735 static void ixgbe_vlan_filter_disable(struct ixgbe_adapter *adapter)
3737 struct ixgbe_hw *hw = &adapter->hw;
3740 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3741 vlnctrl &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
3742 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3746 * ixgbe_vlan_filter_enable - helper to enable hw vlan filtering
3747 * @adapter: driver data
3749 static void ixgbe_vlan_filter_enable(struct ixgbe_adapter *adapter)
3751 struct ixgbe_hw *hw = &adapter->hw;
3754 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3755 vlnctrl |= IXGBE_VLNCTRL_VFE;
3756 vlnctrl &= ~IXGBE_VLNCTRL_CFIEN;
3757 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3761 * ixgbe_vlan_strip_disable - helper to disable hw vlan stripping
3762 * @adapter: driver data
3764 static void ixgbe_vlan_strip_disable(struct ixgbe_adapter *adapter)
3766 struct ixgbe_hw *hw = &adapter->hw;
3770 switch (hw->mac.type) {
3771 case ixgbe_mac_82598EB:
3772 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3773 vlnctrl &= ~IXGBE_VLNCTRL_VME;
3774 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3776 case ixgbe_mac_82599EB:
3777 case ixgbe_mac_X540:
3778 for (i = 0; i < adapter->num_rx_queues; i++) {
3779 struct ixgbe_ring *ring = adapter->rx_ring[i];
3781 if (ring->l2_accel_priv)
3784 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3785 vlnctrl &= ~IXGBE_RXDCTL_VME;
3786 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3795 * ixgbe_vlan_strip_enable - helper to enable hw vlan stripping
3796 * @adapter: driver data
3798 static void ixgbe_vlan_strip_enable(struct ixgbe_adapter *adapter)
3800 struct ixgbe_hw *hw = &adapter->hw;
3804 switch (hw->mac.type) {
3805 case ixgbe_mac_82598EB:
3806 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
3807 vlnctrl |= IXGBE_VLNCTRL_VME;
3808 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
3810 case ixgbe_mac_82599EB:
3811 case ixgbe_mac_X540:
3812 for (i = 0; i < adapter->num_rx_queues; i++) {
3813 struct ixgbe_ring *ring = adapter->rx_ring[i];
3815 if (ring->l2_accel_priv)
3818 vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(j));
3819 vlnctrl |= IXGBE_RXDCTL_VME;
3820 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(j), vlnctrl);
3828 static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
3832 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
3834 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
3835 ixgbe_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
3839 * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
3840 * @netdev: network interface device structure
3842 * Writes unicast address list to the RAR table.
3843 * Returns: -ENOMEM on failure/insufficient address space
3844 * 0 on no addresses written
3845 * X on writing X addresses to the RAR table
3847 static int ixgbe_write_uc_addr_list(struct net_device *netdev)
3849 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3850 struct ixgbe_hw *hw = &adapter->hw;
3851 unsigned int rar_entries = hw->mac.num_rar_entries - 1;
3854 /* In SR-IOV/VMDQ modes significantly less RAR entries are available */
3855 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
3856 rar_entries = IXGBE_MAX_PF_MACVLANS - 1;
3858 /* return ENOMEM indicating insufficient memory for addresses */
3859 if (netdev_uc_count(netdev) > rar_entries)
3862 if (!netdev_uc_empty(netdev)) {
3863 struct netdev_hw_addr *ha;
3864 /* return error if we do not support writing to RAR table */
3865 if (!hw->mac.ops.set_rar)
3868 netdev_for_each_uc_addr(ha, netdev) {
3871 hw->mac.ops.set_rar(hw, rar_entries--, ha->addr,
3872 VMDQ_P(0), IXGBE_RAH_AV);
3876 /* write the addresses in reverse order to avoid write combining */
3877 for (; rar_entries > 0 ; rar_entries--)
3878 hw->mac.ops.clear_rar(hw, rar_entries);
3884 * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
3885 * @netdev: network interface device structure
3887 * The set_rx_method entry point is called whenever the unicast/multicast
3888 * address list or the network interface flags are updated. This routine is
3889 * responsible for configuring the hardware for proper unicast, multicast and
3892 void ixgbe_set_rx_mode(struct net_device *netdev)
3894 struct ixgbe_adapter *adapter = netdev_priv(netdev);
3895 struct ixgbe_hw *hw = &adapter->hw;
3896 u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
3899 /* Check for Promiscuous and All Multicast modes */
3901 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
3903 /* set all bits that we expect to always be set */
3904 fctrl &= ~IXGBE_FCTRL_SBP; /* disable store-bad-packets */
3905 fctrl |= IXGBE_FCTRL_BAM;
3906 fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
3907 fctrl |= IXGBE_FCTRL_PMCF;
3909 /* clear the bits we are changing the status of */
3910 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3912 if (netdev->flags & IFF_PROMISC) {
3913 hw->addr_ctrl.user_set_promisc = true;
3914 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
3915 vmolr |= (IXGBE_VMOLR_ROPE | IXGBE_VMOLR_MPE);
3916 /* Only disable hardware filter vlans in promiscuous mode
3917 * if SR-IOV and VMDQ are disabled - otherwise ensure
3918 * that hardware VLAN filters remain enabled.
3920 if (!(adapter->flags & (IXGBE_FLAG_VMDQ_ENABLED |
3921 IXGBE_FLAG_SRIOV_ENABLED)))
3922 ixgbe_vlan_filter_disable(adapter);
3924 ixgbe_vlan_filter_enable(adapter);
3926 if (netdev->flags & IFF_ALLMULTI) {
3927 fctrl |= IXGBE_FCTRL_MPE;
3928 vmolr |= IXGBE_VMOLR_MPE;
3930 ixgbe_vlan_filter_enable(adapter);
3931 hw->addr_ctrl.user_set_promisc = false;
3935 * Write addresses to available RAR registers, if there is not
3936 * sufficient space to store all the addresses then enable
3937 * unicast promiscuous mode
3939 count = ixgbe_write_uc_addr_list(netdev);
3941 fctrl |= IXGBE_FCTRL_UPE;
3942 vmolr |= IXGBE_VMOLR_ROPE;
3945 /* Write addresses to the MTA, if the attempt fails
3946 * then we should just turn on promiscuous mode so
3947 * that we can at least receive multicast traffic
3949 hw->mac.ops.update_mc_addr_list(hw, netdev);
3950 vmolr |= IXGBE_VMOLR_ROMPE;
3952 if (adapter->num_vfs)
3953 ixgbe_restore_vf_multicasts(adapter);
3955 if (hw->mac.type != ixgbe_mac_82598EB) {
3956 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(VMDQ_P(0))) &
3957 ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
3959 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(VMDQ_P(0)), vmolr);
3962 /* This is useful for sniffing bad packets. */
3963 if (adapter->netdev->features & NETIF_F_RXALL) {
3964 /* UPE and MPE will be handled by normal PROMISC logic
3965 * in e1000e_set_rx_mode */
3966 fctrl |= (IXGBE_FCTRL_SBP | /* Receive bad packets */
3967 IXGBE_FCTRL_BAM | /* RX All Bcast Pkts */
3968 IXGBE_FCTRL_PMCF); /* RX All MAC Ctrl Pkts */
3970 fctrl &= ~(IXGBE_FCTRL_DPF);
3971 /* NOTE: VLAN filtering is disabled by setting PROMISC */
3974 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
3976 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3977 ixgbe_vlan_strip_enable(adapter);
3979 ixgbe_vlan_strip_disable(adapter);
3982 static void ixgbe_napi_enable_all(struct ixgbe_adapter *adapter)
3986 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
3987 ixgbe_qv_init_lock(adapter->q_vector[q_idx]);
3988 napi_enable(&adapter->q_vector[q_idx]->napi);
3992 static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
3996 for (q_idx = 0; q_idx < adapter->num_q_vectors; q_idx++) {
3997 napi_disable(&adapter->q_vector[q_idx]->napi);
3998 while (!ixgbe_qv_disable(adapter->q_vector[q_idx])) {
3999 pr_info("QV %d locked\n", q_idx);
4000 usleep_range(1000, 20000);
4005 #ifdef CONFIG_IXGBE_DCB
4007 * ixgbe_configure_dcb - Configure DCB hardware
4008 * @adapter: ixgbe adapter struct
4010 * This is called by the driver on open to configure the DCB hardware.
4011 * This is also called by the gennetlink interface when reconfiguring
4014 static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
4016 struct ixgbe_hw *hw = &adapter->hw;
4017 int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
4019 if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED)) {
4020 if (hw->mac.type == ixgbe_mac_82598EB)
4021 netif_set_gso_max_size(adapter->netdev, 65536);
4025 if (hw->mac.type == ixgbe_mac_82598EB)
4026 netif_set_gso_max_size(adapter->netdev, 32768);
4029 if (adapter->netdev->features & NETIF_F_FCOE_MTU)
4030 max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
4033 /* reconfigure the hardware */
4034 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE) {
4035 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4037 ixgbe_dcb_calculate_tc_credits(hw, &adapter->dcb_cfg, max_frame,
4039 ixgbe_dcb_hw_config(hw, &adapter->dcb_cfg);
4040 } else if (adapter->ixgbe_ieee_ets && adapter->ixgbe_ieee_pfc) {
4041 ixgbe_dcb_hw_ets(&adapter->hw,
4042 adapter->ixgbe_ieee_ets,
4044 ixgbe_dcb_hw_pfc_config(&adapter->hw,
4045 adapter->ixgbe_ieee_pfc->pfc_en,
4046 adapter->ixgbe_ieee_ets->prio_tc);
4049 /* Enable RSS Hash per TC */
4050 if (hw->mac.type != ixgbe_mac_82598EB) {
4052 u16 rss_i = adapter->ring_feature[RING_F_RSS].indices - 1;
4059 /* write msb to all 8 TCs in one write */
4060 IXGBE_WRITE_REG(hw, IXGBE_RQTC, msb * 0x11111111);
4065 /* Additional bittime to account for IXGBE framing */
4066 #define IXGBE_ETH_FRAMING 20
4069 * ixgbe_hpbthresh - calculate high water mark for flow control
4071 * @adapter: board private structure to calculate for
4072 * @pb: packet buffer to calculate
4074 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
4076 struct ixgbe_hw *hw = &adapter->hw;
4077 struct net_device *dev = adapter->netdev;
4078 int link, tc, kb, marker;
4081 /* Calculate max LAN frame size */
4082 tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
4085 /* FCoE traffic class uses FCOE jumbo frames */
4086 if ((dev->features & NETIF_F_FCOE_MTU) &&
4087 (tc < IXGBE_FCOE_JUMBO_FRAME_SIZE) &&
4088 (pb == ixgbe_fcoe_get_tc(adapter)))
4089 tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
4092 /* Calculate delay value for device */
4093 switch (hw->mac.type) {
4094 case ixgbe_mac_X540:
4095 dv_id = IXGBE_DV_X540(link, tc);
4098 dv_id = IXGBE_DV(link, tc);
4102 /* Loopback switch introduces additional latency */
4103 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4104 dv_id += IXGBE_B2BT(tc);
4106 /* Delay value is calculated in bit times convert to KB */
4107 kb = IXGBE_BT2KB(dv_id);
4108 rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
4110 marker = rx_pba - kb;
4112 /* It is possible that the packet buffer is not large enough
4113 * to provide required headroom. In this case throw an error
4114 * to user and a do the best we can.
4117 e_warn(drv, "Packet Buffer(%i) can not provide enough"
4118 "headroom to support flow control."
4119 "Decrease MTU or number of traffic classes\n", pb);
4127 * ixgbe_lpbthresh - calculate low water mark for for flow control
4129 * @adapter: board private structure to calculate for
4130 * @pb: packet buffer to calculate
4132 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter)
4134 struct ixgbe_hw *hw = &adapter->hw;
4135 struct net_device *dev = adapter->netdev;
4139 /* Calculate max LAN frame size */
4140 tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
4142 /* Calculate delay value for device */
4143 switch (hw->mac.type) {
4144 case ixgbe_mac_X540:
4145 dv_id = IXGBE_LOW_DV_X540(tc);
4148 dv_id = IXGBE_LOW_DV(tc);
4152 /* Delay value is calculated in bit times convert to KB */
4153 return IXGBE_BT2KB(dv_id);
4157 * ixgbe_pbthresh_setup - calculate and setup high low water marks
4159 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
4161 struct ixgbe_hw *hw = &adapter->hw;
4162 int num_tc = netdev_get_num_tc(adapter->netdev);
4168 hw->fc.low_water = ixgbe_lpbthresh(adapter);
4170 for (i = 0; i < num_tc; i++) {
4171 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
4173 /* Low water marks must not be larger than high water marks */
4174 if (hw->fc.low_water > hw->fc.high_water[i])
4175 hw->fc.low_water = 0;
4179 static void ixgbe_configure_pb(struct ixgbe_adapter *adapter)
4181 struct ixgbe_hw *hw = &adapter->hw;
4183 u8 tc = netdev_get_num_tc(adapter->netdev);
4185 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE ||
4186 adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
4187 hdrm = 32 << adapter->fdir_pballoc;
4191 hw->mac.ops.set_rxpba(hw, tc, hdrm, PBA_STRATEGY_EQUAL);
4192 ixgbe_pbthresh_setup(adapter);
4195 static void ixgbe_fdir_filter_restore(struct ixgbe_adapter *adapter)
4197 struct ixgbe_hw *hw = &adapter->hw;
4198 struct hlist_node *node2;
4199 struct ixgbe_fdir_filter *filter;
4201 spin_lock(&adapter->fdir_perfect_lock);
4203 if (!hlist_empty(&adapter->fdir_filter_list))
4204 ixgbe_fdir_set_input_mask_82599(hw, &adapter->fdir_mask);
4206 hlist_for_each_entry_safe(filter, node2,
4207 &adapter->fdir_filter_list, fdir_node) {
4208 ixgbe_fdir_write_perfect_filter_82599(hw,
4211 (filter->action == IXGBE_FDIR_DROP_QUEUE) ?
4212 IXGBE_FDIR_DROP_QUEUE :
4213 adapter->rx_ring[filter->action]->reg_idx);
4216 spin_unlock(&adapter->fdir_perfect_lock);
4219 static void ixgbe_macvlan_set_rx_mode(struct net_device *dev, unsigned int pool,
4220 struct ixgbe_adapter *adapter)
4222 struct ixgbe_hw *hw = &adapter->hw;
4225 /* No unicast promiscuous support for VMDQ devices. */
4226 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(pool));
4227 vmolr |= (IXGBE_VMOLR_ROMPE | IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE);
4229 /* clear the affected bit */
4230 vmolr &= ~IXGBE_VMOLR_MPE;
4232 if (dev->flags & IFF_ALLMULTI) {
4233 vmolr |= IXGBE_VMOLR_MPE;
4235 vmolr |= IXGBE_VMOLR_ROMPE;
4236 hw->mac.ops.update_mc_addr_list(hw, dev);
4238 ixgbe_write_uc_addr_list(adapter->netdev);
4239 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(pool), vmolr);
4242 static void ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
4245 struct ixgbe_hw *hw = &adapter->hw;
4248 entry = hw->mac.num_rar_entries - pool;
4249 hw->mac.ops.set_rar(hw, entry, addr, VMDQ_P(pool), IXGBE_RAH_AV);
4252 static void ixgbe_fwd_psrtype(struct ixgbe_fwd_adapter *vadapter)
4254 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4255 int rss_i = adapter->num_rx_queues_per_pool;
4256 struct ixgbe_hw *hw = &adapter->hw;
4257 u16 pool = vadapter->pool;
4258 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
4259 IXGBE_PSRTYPE_UDPHDR |
4260 IXGBE_PSRTYPE_IPV4HDR |
4261 IXGBE_PSRTYPE_L2HDR |
4262 IXGBE_PSRTYPE_IPV6HDR;
4264 if (hw->mac.type == ixgbe_mac_82598EB)
4272 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(VMDQ_P(pool)), psrtype);
4276 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
4277 * @rx_ring: ring to free buffers from
4279 static void ixgbe_clean_rx_ring(struct ixgbe_ring *rx_ring)
4281 struct device *dev = rx_ring->dev;
4285 /* ring already cleared, nothing to do */
4286 if (!rx_ring->rx_buffer_info)
4289 /* Free all the Rx ring sk_buffs */
4290 for (i = 0; i < rx_ring->count; i++) {
4291 struct ixgbe_rx_buffer *rx_buffer;
4293 rx_buffer = &rx_ring->rx_buffer_info[i];
4294 if (rx_buffer->skb) {
4295 struct sk_buff *skb = rx_buffer->skb;
4296 if (IXGBE_CB(skb)->page_released) {
4299 ixgbe_rx_bufsz(rx_ring),
4301 IXGBE_CB(skb)->page_released = false;
4305 rx_buffer->skb = NULL;
4307 dma_unmap_page(dev, rx_buffer->dma,
4308 ixgbe_rx_pg_size(rx_ring),
4311 if (rx_buffer->page)
4312 __free_pages(rx_buffer->page,
4313 ixgbe_rx_pg_order(rx_ring));
4314 rx_buffer->page = NULL;
4317 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
4318 memset(rx_ring->rx_buffer_info, 0, size);
4320 /* Zero out the descriptor ring */
4321 memset(rx_ring->desc, 0, rx_ring->size);
4323 rx_ring->next_to_alloc = 0;
4324 rx_ring->next_to_clean = 0;
4325 rx_ring->next_to_use = 0;
4328 static void ixgbe_disable_fwd_ring(struct ixgbe_fwd_adapter *vadapter,
4329 struct ixgbe_ring *rx_ring)
4331 struct ixgbe_adapter *adapter = vadapter->real_adapter;
4332 int index = rx_ring->queue_index + vadapter->rx_base_queue;
4334 /* shutdown specific queue receive and wait for dma to settle */
4335 ixgbe_disable_rx_queue(adapter, rx_ring);
4336 usleep_range(10000, 20000);
4337 ixgbe_irq_disable_queues(adapter, ((u64)1 << index));
4338 ixgbe_clean_rx_ring(rx_ring);
4339 rx_ring->l2_accel_priv = NULL;
4342 static int ixgbe_fwd_ring_down(struct net_device *vdev,
4343 struct ixgbe_fwd_adapter *accel)
4345 struct ixgbe_adapter *adapter = accel->real_adapter;
4346 unsigned int rxbase = accel->rx_base_queue;
4347 unsigned int txbase = accel->tx_base_queue;
4350 netif_tx_stop_all_queues(vdev);
4352 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4353 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4354 adapter->rx_ring[rxbase + i]->netdev = adapter->netdev;
4357 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4358 adapter->tx_ring[txbase + i]->l2_accel_priv = NULL;
4359 adapter->tx_ring[txbase + i]->netdev = adapter->netdev;
4366 static int ixgbe_fwd_ring_up(struct net_device *vdev,
4367 struct ixgbe_fwd_adapter *accel)
4369 struct ixgbe_adapter *adapter = accel->real_adapter;
4370 unsigned int rxbase, txbase, queues;
4371 int i, baseq, err = 0;
4373 if (!test_bit(accel->pool, &adapter->fwd_bitmask))
4376 baseq = accel->pool * adapter->num_rx_queues_per_pool;
4377 netdev_dbg(vdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
4378 accel->pool, adapter->num_rx_pools,
4379 baseq, baseq + adapter->num_rx_queues_per_pool,
4380 adapter->fwd_bitmask);
4382 accel->netdev = vdev;
4383 accel->rx_base_queue = rxbase = baseq;
4384 accel->tx_base_queue = txbase = baseq;
4386 for (i = 0; i < adapter->num_rx_queues_per_pool; i++)
4387 ixgbe_disable_fwd_ring(accel, adapter->rx_ring[rxbase + i]);
4389 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4390 adapter->rx_ring[rxbase + i]->netdev = vdev;
4391 adapter->rx_ring[rxbase + i]->l2_accel_priv = accel;
4392 ixgbe_configure_rx_ring(adapter, adapter->rx_ring[rxbase + i]);
4395 for (i = 0; i < adapter->num_rx_queues_per_pool; i++) {
4396 adapter->tx_ring[txbase + i]->netdev = vdev;
4397 adapter->tx_ring[txbase + i]->l2_accel_priv = accel;
4400 queues = min_t(unsigned int,
4401 adapter->num_rx_queues_per_pool, vdev->num_tx_queues);
4402 err = netif_set_real_num_tx_queues(vdev, queues);
4406 err = netif_set_real_num_rx_queues(vdev, queues);
4410 if (is_valid_ether_addr(vdev->dev_addr))
4411 ixgbe_add_mac_filter(adapter, vdev->dev_addr, accel->pool);
4413 ixgbe_fwd_psrtype(accel);
4414 ixgbe_macvlan_set_rx_mode(vdev, accel->pool, adapter);
4417 ixgbe_fwd_ring_down(vdev, accel);
4421 static void ixgbe_configure_dfwd(struct ixgbe_adapter *adapter)
4423 struct net_device *upper;
4424 struct list_head *iter;
4427 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4428 if (netif_is_macvlan(upper)) {
4429 struct macvlan_dev *dfwd = netdev_priv(upper);
4430 struct ixgbe_fwd_adapter *vadapter = dfwd->fwd_priv;
4432 if (dfwd->fwd_priv) {
4433 err = ixgbe_fwd_ring_up(upper, vadapter);
4441 static void ixgbe_configure(struct ixgbe_adapter *adapter)
4443 struct ixgbe_hw *hw = &adapter->hw;
4445 ixgbe_configure_pb(adapter);
4446 #ifdef CONFIG_IXGBE_DCB
4447 ixgbe_configure_dcb(adapter);
4450 * We must restore virtualization before VLANs or else
4451 * the VLVF registers will not be populated
4453 ixgbe_configure_virtualization(adapter);
4455 ixgbe_set_rx_mode(adapter->netdev);
4456 ixgbe_restore_vlan(adapter);
4458 switch (hw->mac.type) {
4459 case ixgbe_mac_82599EB:
4460 case ixgbe_mac_X540:
4461 hw->mac.ops.disable_rx_buff(hw);
4467 if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
4468 ixgbe_init_fdir_signature_82599(&adapter->hw,
4469 adapter->fdir_pballoc);
4470 } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
4471 ixgbe_init_fdir_perfect_82599(&adapter->hw,
4472 adapter->fdir_pballoc);
4473 ixgbe_fdir_filter_restore(adapter);
4476 switch (hw->mac.type) {
4477 case ixgbe_mac_82599EB:
4478 case ixgbe_mac_X540:
4479 hw->mac.ops.enable_rx_buff(hw);
4486 /* configure FCoE L2 filters, redirection table, and Rx control */
4487 ixgbe_configure_fcoe(adapter);
4489 #endif /* IXGBE_FCOE */
4490 ixgbe_configure_tx(adapter);
4491 ixgbe_configure_rx(adapter);
4492 ixgbe_configure_dfwd(adapter);
4495 static inline bool ixgbe_is_sfp(struct ixgbe_hw *hw)
4497 switch (hw->phy.type) {
4498 case ixgbe_phy_sfp_avago:
4499 case ixgbe_phy_sfp_ftl:
4500 case ixgbe_phy_sfp_intel:
4501 case ixgbe_phy_sfp_unknown:
4502 case ixgbe_phy_sfp_passive_tyco:
4503 case ixgbe_phy_sfp_passive_unknown:
4504 case ixgbe_phy_sfp_active_unknown:
4505 case ixgbe_phy_sfp_ftl_active:
4506 case ixgbe_phy_qsfp_passive_unknown:
4507 case ixgbe_phy_qsfp_active_unknown:
4508 case ixgbe_phy_qsfp_intel:
4509 case ixgbe_phy_qsfp_unknown:
4512 if (hw->mac.type == ixgbe_mac_82598EB)
4520 * ixgbe_sfp_link_config - set up SFP+ link
4521 * @adapter: pointer to private adapter struct
4523 static void ixgbe_sfp_link_config(struct ixgbe_adapter *adapter)
4526 * We are assuming the worst case scenario here, and that
4527 * is that an SFP was inserted/removed after the reset
4528 * but before SFP detection was enabled. As such the best
4529 * solution is to just start searching as soon as we start
4531 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
4532 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
4534 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
4538 * ixgbe_non_sfp_link_config - set up non-SFP+ link
4539 * @hw: pointer to private hardware struct
4541 * Returns 0 on success, negative on failure
4543 static int ixgbe_non_sfp_link_config(struct ixgbe_hw *hw)
4546 bool autoneg, link_up = false;
4547 u32 ret = IXGBE_ERR_LINK_SETUP;
4549 if (hw->mac.ops.check_link)
4550 ret = hw->mac.ops.check_link(hw, &speed, &link_up, false);
4555 speed = hw->phy.autoneg_advertised;
4556 if ((!speed) && (hw->mac.ops.get_link_capabilities))
4557 ret = hw->mac.ops.get_link_capabilities(hw, &speed,
4562 if (hw->mac.ops.setup_link)
4563 ret = hw->mac.ops.setup_link(hw, speed, link_up);
4568 static void ixgbe_setup_gpie(struct ixgbe_adapter *adapter)
4570 struct ixgbe_hw *hw = &adapter->hw;
4573 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
4574 gpie = IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_PBA_SUPPORT |
4576 gpie |= IXGBE_GPIE_EIAME;
4578 * use EIAM to auto-mask when MSI-X interrupt is asserted
4579 * this saves a register write for every interrupt
4581 switch (hw->mac.type) {
4582 case ixgbe_mac_82598EB:
4583 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4585 case ixgbe_mac_82599EB:
4586 case ixgbe_mac_X540:
4588 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(0), 0xFFFFFFFF);
4589 IXGBE_WRITE_REG(hw, IXGBE_EIAM_EX(1), 0xFFFFFFFF);
4593 /* legacy interrupts, use EIAM to auto-mask when reading EICR,
4594 * specifically only auto mask tx and rx interrupts */
4595 IXGBE_WRITE_REG(hw, IXGBE_EIAM, IXGBE_EICS_RTX_QUEUE);
4598 /* XXX: to interrupt immediately for EICS writes, enable this */
4599 /* gpie |= IXGBE_GPIE_EIMEN; */
4601 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
4602 gpie &= ~IXGBE_GPIE_VTMODE_MASK;
4604 switch (adapter->ring_feature[RING_F_VMDQ].mask) {
4605 case IXGBE_82599_VMDQ_8Q_MASK:
4606 gpie |= IXGBE_GPIE_VTMODE_16;
4608 case IXGBE_82599_VMDQ_4Q_MASK:
4609 gpie |= IXGBE_GPIE_VTMODE_32;
4612 gpie |= IXGBE_GPIE_VTMODE_64;
4617 /* Enable Thermal over heat sensor interrupt */
4618 if (adapter->flags2 & IXGBE_FLAG2_TEMP_SENSOR_CAPABLE) {
4619 switch (adapter->hw.mac.type) {
4620 case ixgbe_mac_82599EB:
4621 gpie |= IXGBE_SDP0_GPIEN;
4623 case ixgbe_mac_X540:
4624 gpie |= IXGBE_EIMS_TS;
4631 /* Enable fan failure interrupt */
4632 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE)
4633 gpie |= IXGBE_SDP1_GPIEN;
4635 if (hw->mac.type == ixgbe_mac_82599EB) {
4636 gpie |= IXGBE_SDP1_GPIEN;
4637 gpie |= IXGBE_SDP2_GPIEN;
4640 IXGBE_WRITE_REG(hw, IXGBE_GPIE, gpie);
4643 static void ixgbe_up_complete(struct ixgbe_adapter *adapter)
4645 struct ixgbe_hw *hw = &adapter->hw;
4646 struct net_device *upper;
4647 struct list_head *iter;
4651 ixgbe_get_hw_control(adapter);
4652 ixgbe_setup_gpie(adapter);
4654 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
4655 ixgbe_configure_msix(adapter);
4657 ixgbe_configure_msi_and_legacy(adapter);
4659 /* enable the optics for 82599 SFP+ fiber */
4660 if (hw->mac.ops.enable_tx_laser)
4661 hw->mac.ops.enable_tx_laser(hw);
4663 smp_mb__before_clear_bit();
4664 clear_bit(__IXGBE_DOWN, &adapter->state);
4665 ixgbe_napi_enable_all(adapter);
4667 if (ixgbe_is_sfp(hw)) {
4668 ixgbe_sfp_link_config(adapter);
4670 err = ixgbe_non_sfp_link_config(hw);
4672 e_err(probe, "link_config FAILED %d\n", err);
4675 /* clear any pending interrupts, may auto mask */
4676 IXGBE_READ_REG(hw, IXGBE_EICR);
4677 ixgbe_irq_enable(adapter, true, true);
4680 * If this adapter has a fan, check to see if we had a failure
4681 * before we enabled the interrupt.
4683 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
4684 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
4685 if (esdp & IXGBE_ESDP_SDP1)
4686 e_crit(drv, "Fan has stopped, replace the adapter\n");
4689 /* enable transmits */
4690 netif_tx_start_all_queues(adapter->netdev);
4692 /* enable any upper devices */
4693 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4694 if (netif_is_macvlan(upper)) {
4695 struct macvlan_dev *vlan = netdev_priv(upper);
4698 netif_tx_start_all_queues(upper);
4702 /* bring the link up in the watchdog, this could race with our first
4703 * link up interrupt but shouldn't be a problem */
4704 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
4705 adapter->link_check_timeout = jiffies;
4706 mod_timer(&adapter->service_timer, jiffies);
4708 /* Set PF Reset Done bit so PF/VF Mail Ops can work */
4709 ctrl_ext = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
4710 ctrl_ext |= IXGBE_CTRL_EXT_PFRSTD;
4711 IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl_ext);
4714 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
4716 WARN_ON(in_interrupt());
4717 /* put off any impending NetWatchDogTimeout */
4718 adapter->netdev->trans_start = jiffies;
4720 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
4721 usleep_range(1000, 2000);
4722 ixgbe_down(adapter);
4724 * If SR-IOV enabled then wait a bit before bringing the adapter
4725 * back up to give the VFs time to respond to the reset. The
4726 * two second wait is based upon the watchdog timer cycle in
4729 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
4732 clear_bit(__IXGBE_RESETTING, &adapter->state);
4735 void ixgbe_up(struct ixgbe_adapter *adapter)
4737 /* hardware has been reset, we need to reload some things */
4738 ixgbe_configure(adapter);
4740 ixgbe_up_complete(adapter);
4743 void ixgbe_reset(struct ixgbe_adapter *adapter)
4745 struct ixgbe_hw *hw = &adapter->hw;
4748 if (ixgbe_removed(hw->hw_addr))
4750 /* lock SFP init bit to prevent race conditions with the watchdog */
4751 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
4752 usleep_range(1000, 2000);
4754 /* clear all SFP and link config related flags while holding SFP_INIT */
4755 adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
4756 IXGBE_FLAG2_SFP_NEEDS_RESET);
4757 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
4759 err = hw->mac.ops.init_hw(hw);
4762 case IXGBE_ERR_SFP_NOT_PRESENT:
4763 case IXGBE_ERR_SFP_NOT_SUPPORTED:
4765 case IXGBE_ERR_MASTER_REQUESTS_PENDING:
4766 e_dev_err("master disable timed out\n");
4768 case IXGBE_ERR_EEPROM_VERSION:
4769 /* We are running on a pre-production device, log a warning */
4770 e_dev_warn("This device is a pre-production adapter/LOM. "
4771 "Please be aware there may be issues associated with "
4772 "your hardware. If you are experiencing problems "
4773 "please contact your Intel or hardware "
4774 "representative who provided you with this "
4778 e_dev_err("Hardware Error: %d\n", err);
4781 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
4783 /* reprogram the RAR[0] in case user changed it. */
4784 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, VMDQ_P(0), IXGBE_RAH_AV);
4786 /* update SAN MAC vmdq pool selection */
4787 if (hw->mac.san_mac_rar_index)
4788 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
4790 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
4791 ixgbe_ptp_reset(adapter);
4795 * ixgbe_clean_tx_ring - Free Tx Buffers
4796 * @tx_ring: ring to be cleaned
4798 static void ixgbe_clean_tx_ring(struct ixgbe_ring *tx_ring)
4800 struct ixgbe_tx_buffer *tx_buffer_info;
4804 /* ring already cleared, nothing to do */
4805 if (!tx_ring->tx_buffer_info)
4808 /* Free all the Tx ring sk_buffs */
4809 for (i = 0; i < tx_ring->count; i++) {
4810 tx_buffer_info = &tx_ring->tx_buffer_info[i];
4811 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
4814 netdev_tx_reset_queue(txring_txq(tx_ring));
4816 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
4817 memset(tx_ring->tx_buffer_info, 0, size);
4819 /* Zero out the descriptor ring */
4820 memset(tx_ring->desc, 0, tx_ring->size);
4822 tx_ring->next_to_use = 0;
4823 tx_ring->next_to_clean = 0;
4827 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
4828 * @adapter: board private structure
4830 static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
4834 for (i = 0; i < adapter->num_rx_queues; i++)
4835 ixgbe_clean_rx_ring(adapter->rx_ring[i]);
4839 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
4840 * @adapter: board private structure
4842 static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
4846 for (i = 0; i < adapter->num_tx_queues; i++)
4847 ixgbe_clean_tx_ring(adapter->tx_ring[i]);
4850 static void ixgbe_fdir_filter_exit(struct ixgbe_adapter *adapter)
4852 struct hlist_node *node2;
4853 struct ixgbe_fdir_filter *filter;
4855 spin_lock(&adapter->fdir_perfect_lock);
4857 hlist_for_each_entry_safe(filter, node2,
4858 &adapter->fdir_filter_list, fdir_node) {
4859 hlist_del(&filter->fdir_node);
4862 adapter->fdir_filter_count = 0;
4864 spin_unlock(&adapter->fdir_perfect_lock);
4867 void ixgbe_down(struct ixgbe_adapter *adapter)
4869 struct net_device *netdev = adapter->netdev;
4870 struct ixgbe_hw *hw = &adapter->hw;
4871 struct net_device *upper;
4872 struct list_head *iter;
4876 /* signal that we are down to the interrupt handler */
4877 if (test_and_set_bit(__IXGBE_DOWN, &adapter->state))
4878 return; /* do nothing if already down */
4880 /* disable receives */
4881 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
4882 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
4884 /* disable all enabled rx queues */
4885 for (i = 0; i < adapter->num_rx_queues; i++)
4886 /* this call also flushes the previous write */
4887 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
4889 usleep_range(10000, 20000);
4891 netif_tx_stop_all_queues(netdev);
4893 /* call carrier off first to avoid false dev_watchdog timeouts */
4894 netif_carrier_off(netdev);
4895 netif_tx_disable(netdev);
4897 /* disable any upper devices */
4898 netdev_for_each_all_upper_dev_rcu(adapter->netdev, upper, iter) {
4899 if (netif_is_macvlan(upper)) {
4900 struct macvlan_dev *vlan = netdev_priv(upper);
4902 if (vlan->fwd_priv) {
4903 netif_tx_stop_all_queues(upper);
4904 netif_carrier_off(upper);
4905 netif_tx_disable(upper);
4910 ixgbe_irq_disable(adapter);
4912 ixgbe_napi_disable_all(adapter);
4914 adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
4915 IXGBE_FLAG2_RESET_REQUESTED);
4916 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
4918 del_timer_sync(&adapter->service_timer);
4920 if (adapter->num_vfs) {
4921 /* Clear EITR Select mapping */
4922 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
4924 /* Mark all the VFs as inactive */
4925 for (i = 0 ; i < adapter->num_vfs; i++)
4926 adapter->vfinfo[i].clear_to_send = false;
4928 /* ping all the active vfs to let them know we are going down */
4929 ixgbe_ping_all_vfs(adapter);
4931 /* Disable all VFTE/VFRE TX/RX */
4932 ixgbe_disable_tx_rx(adapter);
4935 /* disable transmits in the hardware now that interrupts are off */
4936 for (i = 0; i < adapter->num_tx_queues; i++) {
4937 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
4938 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
4941 /* Disable the Tx DMA engine on 82599 and X540 */
4942 switch (hw->mac.type) {
4943 case ixgbe_mac_82599EB:
4944 case ixgbe_mac_X540:
4945 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
4946 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
4947 ~IXGBE_DMATXCTL_TE));
4953 if (!pci_channel_offline(adapter->pdev))
4954 ixgbe_reset(adapter);
4956 /* power down the optics for 82599 SFP+ fiber */
4957 if (hw->mac.ops.disable_tx_laser)
4958 hw->mac.ops.disable_tx_laser(hw);
4960 ixgbe_clean_all_tx_rings(adapter);
4961 ixgbe_clean_all_rx_rings(adapter);
4963 #ifdef CONFIG_IXGBE_DCA
4964 /* since we reset the hardware DCA settings were cleared */
4965 ixgbe_setup_dca(adapter);
4970 * ixgbe_tx_timeout - Respond to a Tx Hang
4971 * @netdev: network interface device structure
4973 static void ixgbe_tx_timeout(struct net_device *netdev)
4975 struct ixgbe_adapter *adapter = netdev_priv(netdev);
4977 /* Do the reset outside of interrupt context */
4978 ixgbe_tx_timeout_reset(adapter);
4982 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
4983 * @adapter: board private structure to initialize
4985 * ixgbe_sw_init initializes the Adapter private data structure.
4986 * Fields are initialized based on PCI device information and
4987 * OS network device settings (MTU size).
4989 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
4991 struct ixgbe_hw *hw = &adapter->hw;
4992 struct pci_dev *pdev = adapter->pdev;
4993 unsigned int rss, fdir;
4995 #ifdef CONFIG_IXGBE_DCB
4997 struct tc_configuration *tc;
5000 /* PCI config space info */
5002 hw->vendor_id = pdev->vendor;
5003 hw->device_id = pdev->device;
5004 hw->revision_id = pdev->revision;
5005 hw->subsystem_vendor_id = pdev->subsystem_vendor;
5006 hw->subsystem_device_id = pdev->subsystem_device;
5008 /* Set common capability flags and settings */
5009 rss = min_t(int, IXGBE_MAX_RSS_INDICES, num_online_cpus());
5010 adapter->ring_feature[RING_F_RSS].limit = rss;
5011 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
5012 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
5013 adapter->max_q_vectors = MAX_Q_VECTORS_82599;
5014 adapter->atr_sample_rate = 20;
5015 fdir = min_t(int, IXGBE_MAX_FDIR_INDICES, num_online_cpus());
5016 adapter->ring_feature[RING_F_FDIR].limit = fdir;
5017 adapter->fdir_pballoc = IXGBE_FDIR_PBALLOC_64K;
5018 #ifdef CONFIG_IXGBE_DCA
5019 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
5022 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
5023 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5024 #ifdef CONFIG_IXGBE_DCB
5025 /* Default traffic class to use for FCoE */
5026 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
5027 #endif /* CONFIG_IXGBE_DCB */
5028 #endif /* IXGBE_FCOE */
5030 /* Set MAC specific capability flags and exceptions */
5031 switch (hw->mac.type) {
5032 case ixgbe_mac_82598EB:
5033 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
5034 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
5036 if (hw->device_id == IXGBE_DEV_ID_82598AT)
5037 adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
5039 adapter->max_q_vectors = MAX_Q_VECTORS_82598;
5040 adapter->ring_feature[RING_F_FDIR].limit = 0;
5041 adapter->atr_sample_rate = 0;
5042 adapter->fdir_pballoc = 0;
5044 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5045 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5046 #ifdef CONFIG_IXGBE_DCB
5047 adapter->fcoe.up = 0;
5048 #endif /* IXGBE_DCB */
5049 #endif /* IXGBE_FCOE */
5051 case ixgbe_mac_82599EB:
5052 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
5053 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5055 case ixgbe_mac_X540:
5056 fwsm = IXGBE_READ_REG(hw, IXGBE_FWSM);
5057 if (fwsm & IXGBE_FWSM_TS_ENABLED)
5058 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
5065 /* FCoE support exists, always init the FCoE lock */
5066 spin_lock_init(&adapter->fcoe.lock);
5069 /* n-tuple support exists, always init our spinlock */
5070 spin_lock_init(&adapter->fdir_perfect_lock);
5072 #ifdef CONFIG_IXGBE_DCB
5073 switch (hw->mac.type) {
5074 case ixgbe_mac_X540:
5075 adapter->dcb_cfg.num_tcs.pg_tcs = X540_TRAFFIC_CLASS;
5076 adapter->dcb_cfg.num_tcs.pfc_tcs = X540_TRAFFIC_CLASS;
5079 adapter->dcb_cfg.num_tcs.pg_tcs = MAX_TRAFFIC_CLASS;
5080 adapter->dcb_cfg.num_tcs.pfc_tcs = MAX_TRAFFIC_CLASS;
5084 /* Configure DCB traffic classes */
5085 for (j = 0; j < MAX_TRAFFIC_CLASS; j++) {
5086 tc = &adapter->dcb_cfg.tc_config[j];
5087 tc->path[DCB_TX_CONFIG].bwg_id = 0;
5088 tc->path[DCB_TX_CONFIG].bwg_percent = 12 + (j & 1);
5089 tc->path[DCB_RX_CONFIG].bwg_id = 0;
5090 tc->path[DCB_RX_CONFIG].bwg_percent = 12 + (j & 1);
5091 tc->dcb_pfc = pfc_disabled;
5094 /* Initialize default user to priority mapping, UPx->TC0 */
5095 tc = &adapter->dcb_cfg.tc_config[0];
5096 tc->path[DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
5097 tc->path[DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
5099 adapter->dcb_cfg.bw_percentage[DCB_TX_CONFIG][0] = 100;
5100 adapter->dcb_cfg.bw_percentage[DCB_RX_CONFIG][0] = 100;
5101 adapter->dcb_cfg.pfc_mode_enable = false;
5102 adapter->dcb_set_bitmap = 0x00;
5103 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
5104 memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
5105 sizeof(adapter->temp_dcb_cfg));
5109 /* default flow control settings */
5110 hw->fc.requested_mode = ixgbe_fc_full;
5111 hw->fc.current_mode = ixgbe_fc_full; /* init for ethtool output */
5112 ixgbe_pbthresh_setup(adapter);
5113 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
5114 hw->fc.send_xon = true;
5115 hw->fc.disable_fc_autoneg = ixgbe_device_supports_autoneg_fc(hw);
5117 #ifdef CONFIG_PCI_IOV
5119 e_dev_warn("Enabling SR-IOV VFs using the max_vfs module parameter is deprecated - please use the pci sysfs interface instead.\n");
5121 /* assign number of SR-IOV VFs */
5122 if (hw->mac.type != ixgbe_mac_82598EB) {
5123 if (max_vfs > IXGBE_MAX_VFS_DRV_LIMIT) {
5124 adapter->num_vfs = 0;
5125 e_dev_warn("max_vfs parameter out of range. Not assigning any SR-IOV VFs\n");
5127 adapter->num_vfs = max_vfs;
5130 #endif /* CONFIG_PCI_IOV */
5132 /* enable itr by default in dynamic mode */
5133 adapter->rx_itr_setting = 1;
5134 adapter->tx_itr_setting = 1;
5136 /* set default ring sizes */
5137 adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
5138 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5140 /* set default work limits */
5141 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5143 /* initialize eeprom parameters */
5144 if (ixgbe_init_eeprom_params_generic(hw)) {
5145 e_dev_err("EEPROM initialization failed\n");
5149 /* PF holds first pool slot */
5150 set_bit(0, &adapter->fwd_bitmask);
5151 set_bit(__IXGBE_DOWN, &adapter->state);
5157 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
5158 * @tx_ring: tx descriptor ring (for a specific queue) to setup
5160 * Return 0 on success, negative on failure
5162 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
5164 struct device *dev = tx_ring->dev;
5165 int orig_node = dev_to_node(dev);
5169 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
5171 if (tx_ring->q_vector)
5172 numa_node = tx_ring->q_vector->numa_node;
5174 tx_ring->tx_buffer_info = vzalloc_node(size, numa_node);
5175 if (!tx_ring->tx_buffer_info)
5176 tx_ring->tx_buffer_info = vzalloc(size);
5177 if (!tx_ring->tx_buffer_info)
5180 u64_stats_init(&tx_ring->syncp);
5182 /* round up to nearest 4K */
5183 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
5184 tx_ring->size = ALIGN(tx_ring->size, 4096);
5186 set_dev_node(dev, numa_node);
5187 tx_ring->desc = dma_alloc_coherent(dev,
5191 set_dev_node(dev, orig_node);
5193 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
5194 &tx_ring->dma, GFP_KERNEL);
5198 tx_ring->next_to_use = 0;
5199 tx_ring->next_to_clean = 0;
5203 vfree(tx_ring->tx_buffer_info);
5204 tx_ring->tx_buffer_info = NULL;
5205 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
5210 * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
5211 * @adapter: board private structure
5213 * If this function returns with an error, then it's possible one or
5214 * more of the rings is populated (while the rest are not). It is the
5215 * callers duty to clean those orphaned rings.
5217 * Return 0 on success, negative on failure
5219 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
5223 for (i = 0; i < adapter->num_tx_queues; i++) {
5224 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
5228 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
5234 /* rewind the index freeing the rings as we go */
5236 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5241 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
5242 * @rx_ring: rx descriptor ring (for a specific queue) to setup
5244 * Returns 0 on success, negative on failure
5246 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
5248 struct device *dev = rx_ring->dev;
5249 int orig_node = dev_to_node(dev);
5253 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
5255 if (rx_ring->q_vector)
5256 numa_node = rx_ring->q_vector->numa_node;
5258 rx_ring->rx_buffer_info = vzalloc_node(size, numa_node);
5259 if (!rx_ring->rx_buffer_info)
5260 rx_ring->rx_buffer_info = vzalloc(size);
5261 if (!rx_ring->rx_buffer_info)
5264 u64_stats_init(&rx_ring->syncp);
5266 /* Round up to nearest 4K */
5267 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
5268 rx_ring->size = ALIGN(rx_ring->size, 4096);
5270 set_dev_node(dev, numa_node);
5271 rx_ring->desc = dma_alloc_coherent(dev,
5275 set_dev_node(dev, orig_node);
5277 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
5278 &rx_ring->dma, GFP_KERNEL);
5282 rx_ring->next_to_clean = 0;
5283 rx_ring->next_to_use = 0;
5287 vfree(rx_ring->rx_buffer_info);
5288 rx_ring->rx_buffer_info = NULL;
5289 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
5294 * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
5295 * @adapter: board private structure
5297 * If this function returns with an error, then it's possible one or
5298 * more of the rings is populated (while the rest are not). It is the
5299 * callers duty to clean those orphaned rings.
5301 * Return 0 on success, negative on failure
5303 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
5307 for (i = 0; i < adapter->num_rx_queues; i++) {
5308 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
5312 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
5317 err = ixgbe_setup_fcoe_ddp_resources(adapter);
5322 /* rewind the index freeing the rings as we go */
5324 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5329 * ixgbe_free_tx_resources - Free Tx Resources per Queue
5330 * @tx_ring: Tx descriptor ring for a specific queue
5332 * Free all transmit software resources
5334 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
5336 ixgbe_clean_tx_ring(tx_ring);
5338 vfree(tx_ring->tx_buffer_info);
5339 tx_ring->tx_buffer_info = NULL;
5341 /* if not set, then don't free */
5345 dma_free_coherent(tx_ring->dev, tx_ring->size,
5346 tx_ring->desc, tx_ring->dma);
5348 tx_ring->desc = NULL;
5352 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
5353 * @adapter: board private structure
5355 * Free all transmit software resources
5357 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
5361 for (i = 0; i < adapter->num_tx_queues; i++)
5362 if (adapter->tx_ring[i]->desc)
5363 ixgbe_free_tx_resources(adapter->tx_ring[i]);
5367 * ixgbe_free_rx_resources - Free Rx Resources
5368 * @rx_ring: ring to clean the resources from
5370 * Free all receive software resources
5372 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
5374 ixgbe_clean_rx_ring(rx_ring);
5376 vfree(rx_ring->rx_buffer_info);
5377 rx_ring->rx_buffer_info = NULL;
5379 /* if not set, then don't free */
5383 dma_free_coherent(rx_ring->dev, rx_ring->size,
5384 rx_ring->desc, rx_ring->dma);
5386 rx_ring->desc = NULL;
5390 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
5391 * @adapter: board private structure
5393 * Free all receive software resources
5395 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
5400 ixgbe_free_fcoe_ddp_resources(adapter);
5403 for (i = 0; i < adapter->num_rx_queues; i++)
5404 if (adapter->rx_ring[i]->desc)
5405 ixgbe_free_rx_resources(adapter->rx_ring[i]);
5409 * ixgbe_change_mtu - Change the Maximum Transfer Unit
5410 * @netdev: network interface device structure
5411 * @new_mtu: new value for maximum frame size
5413 * Returns 0 on success, negative on failure
5415 static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
5417 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5418 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5420 /* MTU < 68 is an error and causes problems on some kernels */
5421 if ((new_mtu < 68) || (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
5425 * For 82599EB we cannot allow legacy VFs to enable their receive
5426 * paths when MTU greater than 1500 is configured. So display a
5427 * warning that legacy VFs will be disabled.
5429 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) &&
5430 (adapter->hw.mac.type == ixgbe_mac_82599EB) &&
5431 (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)))
5432 e_warn(probe, "Setting MTU > 1500 will disable legacy VFs\n");
5434 e_info(probe, "changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5436 /* must set new MTU before calling down or up */
5437 netdev->mtu = new_mtu;
5439 if (netif_running(netdev))
5440 ixgbe_reinit_locked(adapter);
5446 * ixgbe_open - Called when a network interface is made active
5447 * @netdev: network interface device structure
5449 * Returns 0 on success, negative value on failure
5451 * The open entry point is called when a network interface is made
5452 * active by the system (IFF_UP). At this point all resources needed
5453 * for transmit and receive operations are allocated, the interrupt
5454 * handler is registered with the OS, the watchdog timer is started,
5455 * and the stack is notified that the interface is ready.
5457 static int ixgbe_open(struct net_device *netdev)
5459 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5462 /* disallow open during test */
5463 if (test_bit(__IXGBE_TESTING, &adapter->state))
5466 netif_carrier_off(netdev);
5468 /* allocate transmit descriptors */
5469 err = ixgbe_setup_all_tx_resources(adapter);
5473 /* allocate receive descriptors */
5474 err = ixgbe_setup_all_rx_resources(adapter);
5478 ixgbe_configure(adapter);
5480 err = ixgbe_request_irq(adapter);
5484 /* Notify the stack of the actual queue counts. */
5485 if (adapter->num_rx_pools > 1)
5486 queues = adapter->num_rx_queues_per_pool;
5488 queues = adapter->num_tx_queues;
5490 err = netif_set_real_num_tx_queues(netdev, queues);
5492 goto err_set_queues;
5494 if (adapter->num_rx_pools > 1 &&
5495 adapter->num_rx_queues > IXGBE_MAX_L2A_QUEUES)
5496 queues = IXGBE_MAX_L2A_QUEUES;
5498 queues = adapter->num_rx_queues;
5499 err = netif_set_real_num_rx_queues(netdev, queues);
5501 goto err_set_queues;
5503 ixgbe_ptp_init(adapter);
5505 ixgbe_up_complete(adapter);
5510 ixgbe_free_irq(adapter);
5512 ixgbe_free_all_rx_resources(adapter);
5514 ixgbe_free_all_tx_resources(adapter);
5516 ixgbe_reset(adapter);
5522 * ixgbe_close - Disables a network interface
5523 * @netdev: network interface device structure
5525 * Returns 0, this is not allowed to fail
5527 * The close entry point is called when an interface is de-activated
5528 * by the OS. The hardware is still under the drivers control, but
5529 * needs to be disabled. A global MAC reset is issued to stop the
5530 * hardware, and all transmit and receive resources are freed.
5532 static int ixgbe_close(struct net_device *netdev)
5534 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5536 ixgbe_ptp_stop(adapter);
5538 ixgbe_down(adapter);
5539 ixgbe_free_irq(adapter);
5541 ixgbe_fdir_filter_exit(adapter);
5543 ixgbe_free_all_tx_resources(adapter);
5544 ixgbe_free_all_rx_resources(adapter);
5546 ixgbe_release_hw_control(adapter);
5552 static int ixgbe_resume(struct pci_dev *pdev)
5554 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5555 struct net_device *netdev = adapter->netdev;
5558 adapter->hw.hw_addr = adapter->io_addr;
5559 pci_set_power_state(pdev, PCI_D0);
5560 pci_restore_state(pdev);
5562 * pci_restore_state clears dev->state_saved so call
5563 * pci_save_state to restore it.
5565 pci_save_state(pdev);
5567 err = pci_enable_device_mem(pdev);
5569 e_dev_err("Cannot enable PCI device from suspend\n");
5572 pci_set_master(pdev);
5574 pci_wake_from_d3(pdev, false);
5576 ixgbe_reset(adapter);
5578 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
5581 err = ixgbe_init_interrupt_scheme(adapter);
5582 if (!err && netif_running(netdev))
5583 err = ixgbe_open(netdev);
5590 netif_device_attach(netdev);
5594 #endif /* CONFIG_PM */
5596 static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5598 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
5599 struct net_device *netdev = adapter->netdev;
5600 struct ixgbe_hw *hw = &adapter->hw;
5602 u32 wufc = adapter->wol;
5607 netif_device_detach(netdev);
5610 if (netif_running(netdev)) {
5611 ixgbe_down(adapter);
5612 ixgbe_free_irq(adapter);
5613 ixgbe_free_all_tx_resources(adapter);
5614 ixgbe_free_all_rx_resources(adapter);
5618 ixgbe_clear_interrupt_scheme(adapter);
5621 retval = pci_save_state(pdev);
5626 if (hw->mac.ops.stop_link_on_d3)
5627 hw->mac.ops.stop_link_on_d3(hw);
5630 ixgbe_set_rx_mode(netdev);
5632 /* enable the optics for 82599 SFP+ fiber as we can WoL */
5633 if (hw->mac.ops.enable_tx_laser)
5634 hw->mac.ops.enable_tx_laser(hw);
5636 /* turn on all-multi mode if wake on multicast is enabled */
5637 if (wufc & IXGBE_WUFC_MC) {
5638 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
5639 fctrl |= IXGBE_FCTRL_MPE;
5640 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
5643 ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL);
5644 ctrl |= IXGBE_CTRL_GIO_DIS;
5645 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl);
5647 IXGBE_WRITE_REG(hw, IXGBE_WUFC, wufc);
5649 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0);
5650 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0);
5653 switch (hw->mac.type) {
5654 case ixgbe_mac_82598EB:
5655 pci_wake_from_d3(pdev, false);
5657 case ixgbe_mac_82599EB:
5658 case ixgbe_mac_X540:
5659 pci_wake_from_d3(pdev, !!wufc);
5665 *enable_wake = !!wufc;
5667 ixgbe_release_hw_control(adapter);
5669 pci_disable_device(pdev);
5675 static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
5680 retval = __ixgbe_shutdown(pdev, &wake);
5685 pci_prepare_to_sleep(pdev);
5687 pci_wake_from_d3(pdev, false);
5688 pci_set_power_state(pdev, PCI_D3hot);
5693 #endif /* CONFIG_PM */
5695 static void ixgbe_shutdown(struct pci_dev *pdev)
5699 __ixgbe_shutdown(pdev, &wake);
5701 if (system_state == SYSTEM_POWER_OFF) {
5702 pci_wake_from_d3(pdev, wake);
5703 pci_set_power_state(pdev, PCI_D3hot);
5708 * ixgbe_update_stats - Update the board statistics counters.
5709 * @adapter: board private structure
5711 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
5713 struct net_device *netdev = adapter->netdev;
5714 struct ixgbe_hw *hw = &adapter->hw;
5715 struct ixgbe_hw_stats *hwstats = &adapter->stats;
5717 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
5718 u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
5719 u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
5720 u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
5722 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5723 test_bit(__IXGBE_RESETTING, &adapter->state))
5726 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
5729 for (i = 0; i < adapter->num_rx_queues; i++) {
5730 rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
5731 rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
5733 adapter->rsc_total_count = rsc_count;
5734 adapter->rsc_total_flush = rsc_flush;
5737 for (i = 0; i < adapter->num_rx_queues; i++) {
5738 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
5739 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
5740 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
5741 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
5742 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
5743 bytes += rx_ring->stats.bytes;
5744 packets += rx_ring->stats.packets;
5746 adapter->non_eop_descs = non_eop_descs;
5747 adapter->alloc_rx_page_failed = alloc_rx_page_failed;
5748 adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
5749 adapter->hw_csum_rx_error = hw_csum_rx_error;
5750 netdev->stats.rx_bytes = bytes;
5751 netdev->stats.rx_packets = packets;
5755 /* gather some stats to the adapter struct that are per queue */
5756 for (i = 0; i < adapter->num_tx_queues; i++) {
5757 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
5758 restart_queue += tx_ring->tx_stats.restart_queue;
5759 tx_busy += tx_ring->tx_stats.tx_busy;
5760 bytes += tx_ring->stats.bytes;
5761 packets += tx_ring->stats.packets;
5763 adapter->restart_queue = restart_queue;
5764 adapter->tx_busy = tx_busy;
5765 netdev->stats.tx_bytes = bytes;
5766 netdev->stats.tx_packets = packets;
5768 hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
5770 /* 8 register reads */
5771 for (i = 0; i < 8; i++) {
5772 /* for packet buffers not used, the register should read 0 */
5773 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
5775 hwstats->mpc[i] += mpc;
5776 total_mpc += hwstats->mpc[i];
5777 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
5778 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
5779 switch (hw->mac.type) {
5780 case ixgbe_mac_82598EB:
5781 hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
5782 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
5783 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
5784 hwstats->pxonrxc[i] +=
5785 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
5787 case ixgbe_mac_82599EB:
5788 case ixgbe_mac_X540:
5789 hwstats->pxonrxc[i] +=
5790 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
5797 /*16 register reads */
5798 for (i = 0; i < 16; i++) {
5799 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
5800 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
5801 if ((hw->mac.type == ixgbe_mac_82599EB) ||
5802 (hw->mac.type == ixgbe_mac_X540)) {
5803 hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
5804 IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
5805 hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
5806 IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
5810 hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
5811 /* work around hardware counting issue */
5812 hwstats->gprc -= missed_rx;
5814 ixgbe_update_xoff_received(adapter);
5816 /* 82598 hardware only has a 32 bit counter in the high register */
5817 switch (hw->mac.type) {
5818 case ixgbe_mac_82598EB:
5819 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
5820 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
5821 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
5822 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
5824 case ixgbe_mac_X540:
5825 /* OS2BMC stats are X540 only*/
5826 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
5827 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
5828 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
5829 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
5830 case ixgbe_mac_82599EB:
5831 for (i = 0; i < 16; i++)
5832 adapter->hw_rx_no_dma_resources +=
5833 IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
5834 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
5835 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
5836 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
5837 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
5838 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
5839 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
5840 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
5841 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
5842 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
5844 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
5845 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
5846 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
5847 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
5848 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
5849 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
5850 /* Add up per cpu counters for total ddp aloc fail */
5851 if (adapter->fcoe.ddp_pool) {
5852 struct ixgbe_fcoe *fcoe = &adapter->fcoe;
5853 struct ixgbe_fcoe_ddp_pool *ddp_pool;
5855 u64 noddp = 0, noddp_ext_buff = 0;
5856 for_each_possible_cpu(cpu) {
5857 ddp_pool = per_cpu_ptr(fcoe->ddp_pool, cpu);
5858 noddp += ddp_pool->noddp;
5859 noddp_ext_buff += ddp_pool->noddp_ext_buff;
5861 hwstats->fcoe_noddp = noddp;
5862 hwstats->fcoe_noddp_ext_buff = noddp_ext_buff;
5864 #endif /* IXGBE_FCOE */
5869 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
5870 hwstats->bprc += bprc;
5871 hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
5872 if (hw->mac.type == ixgbe_mac_82598EB)
5873 hwstats->mprc -= bprc;
5874 hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
5875 hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
5876 hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
5877 hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
5878 hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
5879 hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
5880 hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
5881 hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
5882 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
5883 hwstats->lxontxc += lxon;
5884 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
5885 hwstats->lxofftxc += lxoff;
5886 hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
5887 hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
5889 * 82598 errata - tx of flow control packets is included in tx counters
5891 xon_off_tot = lxon + lxoff;
5892 hwstats->gptc -= xon_off_tot;
5893 hwstats->mptc -= xon_off_tot;
5894 hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
5895 hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
5896 hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
5897 hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
5898 hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
5899 hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
5900 hwstats->ptc64 -= xon_off_tot;
5901 hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
5902 hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
5903 hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
5904 hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
5905 hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
5906 hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
5908 /* Fill out the OS statistics structure */
5909 netdev->stats.multicast = hwstats->mprc;
5912 netdev->stats.rx_errors = hwstats->crcerrs + hwstats->rlec;
5913 netdev->stats.rx_dropped = 0;
5914 netdev->stats.rx_length_errors = hwstats->rlec;
5915 netdev->stats.rx_crc_errors = hwstats->crcerrs;
5916 netdev->stats.rx_missed_errors = total_mpc;
5920 * ixgbe_fdir_reinit_subtask - worker thread to reinit FDIR filter table
5921 * @adapter: pointer to the device adapter structure
5923 static void ixgbe_fdir_reinit_subtask(struct ixgbe_adapter *adapter)
5925 struct ixgbe_hw *hw = &adapter->hw;
5928 if (!(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
5931 adapter->flags2 &= ~IXGBE_FLAG2_FDIR_REQUIRES_REINIT;
5933 /* if interface is down do nothing */
5934 if (test_bit(__IXGBE_DOWN, &adapter->state))
5937 /* do nothing if we are not using signature filters */
5938 if (!(adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE))
5941 adapter->fdir_overflow++;
5943 if (ixgbe_reinit_fdir_tables_82599(hw) == 0) {
5944 for (i = 0; i < adapter->num_tx_queues; i++)
5945 set_bit(__IXGBE_TX_FDIR_INIT_DONE,
5946 &(adapter->tx_ring[i]->state));
5947 /* re-enable flow director interrupts */
5948 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_FLOW_DIR);
5950 e_err(probe, "failed to finish FDIR re-initialization, "
5951 "ignored adding FDIR ATR filters\n");
5956 * ixgbe_check_hang_subtask - check for hung queues and dropped interrupts
5957 * @adapter: pointer to the device adapter structure
5959 * This function serves two purposes. First it strobes the interrupt lines
5960 * in order to make certain interrupts are occurring. Secondly it sets the
5961 * bits needed to check for TX hangs. As a result we should immediately
5962 * determine if a hang has occurred.
5964 static void ixgbe_check_hang_subtask(struct ixgbe_adapter *adapter)
5966 struct ixgbe_hw *hw = &adapter->hw;
5970 /* If we're down, removing or resetting, just bail */
5971 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
5972 test_bit(__IXGBE_REMOVING, &adapter->state) ||
5973 test_bit(__IXGBE_RESETTING, &adapter->state))
5976 /* Force detection of hung controller */
5977 if (netif_carrier_ok(adapter->netdev)) {
5978 for (i = 0; i < adapter->num_tx_queues; i++)
5979 set_check_for_tx_hang(adapter->tx_ring[i]);
5982 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
5984 * for legacy and MSI interrupts don't set any bits
5985 * that are enabled for EIAM, because this operation
5986 * would set *both* EIMS and EICS for any bit in EIAM
5988 IXGBE_WRITE_REG(hw, IXGBE_EICS,
5989 (IXGBE_EICS_TCP_TIMER | IXGBE_EICS_OTHER));
5991 /* get one bit for every active tx/rx interrupt vector */
5992 for (i = 0; i < adapter->num_q_vectors; i++) {
5993 struct ixgbe_q_vector *qv = adapter->q_vector[i];
5994 if (qv->rx.ring || qv->tx.ring)
5995 eics |= ((u64)1 << i);
5999 /* Cause software interrupt to ensure rings are cleaned */
6000 ixgbe_irq_rearm_queues(adapter, eics);
6005 * ixgbe_watchdog_update_link - update the link status
6006 * @adapter: pointer to the device adapter structure
6007 * @link_speed: pointer to a u32 to store the link_speed
6009 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
6011 struct ixgbe_hw *hw = &adapter->hw;
6012 u32 link_speed = adapter->link_speed;
6013 bool link_up = adapter->link_up;
6014 bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
6016 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6019 if (hw->mac.ops.check_link) {
6020 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
6022 /* always assume link is up, if no check link function */
6023 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
6027 if (adapter->ixgbe_ieee_pfc)
6028 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
6030 if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
6031 hw->mac.ops.fc_enable(hw);
6032 ixgbe_set_rx_drop_en(adapter);
6036 time_after(jiffies, (adapter->link_check_timeout +
6037 IXGBE_TRY_LINK_TIMEOUT))) {
6038 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
6039 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
6040 IXGBE_WRITE_FLUSH(hw);
6043 adapter->link_up = link_up;
6044 adapter->link_speed = link_speed;
6047 static void ixgbe_update_default_up(struct ixgbe_adapter *adapter)
6049 #ifdef CONFIG_IXGBE_DCB
6050 struct net_device *netdev = adapter->netdev;
6051 struct dcb_app app = {
6052 .selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE,
6057 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_IEEE)
6058 up = dcb_ieee_getapp_mask(netdev, &app);
6060 adapter->default_up = (up > 1) ? (ffs(up) - 1) : 0;
6065 * ixgbe_watchdog_link_is_up - update netif_carrier status and
6066 * print link up message
6067 * @adapter: pointer to the device adapter structure
6069 static void ixgbe_watchdog_link_is_up(struct ixgbe_adapter *adapter)
6071 struct net_device *netdev = adapter->netdev;
6072 struct ixgbe_hw *hw = &adapter->hw;
6073 u32 link_speed = adapter->link_speed;
6074 bool flow_rx, flow_tx;
6076 /* only continue if link was previously down */
6077 if (netif_carrier_ok(netdev))
6080 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
6082 switch (hw->mac.type) {
6083 case ixgbe_mac_82598EB: {
6084 u32 frctl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
6085 u32 rmcs = IXGBE_READ_REG(hw, IXGBE_RMCS);
6086 flow_rx = !!(frctl & IXGBE_FCTRL_RFCE);
6087 flow_tx = !!(rmcs & IXGBE_RMCS_TFCE_802_3X);
6090 case ixgbe_mac_X540:
6091 case ixgbe_mac_82599EB: {
6092 u32 mflcn = IXGBE_READ_REG(hw, IXGBE_MFLCN);
6093 u32 fccfg = IXGBE_READ_REG(hw, IXGBE_FCCFG);
6094 flow_rx = !!(mflcn & IXGBE_MFLCN_RFCE);
6095 flow_tx = !!(fccfg & IXGBE_FCCFG_TFCE_802_3X);
6104 adapter->last_rx_ptp_check = jiffies;
6106 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6107 ixgbe_ptp_start_cyclecounter(adapter);
6109 e_info(drv, "NIC Link is Up %s, Flow Control: %s\n",
6110 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
6112 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
6114 (link_speed == IXGBE_LINK_SPEED_100_FULL ?
6117 ((flow_rx && flow_tx) ? "RX/TX" :
6119 (flow_tx ? "TX" : "None"))));
6121 netif_carrier_on(netdev);
6122 ixgbe_check_vf_rate_limit(adapter);
6124 /* update the default user priority for VFs */
6125 ixgbe_update_default_up(adapter);
6127 /* ping all the active vfs to let them know link has changed */
6128 ixgbe_ping_all_vfs(adapter);
6132 * ixgbe_watchdog_link_is_down - update netif_carrier status and
6133 * print link down message
6134 * @adapter: pointer to the adapter structure
6136 static void ixgbe_watchdog_link_is_down(struct ixgbe_adapter *adapter)
6138 struct net_device *netdev = adapter->netdev;
6139 struct ixgbe_hw *hw = &adapter->hw;
6141 adapter->link_up = false;
6142 adapter->link_speed = 0;
6144 /* only continue if link was up previously */
6145 if (!netif_carrier_ok(netdev))
6148 /* poll for SFP+ cable when link is down */
6149 if (ixgbe_is_sfp(hw) && hw->mac.type == ixgbe_mac_82598EB)
6150 adapter->flags2 |= IXGBE_FLAG2_SEARCH_FOR_SFP;
6152 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state))
6153 ixgbe_ptp_start_cyclecounter(adapter);
6155 e_info(drv, "NIC Link is Down\n");
6156 netif_carrier_off(netdev);
6158 /* ping all the active vfs to let them know link has changed */
6159 ixgbe_ping_all_vfs(adapter);
6163 * ixgbe_watchdog_flush_tx - flush queues on link down
6164 * @adapter: pointer to the device adapter structure
6166 static void ixgbe_watchdog_flush_tx(struct ixgbe_adapter *adapter)
6169 int some_tx_pending = 0;
6171 if (!netif_carrier_ok(adapter->netdev)) {
6172 for (i = 0; i < adapter->num_tx_queues; i++) {
6173 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
6174 if (tx_ring->next_to_use != tx_ring->next_to_clean) {
6175 some_tx_pending = 1;
6180 if (some_tx_pending) {
6181 /* We've lost link, so the controller stops DMA,
6182 * but we've got queued Tx work that's never going
6183 * to get done, so reset controller to flush Tx.
6184 * (Do the reset outside of interrupt context).
6186 e_warn(drv, "initiating reset to clear Tx work after link loss\n");
6187 adapter->flags2 |= IXGBE_FLAG2_RESET_REQUESTED;
6192 static void ixgbe_spoof_check(struct ixgbe_adapter *adapter)
6196 /* Do not perform spoof check for 82598 or if not in IOV mode */
6197 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
6198 adapter->num_vfs == 0)
6201 ssvpc = IXGBE_READ_REG(&adapter->hw, IXGBE_SSVPC);
6204 * ssvpc register is cleared on read, if zero then no
6205 * spoofed packets in the last interval.
6210 e_warn(drv, "%u Spoofed packets detected\n", ssvpc);
6214 * ixgbe_watchdog_subtask - check and bring link up
6215 * @adapter: pointer to the device adapter structure
6217 static void ixgbe_watchdog_subtask(struct ixgbe_adapter *adapter)
6219 /* if interface is down, removing or resetting, do nothing */
6220 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6221 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6222 test_bit(__IXGBE_RESETTING, &adapter->state))
6225 ixgbe_watchdog_update_link(adapter);
6227 if (adapter->link_up)
6228 ixgbe_watchdog_link_is_up(adapter);
6230 ixgbe_watchdog_link_is_down(adapter);
6232 ixgbe_spoof_check(adapter);
6233 ixgbe_update_stats(adapter);
6235 ixgbe_watchdog_flush_tx(adapter);
6239 * ixgbe_sfp_detection_subtask - poll for SFP+ cable
6240 * @adapter: the ixgbe adapter structure
6242 static void ixgbe_sfp_detection_subtask(struct ixgbe_adapter *adapter)
6244 struct ixgbe_hw *hw = &adapter->hw;
6247 /* not searching for SFP so there is nothing to do here */
6248 if (!(adapter->flags2 & IXGBE_FLAG2_SEARCH_FOR_SFP) &&
6249 !(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6252 /* someone else is in init, wait until next service event */
6253 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6256 err = hw->phy.ops.identify_sfp(hw);
6257 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6260 if (err == IXGBE_ERR_SFP_NOT_PRESENT) {
6261 /* If no cable is present, then we need to reset
6262 * the next time we find a good cable. */
6263 adapter->flags2 |= IXGBE_FLAG2_SFP_NEEDS_RESET;
6270 /* exit if reset not needed */
6271 if (!(adapter->flags2 & IXGBE_FLAG2_SFP_NEEDS_RESET))
6274 adapter->flags2 &= ~IXGBE_FLAG2_SFP_NEEDS_RESET;
6277 * A module may be identified correctly, but the EEPROM may not have
6278 * support for that module. setup_sfp() will fail in that case, so
6279 * we should not allow that module to load.
6281 if (hw->mac.type == ixgbe_mac_82598EB)
6282 err = hw->phy.ops.reset(hw);
6284 err = hw->mac.ops.setup_sfp(hw);
6286 if (err == IXGBE_ERR_SFP_NOT_SUPPORTED)
6289 adapter->flags |= IXGBE_FLAG_NEED_LINK_CONFIG;
6290 e_info(probe, "detected SFP+: %d\n", hw->phy.sfp_type);
6293 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6295 if ((err == IXGBE_ERR_SFP_NOT_SUPPORTED) &&
6296 (adapter->netdev->reg_state == NETREG_REGISTERED)) {
6297 e_dev_err("failed to initialize because an unsupported "
6298 "SFP+ module type was detected.\n");
6299 e_dev_err("Reload the driver after installing a "
6300 "supported module.\n");
6301 unregister_netdev(adapter->netdev);
6306 * ixgbe_sfp_link_config_subtask - set up link SFP after module install
6307 * @adapter: the ixgbe adapter structure
6309 static void ixgbe_sfp_link_config_subtask(struct ixgbe_adapter *adapter)
6311 struct ixgbe_hw *hw = &adapter->hw;
6313 bool autoneg = false;
6315 if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_CONFIG))
6318 /* someone else is in init, wait until next service event */
6319 if (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
6322 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
6324 speed = hw->phy.autoneg_advertised;
6325 if ((!speed) && (hw->mac.ops.get_link_capabilities)) {
6326 hw->mac.ops.get_link_capabilities(hw, &speed, &autoneg);
6328 /* setup the highest link when no autoneg */
6330 if (speed & IXGBE_LINK_SPEED_10GB_FULL)
6331 speed = IXGBE_LINK_SPEED_10GB_FULL;
6335 if (hw->mac.ops.setup_link)
6336 hw->mac.ops.setup_link(hw, speed, true);
6338 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
6339 adapter->link_check_timeout = jiffies;
6340 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
6343 #ifdef CONFIG_PCI_IOV
6344 static void ixgbe_check_for_bad_vf(struct ixgbe_adapter *adapter)
6347 struct ixgbe_hw *hw = &adapter->hw;
6348 struct net_device *netdev = adapter->netdev;
6352 gpc = IXGBE_READ_REG(hw, IXGBE_TXDGPC);
6353 if (gpc) /* If incrementing then no need for the check below */
6356 * Check to see if a bad DMA write target from an errant or
6357 * malicious VF has caused a PCIe error. If so then we can
6358 * issue a VFLR to the offending VF(s) and then resume without
6359 * requesting a full slot reset.
6362 for (vf = 0; vf < adapter->num_vfs; vf++) {
6363 ciaa = (vf << 16) | 0x80000000;
6364 /* 32 bit read so align, we really want status at offset 6 */
6365 ciaa |= PCI_COMMAND;
6366 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
6367 ciad = IXGBE_READ_REG(hw, IXGBE_CIAD_82599);
6369 /* disable debug mode asap after reading data */
6370 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
6371 /* Get the upper 16 bits which will be the PCI status reg */
6373 if (ciad & PCI_STATUS_REC_MASTER_ABORT) {
6374 netdev_err(netdev, "VF %d Hung DMA\n", vf);
6376 ciaa = (vf << 16) | 0x80000000;
6378 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
6379 ciad = 0x00008000; /* VFLR */
6380 IXGBE_WRITE_REG(hw, IXGBE_CIAD_82599, ciad);
6382 IXGBE_WRITE_REG(hw, IXGBE_CIAA_82599, ciaa);
6389 * ixgbe_service_timer - Timer Call-back
6390 * @data: pointer to adapter cast into an unsigned long
6392 static void ixgbe_service_timer(unsigned long data)
6394 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
6395 unsigned long next_event_offset;
6398 /* poll faster when waiting for link */
6399 if (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE)
6400 next_event_offset = HZ / 10;
6402 next_event_offset = HZ * 2;
6404 #ifdef CONFIG_PCI_IOV
6406 * don't bother with SR-IOV VF DMA hang check if there are
6407 * no VFs or the link is down
6409 if (!adapter->num_vfs ||
6410 (adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
6411 goto normal_timer_service;
6413 /* If we have VFs allocated then we must check for DMA hangs */
6414 ixgbe_check_for_bad_vf(adapter);
6415 next_event_offset = HZ / 50;
6416 adapter->timer_event_accumulator++;
6418 if (adapter->timer_event_accumulator >= 100)
6419 adapter->timer_event_accumulator = 0;
6423 normal_timer_service:
6425 /* Reset the timer */
6426 mod_timer(&adapter->service_timer, next_event_offset + jiffies);
6429 ixgbe_service_event_schedule(adapter);
6432 static void ixgbe_reset_subtask(struct ixgbe_adapter *adapter)
6434 if (!(adapter->flags2 & IXGBE_FLAG2_RESET_REQUESTED))
6437 adapter->flags2 &= ~IXGBE_FLAG2_RESET_REQUESTED;
6439 /* If we're already down, removing or resetting, just bail */
6440 if (test_bit(__IXGBE_DOWN, &adapter->state) ||
6441 test_bit(__IXGBE_REMOVING, &adapter->state) ||
6442 test_bit(__IXGBE_RESETTING, &adapter->state))
6445 ixgbe_dump(adapter);
6446 netdev_err(adapter->netdev, "Reset adapter\n");
6447 adapter->tx_timeout_count++;
6450 ixgbe_reinit_locked(adapter);
6455 * ixgbe_service_task - manages and runs subtasks
6456 * @work: pointer to work_struct containing our data
6458 static void ixgbe_service_task(struct work_struct *work)
6460 struct ixgbe_adapter *adapter = container_of(work,
6461 struct ixgbe_adapter,
6463 if (ixgbe_removed(adapter->hw.hw_addr)) {
6464 if (!test_bit(__IXGBE_DOWN, &adapter->state)) {
6466 ixgbe_down(adapter);
6469 ixgbe_service_event_complete(adapter);
6472 ixgbe_reset_subtask(adapter);
6473 ixgbe_sfp_detection_subtask(adapter);
6474 ixgbe_sfp_link_config_subtask(adapter);
6475 ixgbe_check_overtemp_subtask(adapter);
6476 ixgbe_watchdog_subtask(adapter);
6477 ixgbe_fdir_reinit_subtask(adapter);
6478 ixgbe_check_hang_subtask(adapter);
6480 if (test_bit(__IXGBE_PTP_RUNNING, &adapter->state)) {
6481 ixgbe_ptp_overflow_check(adapter);
6482 ixgbe_ptp_rx_hang(adapter);
6485 ixgbe_service_event_complete(adapter);
6488 static int ixgbe_tso(struct ixgbe_ring *tx_ring,
6489 struct ixgbe_tx_buffer *first,
6492 struct sk_buff *skb = first->skb;
6493 u32 vlan_macip_lens, type_tucmd;
6494 u32 mss_l4len_idx, l4len;
6496 if (skb->ip_summed != CHECKSUM_PARTIAL)
6499 if (!skb_is_gso(skb))
6502 if (skb_header_cloned(skb)) {
6503 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
6508 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
6509 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
6511 if (first->protocol == __constant_htons(ETH_P_IP)) {
6512 struct iphdr *iph = ip_hdr(skb);
6515 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
6519 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6520 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6521 IXGBE_TX_FLAGS_CSUM |
6522 IXGBE_TX_FLAGS_IPV4;
6523 } else if (skb_is_gso_v6(skb)) {
6524 ipv6_hdr(skb)->payload_len = 0;
6525 tcp_hdr(skb)->check =
6526 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
6527 &ipv6_hdr(skb)->daddr,
6529 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
6530 IXGBE_TX_FLAGS_CSUM;
6533 /* compute header lengths */
6534 l4len = tcp_hdrlen(skb);
6535 *hdr_len = skb_transport_offset(skb) + l4len;
6537 /* update gso size and bytecount with header size */
6538 first->gso_segs = skb_shinfo(skb)->gso_segs;
6539 first->bytecount += (first->gso_segs - 1) * *hdr_len;
6541 /* mss_l4len_id: use 0 as index for TSO */
6542 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
6543 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
6545 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
6546 vlan_macip_lens = skb_network_header_len(skb);
6547 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6548 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6550 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0, type_tucmd,
6556 static void ixgbe_tx_csum(struct ixgbe_ring *tx_ring,
6557 struct ixgbe_tx_buffer *first)
6559 struct sk_buff *skb = first->skb;
6560 u32 vlan_macip_lens = 0;
6561 u32 mss_l4len_idx = 0;
6564 if (skb->ip_summed != CHECKSUM_PARTIAL) {
6565 if (!(first->tx_flags & IXGBE_TX_FLAGS_HW_VLAN) &&
6566 !(first->tx_flags & IXGBE_TX_FLAGS_CC))
6570 switch (first->protocol) {
6571 case __constant_htons(ETH_P_IP):
6572 vlan_macip_lens |= skb_network_header_len(skb);
6573 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
6574 l4_hdr = ip_hdr(skb)->protocol;
6576 case __constant_htons(ETH_P_IPV6):
6577 vlan_macip_lens |= skb_network_header_len(skb);
6578 l4_hdr = ipv6_hdr(skb)->nexthdr;
6581 if (unlikely(net_ratelimit())) {
6582 dev_warn(tx_ring->dev,
6583 "partial checksum but proto=%x!\n",
6591 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
6592 mss_l4len_idx = tcp_hdrlen(skb) <<
6593 IXGBE_ADVTXD_L4LEN_SHIFT;
6596 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
6597 mss_l4len_idx = sizeof(struct sctphdr) <<
6598 IXGBE_ADVTXD_L4LEN_SHIFT;
6601 mss_l4len_idx = sizeof(struct udphdr) <<
6602 IXGBE_ADVTXD_L4LEN_SHIFT;
6605 if (unlikely(net_ratelimit())) {
6606 dev_warn(tx_ring->dev,
6607 "partial checksum but l4 proto=%x!\n",
6613 /* update TX checksum flag */
6614 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
6617 /* vlan_macip_lens: MACLEN, VLAN tag */
6618 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
6619 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
6621 ixgbe_tx_ctxtdesc(tx_ring, vlan_macip_lens, 0,
6622 type_tucmd, mss_l4len_idx);
6625 #define IXGBE_SET_FLAG(_input, _flag, _result) \
6626 ((_flag <= _result) ? \
6627 ((u32)(_input & _flag) * (_result / _flag)) : \
6628 ((u32)(_input & _flag) / (_flag / _result)))
6630 static u32 ixgbe_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
6632 /* set type for advanced descriptor with frame checksum insertion */
6633 u32 cmd_type = IXGBE_ADVTXD_DTYP_DATA |
6634 IXGBE_ADVTXD_DCMD_DEXT |
6635 IXGBE_ADVTXD_DCMD_IFCS;
6637 /* set HW vlan bit if vlan is present */
6638 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_HW_VLAN,
6639 IXGBE_ADVTXD_DCMD_VLE);
6641 /* set segmentation enable bits for TSO/FSO */
6642 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSO,
6643 IXGBE_ADVTXD_DCMD_TSE);
6645 /* set timestamp bit if present */
6646 cmd_type |= IXGBE_SET_FLAG(tx_flags, IXGBE_TX_FLAGS_TSTAMP,
6647 IXGBE_ADVTXD_MAC_TSTAMP);
6649 /* insert frame checksum */
6650 cmd_type ^= IXGBE_SET_FLAG(skb->no_fcs, 1, IXGBE_ADVTXD_DCMD_IFCS);
6655 static void ixgbe_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
6656 u32 tx_flags, unsigned int paylen)
6658 u32 olinfo_status = paylen << IXGBE_ADVTXD_PAYLEN_SHIFT;
6660 /* enable L4 checksum for TSO and TX checksum offload */
6661 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6662 IXGBE_TX_FLAGS_CSUM,
6663 IXGBE_ADVTXD_POPTS_TXSM);
6665 /* enble IPv4 checksum for TSO */
6666 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6667 IXGBE_TX_FLAGS_IPV4,
6668 IXGBE_ADVTXD_POPTS_IXSM);
6671 * Check Context must be set if Tx switch is enabled, which it
6672 * always is for case where virtual functions are running
6674 olinfo_status |= IXGBE_SET_FLAG(tx_flags,
6678 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
6681 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
6684 static void ixgbe_tx_map(struct ixgbe_ring *tx_ring,
6685 struct ixgbe_tx_buffer *first,
6688 struct sk_buff *skb = first->skb;
6689 struct ixgbe_tx_buffer *tx_buffer;
6690 union ixgbe_adv_tx_desc *tx_desc;
6691 struct skb_frag_struct *frag;
6693 unsigned int data_len, size;
6694 u32 tx_flags = first->tx_flags;
6695 u32 cmd_type = ixgbe_tx_cmd_type(skb, tx_flags);
6696 u16 i = tx_ring->next_to_use;
6698 tx_desc = IXGBE_TX_DESC(tx_ring, i);
6700 ixgbe_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
6702 size = skb_headlen(skb);
6703 data_len = skb->data_len;
6706 if (tx_flags & IXGBE_TX_FLAGS_FCOE) {
6707 if (data_len < sizeof(struct fcoe_crc_eof)) {
6708 size -= sizeof(struct fcoe_crc_eof) - data_len;
6711 data_len -= sizeof(struct fcoe_crc_eof);
6716 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
6720 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
6721 if (dma_mapping_error(tx_ring->dev, dma))
6724 /* record length, and DMA address */
6725 dma_unmap_len_set(tx_buffer, len, size);
6726 dma_unmap_addr_set(tx_buffer, dma, dma);
6728 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6730 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
6731 tx_desc->read.cmd_type_len =
6732 cpu_to_le32(cmd_type ^ IXGBE_MAX_DATA_PER_TXD);
6736 if (i == tx_ring->count) {
6737 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6740 tx_desc->read.olinfo_status = 0;
6742 dma += IXGBE_MAX_DATA_PER_TXD;
6743 size -= IXGBE_MAX_DATA_PER_TXD;
6745 tx_desc->read.buffer_addr = cpu_to_le64(dma);
6748 if (likely(!data_len))
6751 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
6755 if (i == tx_ring->count) {
6756 tx_desc = IXGBE_TX_DESC(tx_ring, 0);
6759 tx_desc->read.olinfo_status = 0;
6762 size = min_t(unsigned int, data_len, skb_frag_size(frag));
6764 size = skb_frag_size(frag);
6768 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
6771 tx_buffer = &tx_ring->tx_buffer_info[i];
6774 /* write last descriptor with RS and EOP bits */
6775 cmd_type |= size | IXGBE_TXD_CMD;
6776 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
6778 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
6780 /* set the timestamp */
6781 first->time_stamp = jiffies;
6784 * Force memory writes to complete before letting h/w know there
6785 * are new descriptors to fetch. (Only applicable for weak-ordered
6786 * memory model archs, such as IA-64).
6788 * We also need this memory barrier to make certain all of the
6789 * status bits have been updated before next_to_watch is written.
6793 /* set next_to_watch value indicating a packet is present */
6794 first->next_to_watch = tx_desc;
6797 if (i == tx_ring->count)
6800 tx_ring->next_to_use = i;
6802 /* notify HW of packet */
6803 ixgbe_write_tail(tx_ring, i);
6807 dev_err(tx_ring->dev, "TX DMA map failed\n");
6809 /* clear dma mappings for failed tx_buffer_info map */
6811 tx_buffer = &tx_ring->tx_buffer_info[i];
6812 ixgbe_unmap_and_free_tx_resource(tx_ring, tx_buffer);
6813 if (tx_buffer == first)
6820 tx_ring->next_to_use = i;
6823 static void ixgbe_atr(struct ixgbe_ring *ring,
6824 struct ixgbe_tx_buffer *first)
6826 struct ixgbe_q_vector *q_vector = ring->q_vector;
6827 union ixgbe_atr_hash_dword input = { .dword = 0 };
6828 union ixgbe_atr_hash_dword common = { .dword = 0 };
6830 unsigned char *network;
6832 struct ipv6hdr *ipv6;
6837 /* if ring doesn't have a interrupt vector, cannot perform ATR */
6841 /* do nothing if sampling is disabled */
6842 if (!ring->atr_sample_rate)
6847 /* snag network header to get L4 type and address */
6848 hdr.network = skb_network_header(first->skb);
6850 /* Currently only IPv4/IPv6 with TCP is supported */
6851 if ((first->protocol != __constant_htons(ETH_P_IPV6) ||
6852 hdr.ipv6->nexthdr != IPPROTO_TCP) &&
6853 (first->protocol != __constant_htons(ETH_P_IP) ||
6854 hdr.ipv4->protocol != IPPROTO_TCP))
6857 th = tcp_hdr(first->skb);
6859 /* skip this packet since it is invalid or the socket is closing */
6863 /* sample on all syn packets or once every atr sample count */
6864 if (!th->syn && (ring->atr_count < ring->atr_sample_rate))
6867 /* reset sample count */
6868 ring->atr_count = 0;
6870 vlan_id = htons(first->tx_flags >> IXGBE_TX_FLAGS_VLAN_SHIFT);
6873 * src and dst are inverted, think how the receiver sees them
6875 * The input is broken into two sections, a non-compressed section
6876 * containing vm_pool, vlan_id, and flow_type. The rest of the data
6877 * is XORed together and stored in the compressed dword.
6879 input.formatted.vlan_id = vlan_id;
6882 * since src port and flex bytes occupy the same word XOR them together
6883 * and write the value to source port portion of compressed dword
6885 if (first->tx_flags & (IXGBE_TX_FLAGS_SW_VLAN | IXGBE_TX_FLAGS_HW_VLAN))
6886 common.port.src ^= th->dest ^ __constant_htons(ETH_P_8021Q);
6888 common.port.src ^= th->dest ^ first->protocol;
6889 common.port.dst ^= th->source;
6891 if (first->protocol == __constant_htons(ETH_P_IP)) {
6892 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
6893 common.ip ^= hdr.ipv4->saddr ^ hdr.ipv4->daddr;
6895 input.formatted.flow_type = IXGBE_ATR_FLOW_TYPE_TCPV6;
6896 common.ip ^= hdr.ipv6->saddr.s6_addr32[0] ^
6897 hdr.ipv6->saddr.s6_addr32[1] ^
6898 hdr.ipv6->saddr.s6_addr32[2] ^
6899 hdr.ipv6->saddr.s6_addr32[3] ^
6900 hdr.ipv6->daddr.s6_addr32[0] ^
6901 hdr.ipv6->daddr.s6_addr32[1] ^
6902 hdr.ipv6->daddr.s6_addr32[2] ^
6903 hdr.ipv6->daddr.s6_addr32[3];
6906 /* This assumes the Rx queue and Tx queue are bound to the same CPU */
6907 ixgbe_fdir_add_signature_filter_82599(&q_vector->adapter->hw,
6908 input, common, ring->queue_index);
6911 static int __ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6913 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
6914 /* Herbert's original patch had:
6915 * smp_mb__after_netif_stop_queue();
6916 * but since that doesn't exist yet, just open code it. */
6919 /* We need to check again in a case another CPU has just
6920 * made room available. */
6921 if (likely(ixgbe_desc_unused(tx_ring) < size))
6924 /* A reprieve! - use start_queue because it doesn't call schedule */
6925 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
6926 ++tx_ring->tx_stats.restart_queue;
6930 static inline int ixgbe_maybe_stop_tx(struct ixgbe_ring *tx_ring, u16 size)
6932 if (likely(ixgbe_desc_unused(tx_ring) >= size))
6934 return __ixgbe_maybe_stop_tx(tx_ring, size);
6937 static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb,
6938 void *accel_priv, select_queue_fallback_t fallback)
6940 struct ixgbe_fwd_adapter *fwd_adapter = accel_priv;
6942 struct ixgbe_adapter *adapter;
6943 struct ixgbe_ring_feature *f;
6948 return skb->queue_mapping + fwd_adapter->tx_base_queue;
6953 * only execute the code below if protocol is FCoE
6954 * or FIP and we have FCoE enabled on the adapter
6956 switch (vlan_get_protocol(skb)) {
6957 case __constant_htons(ETH_P_FCOE):
6958 case __constant_htons(ETH_P_FIP):
6959 adapter = netdev_priv(dev);
6961 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
6964 return fallback(dev, skb);
6967 f = &adapter->ring_feature[RING_F_FCOE];
6969 txq = skb_rx_queue_recorded(skb) ? skb_get_rx_queue(skb) :
6972 while (txq >= f->indices)
6975 return txq + f->offset;
6977 return fallback(dev, skb);
6981 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
6982 struct ixgbe_adapter *adapter,
6983 struct ixgbe_ring *tx_ring)
6985 struct ixgbe_tx_buffer *first;
6989 u16 count = TXD_USE_COUNT(skb_headlen(skb));
6990 __be16 protocol = skb->protocol;
6994 * need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
6995 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
6996 * + 2 desc gap to keep tail from touching head,
6997 * + 1 desc for context descriptor,
6998 * otherwise try next time
7000 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
7001 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
7003 if (ixgbe_maybe_stop_tx(tx_ring, count + 3)) {
7004 tx_ring->tx_stats.tx_busy++;
7005 return NETDEV_TX_BUSY;
7008 /* record the location of the first descriptor for this packet */
7009 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
7011 first->bytecount = skb->len;
7012 first->gso_segs = 1;
7014 /* if we have a HW VLAN tag being added default to the HW one */
7015 if (vlan_tx_tag_present(skb)) {
7016 tx_flags |= vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT;
7017 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7018 /* else if it is a SW VLAN check the next protocol and store the tag */
7019 } else if (protocol == __constant_htons(ETH_P_8021Q)) {
7020 struct vlan_hdr *vhdr, _vhdr;
7021 vhdr = skb_header_pointer(skb, ETH_HLEN, sizeof(_vhdr), &_vhdr);
7025 protocol = vhdr->h_vlan_encapsulated_proto;
7026 tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
7027 IXGBE_TX_FLAGS_VLAN_SHIFT;
7028 tx_flags |= IXGBE_TX_FLAGS_SW_VLAN;
7031 skb_tx_timestamp(skb);
7033 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
7034 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
7035 tx_flags |= IXGBE_TX_FLAGS_TSTAMP;
7037 /* schedule check for Tx timestamp */
7038 adapter->ptp_tx_skb = skb_get(skb);
7039 adapter->ptp_tx_start = jiffies;
7040 schedule_work(&adapter->ptp_tx_work);
7043 #ifdef CONFIG_PCI_IOV
7045 * Use the l2switch_enable flag - would be false if the DMA
7046 * Tx switch had been disabled.
7048 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7049 tx_flags |= IXGBE_TX_FLAGS_CC;
7052 /* DCB maps skb priorities 0-7 onto 3 bit PCP of VLAN tag. */
7053 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7054 ((tx_flags & (IXGBE_TX_FLAGS_HW_VLAN | IXGBE_TX_FLAGS_SW_VLAN)) ||
7055 (skb->priority != TC_PRIO_CONTROL))) {
7056 tx_flags &= ~IXGBE_TX_FLAGS_VLAN_PRIO_MASK;
7057 tx_flags |= (skb->priority & 0x7) <<
7058 IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT;
7059 if (tx_flags & IXGBE_TX_FLAGS_SW_VLAN) {
7060 struct vlan_ethhdr *vhdr;
7061 if (skb_header_cloned(skb) &&
7062 pskb_expand_head(skb, 0, 0, GFP_ATOMIC))
7064 vhdr = (struct vlan_ethhdr *)skb->data;
7065 vhdr->h_vlan_TCI = htons(tx_flags >>
7066 IXGBE_TX_FLAGS_VLAN_SHIFT);
7068 tx_flags |= IXGBE_TX_FLAGS_HW_VLAN;
7072 /* record initial flags and protocol */
7073 first->tx_flags = tx_flags;
7074 first->protocol = protocol;
7077 /* setup tx offload for FCoE */
7078 if ((protocol == __constant_htons(ETH_P_FCOE)) &&
7079 (tx_ring->netdev->features & (NETIF_F_FSO | NETIF_F_FCOE_CRC))) {
7080 tso = ixgbe_fso(tx_ring, first, &hdr_len);
7087 #endif /* IXGBE_FCOE */
7088 tso = ixgbe_tso(tx_ring, first, &hdr_len);
7092 ixgbe_tx_csum(tx_ring, first);
7094 /* add the ATR filter if ATR is on */
7095 if (test_bit(__IXGBE_TX_FDIR_INIT_DONE, &tx_ring->state))
7096 ixgbe_atr(tx_ring, first);
7100 #endif /* IXGBE_FCOE */
7101 ixgbe_tx_map(tx_ring, first, hdr_len);
7103 ixgbe_maybe_stop_tx(tx_ring, DESC_NEEDED);
7105 return NETDEV_TX_OK;
7108 dev_kfree_skb_any(first->skb);
7111 return NETDEV_TX_OK;
7114 static netdev_tx_t __ixgbe_xmit_frame(struct sk_buff *skb,
7115 struct net_device *netdev,
7116 struct ixgbe_ring *ring)
7118 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7119 struct ixgbe_ring *tx_ring;
7122 * The minimum packet size for olinfo paylen is 17 so pad the skb
7123 * in order to meet this minimum size requirement.
7125 if (unlikely(skb->len < 17)) {
7126 if (skb_pad(skb, 17 - skb->len))
7127 return NETDEV_TX_OK;
7129 skb_set_tail_pointer(skb, 17);
7132 tx_ring = ring ? ring : adapter->tx_ring[skb->queue_mapping];
7134 return ixgbe_xmit_frame_ring(skb, adapter, tx_ring);
7137 static netdev_tx_t ixgbe_xmit_frame(struct sk_buff *skb,
7138 struct net_device *netdev)
7140 return __ixgbe_xmit_frame(skb, netdev, NULL);
7144 * ixgbe_set_mac - Change the Ethernet Address of the NIC
7145 * @netdev: network interface device structure
7146 * @p: pointer to an address structure
7148 * Returns 0 on success, negative on failure
7150 static int ixgbe_set_mac(struct net_device *netdev, void *p)
7152 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7153 struct ixgbe_hw *hw = &adapter->hw;
7154 struct sockaddr *addr = p;
7156 if (!is_valid_ether_addr(addr->sa_data))
7157 return -EADDRNOTAVAIL;
7159 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
7160 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
7162 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, VMDQ_P(0), IXGBE_RAH_AV);
7168 ixgbe_mdio_read(struct net_device *netdev, int prtad, int devad, u16 addr)
7170 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7171 struct ixgbe_hw *hw = &adapter->hw;
7175 if (prtad != hw->phy.mdio.prtad)
7177 rc = hw->phy.ops.read_reg(hw, addr, devad, &value);
7183 static int ixgbe_mdio_write(struct net_device *netdev, int prtad, int devad,
7184 u16 addr, u16 value)
7186 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7187 struct ixgbe_hw *hw = &adapter->hw;
7189 if (prtad != hw->phy.mdio.prtad)
7191 return hw->phy.ops.write_reg(hw, addr, devad, value);
7194 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
7196 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7200 return ixgbe_ptp_hwtstamp_ioctl(adapter, req, cmd);
7202 return mdio_mii_ioctl(&adapter->hw.phy.mdio, if_mii(req), cmd);
7207 * ixgbe_add_sanmac_netdev - Add the SAN MAC address to the corresponding
7209 * @netdev: network interface device structure
7211 * Returns non-zero on failure
7213 static int ixgbe_add_sanmac_netdev(struct net_device *dev)
7216 struct ixgbe_adapter *adapter = netdev_priv(dev);
7217 struct ixgbe_hw *hw = &adapter->hw;
7219 if (is_valid_ether_addr(hw->mac.san_addr)) {
7221 err = dev_addr_add(dev, hw->mac.san_addr, NETDEV_HW_ADDR_T_SAN);
7224 /* update SAN MAC vmdq pool selection */
7225 hw->mac.ops.set_vmdq_san_mac(hw, VMDQ_P(0));
7231 * ixgbe_del_sanmac_netdev - Removes the SAN MAC address to the corresponding
7233 * @netdev: network interface device structure
7235 * Returns non-zero on failure
7237 static int ixgbe_del_sanmac_netdev(struct net_device *dev)
7240 struct ixgbe_adapter *adapter = netdev_priv(dev);
7241 struct ixgbe_mac_info *mac = &adapter->hw.mac;
7243 if (is_valid_ether_addr(mac->san_addr)) {
7245 err = dev_addr_del(dev, mac->san_addr, NETDEV_HW_ADDR_T_SAN);
7251 #ifdef CONFIG_NET_POLL_CONTROLLER
7253 * Polling 'interrupt' - used by things like netconsole to send skbs
7254 * without having to re-enable interrupts. It's not called while
7255 * the interrupt routine is executing.
7257 static void ixgbe_netpoll(struct net_device *netdev)
7259 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7262 /* if interface is down do nothing */
7263 if (test_bit(__IXGBE_DOWN, &adapter->state))
7266 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
7267 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
7268 for (i = 0; i < adapter->num_q_vectors; i++)
7269 ixgbe_msix_clean_rings(0, adapter->q_vector[i]);
7271 ixgbe_intr(adapter->pdev->irq, netdev);
7273 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
7277 static struct rtnl_link_stats64 *ixgbe_get_stats64(struct net_device *netdev,
7278 struct rtnl_link_stats64 *stats)
7280 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7284 for (i = 0; i < adapter->num_rx_queues; i++) {
7285 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->rx_ring[i]);
7291 start = u64_stats_fetch_begin_bh(&ring->syncp);
7292 packets = ring->stats.packets;
7293 bytes = ring->stats.bytes;
7294 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
7295 stats->rx_packets += packets;
7296 stats->rx_bytes += bytes;
7300 for (i = 0; i < adapter->num_tx_queues; i++) {
7301 struct ixgbe_ring *ring = ACCESS_ONCE(adapter->tx_ring[i]);
7307 start = u64_stats_fetch_begin_bh(&ring->syncp);
7308 packets = ring->stats.packets;
7309 bytes = ring->stats.bytes;
7310 } while (u64_stats_fetch_retry_bh(&ring->syncp, start));
7311 stats->tx_packets += packets;
7312 stats->tx_bytes += bytes;
7316 /* following stats updated by ixgbe_watchdog_task() */
7317 stats->multicast = netdev->stats.multicast;
7318 stats->rx_errors = netdev->stats.rx_errors;
7319 stats->rx_length_errors = netdev->stats.rx_length_errors;
7320 stats->rx_crc_errors = netdev->stats.rx_crc_errors;
7321 stats->rx_missed_errors = netdev->stats.rx_missed_errors;
7325 #ifdef CONFIG_IXGBE_DCB
7327 * ixgbe_validate_rtr - verify 802.1Qp to Rx packet buffer mapping is valid.
7328 * @adapter: pointer to ixgbe_adapter
7329 * @tc: number of traffic classes currently enabled
7331 * Configure a valid 802.1Qp to Rx packet buffer mapping ie confirm
7332 * 802.1Q priority maps to a packet buffer that exists.
7334 static void ixgbe_validate_rtr(struct ixgbe_adapter *adapter, u8 tc)
7336 struct ixgbe_hw *hw = &adapter->hw;
7340 /* 82598 have a static priority to TC mapping that can not
7341 * be changed so no validation is needed.
7343 if (hw->mac.type == ixgbe_mac_82598EB)
7346 reg = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC);
7349 for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
7350 u8 up2tc = reg >> (i * IXGBE_RTRUP2TC_UP_SHIFT);
7352 /* If up2tc is out of bounds default to zero */
7354 reg &= ~(0x7 << IXGBE_RTRUP2TC_UP_SHIFT);
7358 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
7364 * ixgbe_set_prio_tc_map - Configure netdev prio tc map
7365 * @adapter: Pointer to adapter struct
7367 * Populate the netdev user priority to tc map
7369 static void ixgbe_set_prio_tc_map(struct ixgbe_adapter *adapter)
7371 struct net_device *dev = adapter->netdev;
7372 struct ixgbe_dcb_config *dcb_cfg = &adapter->dcb_cfg;
7373 struct ieee_ets *ets = adapter->ixgbe_ieee_ets;
7376 for (prio = 0; prio < MAX_USER_PRIORITY; prio++) {
7379 if (adapter->dcbx_cap & DCB_CAP_DCBX_VER_CEE)
7380 tc = ixgbe_dcb_get_tc_from_up(dcb_cfg, 0, prio);
7382 tc = ets->prio_tc[prio];
7384 netdev_set_prio_tc_map(dev, prio, tc);
7388 #endif /* CONFIG_IXGBE_DCB */
7390 * ixgbe_setup_tc - configure net_device for multiple traffic classes
7392 * @netdev: net device to configure
7393 * @tc: number of traffic classes to enable
7395 int ixgbe_setup_tc(struct net_device *dev, u8 tc)
7397 struct ixgbe_adapter *adapter = netdev_priv(dev);
7398 struct ixgbe_hw *hw = &adapter->hw;
7401 /* Hardware supports up to 8 traffic classes */
7402 if (tc > adapter->dcb_cfg.num_tcs.pg_tcs ||
7403 (hw->mac.type == ixgbe_mac_82598EB &&
7404 tc < MAX_TRAFFIC_CLASS))
7407 pools = (find_first_zero_bit(&adapter->fwd_bitmask, 32) > 1);
7408 if (tc && pools && adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS)
7411 /* Hardware has to reinitialize queues and interrupts to
7412 * match packet buffer alignment. Unfortunately, the
7413 * hardware is not flexible enough to do this dynamically.
7415 if (netif_running(dev))
7417 ixgbe_clear_interrupt_scheme(adapter);
7419 #ifdef CONFIG_IXGBE_DCB
7421 netdev_set_num_tc(dev, tc);
7422 ixgbe_set_prio_tc_map(adapter);
7424 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
7426 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
7427 adapter->last_lfc_mode = adapter->hw.fc.requested_mode;
7428 adapter->hw.fc.requested_mode = ixgbe_fc_none;
7431 netdev_reset_tc(dev);
7433 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
7434 adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
7436 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
7438 adapter->temp_dcb_cfg.pfc_mode_enable = false;
7439 adapter->dcb_cfg.pfc_mode_enable = false;
7442 ixgbe_validate_rtr(adapter, tc);
7444 #endif /* CONFIG_IXGBE_DCB */
7445 ixgbe_init_interrupt_scheme(adapter);
7447 if (netif_running(dev))
7448 return ixgbe_open(dev);
7453 #ifdef CONFIG_PCI_IOV
7454 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter)
7456 struct net_device *netdev = adapter->netdev;
7459 ixgbe_setup_tc(netdev, netdev_get_num_tc(netdev));
7464 void ixgbe_do_reset(struct net_device *netdev)
7466 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7468 if (netif_running(netdev))
7469 ixgbe_reinit_locked(adapter);
7471 ixgbe_reset(adapter);
7474 static netdev_features_t ixgbe_fix_features(struct net_device *netdev,
7475 netdev_features_t features)
7477 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7479 /* If Rx checksum is disabled, then RSC/LRO should also be disabled */
7480 if (!(features & NETIF_F_RXCSUM))
7481 features &= ~NETIF_F_LRO;
7483 /* Turn off LRO if not RSC capable */
7484 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
7485 features &= ~NETIF_F_LRO;
7490 static int ixgbe_set_features(struct net_device *netdev,
7491 netdev_features_t features)
7493 struct ixgbe_adapter *adapter = netdev_priv(netdev);
7494 netdev_features_t changed = netdev->features ^ features;
7495 bool need_reset = false;
7497 /* Make sure RSC matches LRO, reset if change */
7498 if (!(features & NETIF_F_LRO)) {
7499 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
7501 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
7502 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
7503 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
7504 if (adapter->rx_itr_setting == 1 ||
7505 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
7506 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
7508 } else if ((changed ^ features) & NETIF_F_LRO) {
7509 e_info(probe, "rx-usecs set too low, "
7515 * Check if Flow Director n-tuple support was enabled or disabled. If
7516 * the state changed, we need to reset.
7518 switch (features & NETIF_F_NTUPLE) {
7519 case NETIF_F_NTUPLE:
7520 /* turn off ATR, enable perfect filters and reset */
7521 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
7524 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
7525 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
7528 /* turn off perfect filters, enable ATR and reset */
7529 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
7532 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
7534 /* We cannot enable ATR if SR-IOV is enabled */
7535 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
7538 /* We cannot enable ATR if we have 2 or more traffic classes */
7539 if (netdev_get_num_tc(netdev) > 1)
7542 /* We cannot enable ATR if RSS is disabled */
7543 if (adapter->ring_feature[RING_F_RSS].limit <= 1)
7546 /* A sample rate of 0 indicates ATR disabled */
7547 if (!adapter->atr_sample_rate)
7550 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
7554 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7555 ixgbe_vlan_strip_enable(adapter);
7557 ixgbe_vlan_strip_disable(adapter);
7559 if (changed & NETIF_F_RXALL)
7562 netdev->features = features;
7564 ixgbe_do_reset(netdev);
7569 static int ixgbe_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
7570 struct net_device *dev,
7571 const unsigned char *addr,
7574 struct ixgbe_adapter *adapter = netdev_priv(dev);
7577 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7578 return ndo_dflt_fdb_add(ndm, tb, dev, addr, flags);
7580 /* Hardware does not support aging addresses so if a
7581 * ndm_state is given only allow permanent addresses
7583 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
7584 pr_info("%s: FDB only supports static addresses\n",
7589 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
7590 u32 rar_uc_entries = IXGBE_MAX_PF_MACVLANS;
7592 if (netdev_uc_count(dev) < rar_uc_entries)
7593 err = dev_uc_add_excl(dev, addr);
7596 } else if (is_multicast_ether_addr(addr)) {
7597 err = dev_mc_add_excl(dev, addr);
7602 /* Only return duplicate errors if NLM_F_EXCL is set */
7603 if (err == -EEXIST && !(flags & NLM_F_EXCL))
7609 static int ixgbe_ndo_bridge_setlink(struct net_device *dev,
7610 struct nlmsghdr *nlh)
7612 struct ixgbe_adapter *adapter = netdev_priv(dev);
7613 struct nlattr *attr, *br_spec;
7616 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7619 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
7621 nla_for_each_nested(attr, br_spec, rem) {
7625 if (nla_type(attr) != IFLA_BRIDGE_MODE)
7628 mode = nla_get_u16(attr);
7629 if (mode == BRIDGE_MODE_VEPA) {
7631 adapter->flags2 &= ~IXGBE_FLAG2_BRIDGE_MODE_VEB;
7632 } else if (mode == BRIDGE_MODE_VEB) {
7633 reg = IXGBE_PFDTXGSWC_VT_LBEN;
7634 adapter->flags2 |= IXGBE_FLAG2_BRIDGE_MODE_VEB;
7638 IXGBE_WRITE_REG(&adapter->hw, IXGBE_PFDTXGSWC, reg);
7640 e_info(drv, "enabling bridge mode: %s\n",
7641 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
7647 static int ixgbe_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
7648 struct net_device *dev,
7651 struct ixgbe_adapter *adapter = netdev_priv(dev);
7654 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED))
7657 if (adapter->flags2 & IXGBE_FLAG2_BRIDGE_MODE_VEB)
7658 mode = BRIDGE_MODE_VEB;
7660 mode = BRIDGE_MODE_VEPA;
7662 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
7665 static void *ixgbe_fwd_add(struct net_device *pdev, struct net_device *vdev)
7667 struct ixgbe_fwd_adapter *fwd_adapter = NULL;
7668 struct ixgbe_adapter *adapter = netdev_priv(pdev);
7673 if (vdev->num_rx_queues != vdev->num_tx_queues) {
7674 netdev_info(pdev, "%s: Only supports a single queue count for TX and RX\n",
7676 return ERR_PTR(-EINVAL);
7679 /* Check for hardware restriction on number of rx/tx queues */
7680 if (vdev->num_tx_queues > IXGBE_MAX_L2A_QUEUES ||
7681 vdev->num_tx_queues == IXGBE_BAD_L2A_QUEUE) {
7683 "%s: Supports RX/TX Queue counts 1,2, and 4\n",
7685 return ERR_PTR(-EINVAL);
7688 if (((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
7689 adapter->num_rx_pools > IXGBE_MAX_DCBMACVLANS - 1) ||
7690 (adapter->num_rx_pools > IXGBE_MAX_MACVLANS))
7691 return ERR_PTR(-EBUSY);
7693 fwd_adapter = kcalloc(1, sizeof(struct ixgbe_fwd_adapter), GFP_KERNEL);
7695 return ERR_PTR(-ENOMEM);
7697 pool = find_first_zero_bit(&adapter->fwd_bitmask, 32);
7698 adapter->num_rx_pools++;
7699 set_bit(pool, &adapter->fwd_bitmask);
7700 limit = find_last_bit(&adapter->fwd_bitmask, 32);
7702 /* Enable VMDq flag so device will be set in VM mode */
7703 adapter->flags |= IXGBE_FLAG_VMDQ_ENABLED | IXGBE_FLAG_SRIOV_ENABLED;
7704 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
7705 adapter->ring_feature[RING_F_RSS].limit = vdev->num_tx_queues;
7707 /* Force reinit of ring allocation with VMDQ enabled */
7708 err = ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
7711 fwd_adapter->pool = pool;
7712 fwd_adapter->real_adapter = adapter;
7713 err = ixgbe_fwd_ring_up(vdev, fwd_adapter);
7716 netif_tx_start_all_queues(vdev);
7719 /* unwind counter and free adapter struct */
7721 "%s: dfwd hardware acceleration failed\n", vdev->name);
7722 clear_bit(pool, &adapter->fwd_bitmask);
7723 adapter->num_rx_pools--;
7725 return ERR_PTR(err);
7728 static void ixgbe_fwd_del(struct net_device *pdev, void *priv)
7730 struct ixgbe_fwd_adapter *fwd_adapter = priv;
7731 struct ixgbe_adapter *adapter = fwd_adapter->real_adapter;
7734 clear_bit(fwd_adapter->pool, &adapter->fwd_bitmask);
7735 adapter->num_rx_pools--;
7737 limit = find_last_bit(&adapter->fwd_bitmask, 32);
7738 adapter->ring_feature[RING_F_VMDQ].limit = limit + 1;
7739 ixgbe_fwd_ring_down(fwd_adapter->netdev, fwd_adapter);
7740 ixgbe_setup_tc(pdev, netdev_get_num_tc(pdev));
7741 netdev_dbg(pdev, "pool %i:%i queues %i:%i VSI bitmask %lx\n",
7742 fwd_adapter->pool, adapter->num_rx_pools,
7743 fwd_adapter->rx_base_queue,
7744 fwd_adapter->rx_base_queue + adapter->num_rx_queues_per_pool,
7745 adapter->fwd_bitmask);
7749 static const struct net_device_ops ixgbe_netdev_ops = {
7750 .ndo_open = ixgbe_open,
7751 .ndo_stop = ixgbe_close,
7752 .ndo_start_xmit = ixgbe_xmit_frame,
7753 .ndo_select_queue = ixgbe_select_queue,
7754 .ndo_set_rx_mode = ixgbe_set_rx_mode,
7755 .ndo_validate_addr = eth_validate_addr,
7756 .ndo_set_mac_address = ixgbe_set_mac,
7757 .ndo_change_mtu = ixgbe_change_mtu,
7758 .ndo_tx_timeout = ixgbe_tx_timeout,
7759 .ndo_vlan_rx_add_vid = ixgbe_vlan_rx_add_vid,
7760 .ndo_vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid,
7761 .ndo_do_ioctl = ixgbe_ioctl,
7762 .ndo_set_vf_mac = ixgbe_ndo_set_vf_mac,
7763 .ndo_set_vf_vlan = ixgbe_ndo_set_vf_vlan,
7764 .ndo_set_vf_tx_rate = ixgbe_ndo_set_vf_bw,
7765 .ndo_set_vf_spoofchk = ixgbe_ndo_set_vf_spoofchk,
7766 .ndo_get_vf_config = ixgbe_ndo_get_vf_config,
7767 .ndo_get_stats64 = ixgbe_get_stats64,
7768 #ifdef CONFIG_IXGBE_DCB
7769 .ndo_setup_tc = ixgbe_setup_tc,
7771 #ifdef CONFIG_NET_POLL_CONTROLLER
7772 .ndo_poll_controller = ixgbe_netpoll,
7774 #ifdef CONFIG_NET_RX_BUSY_POLL
7775 .ndo_busy_poll = ixgbe_low_latency_recv,
7778 .ndo_fcoe_ddp_setup = ixgbe_fcoe_ddp_get,
7779 .ndo_fcoe_ddp_target = ixgbe_fcoe_ddp_target,
7780 .ndo_fcoe_ddp_done = ixgbe_fcoe_ddp_put,
7781 .ndo_fcoe_enable = ixgbe_fcoe_enable,
7782 .ndo_fcoe_disable = ixgbe_fcoe_disable,
7783 .ndo_fcoe_get_wwn = ixgbe_fcoe_get_wwn,
7784 .ndo_fcoe_get_hbainfo = ixgbe_fcoe_get_hbainfo,
7785 #endif /* IXGBE_FCOE */
7786 .ndo_set_features = ixgbe_set_features,
7787 .ndo_fix_features = ixgbe_fix_features,
7788 .ndo_fdb_add = ixgbe_ndo_fdb_add,
7789 .ndo_bridge_setlink = ixgbe_ndo_bridge_setlink,
7790 .ndo_bridge_getlink = ixgbe_ndo_bridge_getlink,
7791 .ndo_dfwd_add_station = ixgbe_fwd_add,
7792 .ndo_dfwd_del_station = ixgbe_fwd_del,
7796 * ixgbe_enumerate_functions - Get the number of ports this device has
7797 * @adapter: adapter structure
7799 * This function enumerates the phsyical functions co-located on a single slot,
7800 * in order to determine how many ports a device has. This is most useful in
7801 * determining the required GT/s of PCIe bandwidth necessary for optimal
7804 static inline int ixgbe_enumerate_functions(struct ixgbe_adapter *adapter)
7806 struct list_head *entry;
7809 /* Some cards can not use the generic count PCIe functions method,
7810 * because they are behind a parent switch, so we hardcode these with
7811 * the correct number of functions.
7813 if (ixgbe_pcie_from_parent(&adapter->hw)) {
7816 list_for_each(entry, &adapter->pdev->bus_list) {
7817 struct pci_dev *pdev =
7818 list_entry(entry, struct pci_dev, bus_list);
7819 /* don't count virtual functions */
7820 if (!pdev->is_virtfn)
7829 * ixgbe_wol_supported - Check whether device supports WoL
7830 * @hw: hw specific details
7831 * @device_id: the device ID
7832 * @subdev_id: the subsystem device ID
7834 * This function is used by probe and ethtool to determine
7835 * which devices have WoL support
7838 int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
7841 struct ixgbe_hw *hw = &adapter->hw;
7842 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
7843 int is_wol_supported = 0;
7845 switch (device_id) {
7846 case IXGBE_DEV_ID_82599_SFP:
7847 /* Only these subdevices could supports WOL */
7848 switch (subdevice_id) {
7849 case IXGBE_SUBDEV_ID_82599_SFP_WOL0:
7850 case IXGBE_SUBDEV_ID_82599_560FLR:
7851 /* only support first port */
7852 if (hw->bus.func != 0)
7854 case IXGBE_SUBDEV_ID_82599_SP_560FLR:
7855 case IXGBE_SUBDEV_ID_82599_SFP:
7856 case IXGBE_SUBDEV_ID_82599_RNDC:
7857 case IXGBE_SUBDEV_ID_82599_ECNA_DP:
7858 case IXGBE_SUBDEV_ID_82599_LOM_SFP:
7859 is_wol_supported = 1;
7863 case IXGBE_DEV_ID_82599EN_SFP:
7864 /* Only this subdevice supports WOL */
7865 switch (subdevice_id) {
7866 case IXGBE_SUBDEV_ID_82599EN_SFP_OCP1:
7867 is_wol_supported = 1;
7871 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
7872 /* All except this subdevice support WOL */
7873 if (subdevice_id != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
7874 is_wol_supported = 1;
7876 case IXGBE_DEV_ID_82599_KX4:
7877 is_wol_supported = 1;
7879 case IXGBE_DEV_ID_X540T:
7880 case IXGBE_DEV_ID_X540T1:
7881 /* check eeprom to see if enabled wol */
7882 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
7883 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
7884 (hw->bus.func == 0))) {
7885 is_wol_supported = 1;
7890 return is_wol_supported;
7894 * ixgbe_probe - Device Initialization Routine
7895 * @pdev: PCI device information struct
7896 * @ent: entry in ixgbe_pci_tbl
7898 * Returns 0 on success, negative on failure
7900 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
7901 * The OS initialization, configuring of the adapter private structure,
7902 * and a hardware reset occur.
7904 static int ixgbe_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7906 struct net_device *netdev;
7907 struct ixgbe_adapter *adapter = NULL;
7908 struct ixgbe_hw *hw;
7909 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
7910 static int cards_found;
7911 int i, err, pci_using_dac, expected_gts;
7912 unsigned int indices = MAX_TX_QUEUES;
7913 u8 part_str[IXGBE_PBANUM_LENGTH];
7919 /* Catch broken hardware that put the wrong VF device ID in
7920 * the PCIe SR-IOV capability.
7922 if (pdev->is_virtfn) {
7923 WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
7924 pci_name(pdev), pdev->vendor, pdev->device);
7928 err = pci_enable_device_mem(pdev);
7932 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
7935 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7938 "No usable DMA configuration, aborting\n");
7944 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
7945 IORESOURCE_MEM), ixgbe_driver_name);
7948 "pci_request_selected_regions failed 0x%x\n", err);
7952 pci_enable_pcie_error_reporting(pdev);
7954 pci_set_master(pdev);
7955 pci_save_state(pdev);
7957 if (ii->mac == ixgbe_mac_82598EB) {
7958 #ifdef CONFIG_IXGBE_DCB
7959 /* 8 TC w/ 4 queues per TC */
7960 indices = 4 * MAX_TRAFFIC_CLASS;
7962 indices = IXGBE_MAX_RSS_INDICES;
7966 netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
7969 goto err_alloc_etherdev;
7972 SET_NETDEV_DEV(netdev, &pdev->dev);
7974 adapter = netdev_priv(netdev);
7975 pci_set_drvdata(pdev, adapter);
7977 adapter->netdev = netdev;
7978 adapter->pdev = pdev;
7981 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7983 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
7984 pci_resource_len(pdev, 0));
7985 adapter->io_addr = hw->hw_addr;
7991 netdev->netdev_ops = &ixgbe_netdev_ops;
7992 ixgbe_set_ethtool_ops(netdev);
7993 netdev->watchdog_timeo = 5 * HZ;
7994 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
7996 adapter->bd_number = cards_found;
7999 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
8000 hw->mac.type = ii->mac;
8003 memcpy(&hw->eeprom.ops, ii->eeprom_ops, sizeof(hw->eeprom.ops));
8004 eec = IXGBE_READ_REG(hw, IXGBE_EEC);
8005 /* If EEPROM is valid (bit 8 = 1), use default otherwise use bit bang */
8006 if (!(eec & (1 << 8)))
8007 hw->eeprom.ops.read = &ixgbe_read_eeprom_bit_bang_generic;
8010 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
8011 hw->phy.sfp_type = ixgbe_sfp_type_unknown;
8012 /* ixgbe_identify_phy_generic will set prtad and mmds properly */
8013 hw->phy.mdio.prtad = MDIO_PRTAD_NONE;
8014 hw->phy.mdio.mmds = 0;
8015 hw->phy.mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
8016 hw->phy.mdio.dev = netdev;
8017 hw->phy.mdio.mdio_read = ixgbe_mdio_read;
8018 hw->phy.mdio.mdio_write = ixgbe_mdio_write;
8020 ii->get_invariants(hw);
8022 /* setup the private structure */
8023 err = ixgbe_sw_init(adapter);
8027 /* Cache if MNG FW is up so we don't have to read the REG later */
8028 if (hw->mac.ops.mng_fw_enabled)
8029 hw->mng_fw_enabled = hw->mac.ops.mng_fw_enabled(hw);
8031 /* Make it possible the adapter to be woken up via WOL */
8032 switch (adapter->hw.mac.type) {
8033 case ixgbe_mac_82599EB:
8034 case ixgbe_mac_X540:
8035 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8042 * If there is a fan on this device and it has failed log the
8045 if (adapter->flags & IXGBE_FLAG_FAN_FAIL_CAPABLE) {
8046 u32 esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
8047 if (esdp & IXGBE_ESDP_SDP1)
8048 e_crit(probe, "Fan has stopped, replace the adapter\n");
8051 if (allow_unsupported_sfp)
8052 hw->allow_unsupported_sfp = allow_unsupported_sfp;
8054 /* reset_hw fills in the perm_addr as well */
8055 hw->phy.reset_if_overtemp = true;
8056 err = hw->mac.ops.reset_hw(hw);
8057 hw->phy.reset_if_overtemp = false;
8058 if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
8059 hw->mac.type == ixgbe_mac_82598EB) {
8061 } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
8062 e_dev_err("failed to load because an unsupported SFP+ or QSFP module type was detected.\n");
8063 e_dev_err("Reload the driver after installing a supported module.\n");
8066 e_dev_err("HW Init failed: %d\n", err);
8070 #ifdef CONFIG_PCI_IOV
8071 /* SR-IOV not supported on the 82598 */
8072 if (adapter->hw.mac.type == ixgbe_mac_82598EB)
8075 ixgbe_init_mbx_params_pf(hw);
8076 memcpy(&hw->mbx.ops, ii->mbx_ops, sizeof(hw->mbx.ops));
8077 pci_sriov_set_totalvfs(pdev, IXGBE_MAX_VFS_DRV_LIMIT);
8078 ixgbe_enable_sriov(adapter);
8082 netdev->features = NETIF_F_SG |
8085 NETIF_F_HW_VLAN_CTAG_TX |
8086 NETIF_F_HW_VLAN_CTAG_RX |
8087 NETIF_F_HW_VLAN_CTAG_FILTER |
8093 netdev->hw_features = netdev->features | NETIF_F_HW_L2FW_DOFFLOAD;
8095 switch (adapter->hw.mac.type) {
8096 case ixgbe_mac_82599EB:
8097 case ixgbe_mac_X540:
8098 netdev->features |= NETIF_F_SCTP_CSUM;
8099 netdev->hw_features |= NETIF_F_SCTP_CSUM |
8106 netdev->hw_features |= NETIF_F_RXALL;
8108 netdev->vlan_features |= NETIF_F_TSO;
8109 netdev->vlan_features |= NETIF_F_TSO6;
8110 netdev->vlan_features |= NETIF_F_IP_CSUM;
8111 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
8112 netdev->vlan_features |= NETIF_F_SG;
8114 netdev->priv_flags |= IFF_UNICAST_FLT;
8115 netdev->priv_flags |= IFF_SUPP_NOFCS;
8117 #ifdef CONFIG_IXGBE_DCB
8118 netdev->dcbnl_ops = &dcbnl_ops;
8122 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
8123 unsigned int fcoe_l;
8125 if (hw->mac.ops.get_device_caps) {
8126 hw->mac.ops.get_device_caps(hw, &device_caps);
8127 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
8128 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
8132 fcoe_l = min_t(int, IXGBE_FCRETA_SIZE, num_online_cpus());
8133 adapter->ring_feature[RING_F_FCOE].limit = fcoe_l;
8135 netdev->features |= NETIF_F_FSO |
8138 netdev->vlan_features |= NETIF_F_FSO |
8142 #endif /* IXGBE_FCOE */
8143 if (pci_using_dac) {
8144 netdev->features |= NETIF_F_HIGHDMA;
8145 netdev->vlan_features |= NETIF_F_HIGHDMA;
8148 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
8149 netdev->hw_features |= NETIF_F_LRO;
8150 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
8151 netdev->features |= NETIF_F_LRO;
8153 /* make sure the EEPROM is good */
8154 if (hw->eeprom.ops.validate_checksum(hw, NULL) < 0) {
8155 e_dev_err("The EEPROM Checksum Is Not Valid\n");
8160 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
8162 if (!is_valid_ether_addr(netdev->dev_addr)) {
8163 e_dev_err("invalid MAC address\n");
8168 setup_timer(&adapter->service_timer, &ixgbe_service_timer,
8169 (unsigned long) adapter);
8171 INIT_WORK(&adapter->service_task, ixgbe_service_task);
8172 clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
8174 err = ixgbe_init_interrupt_scheme(adapter);
8178 /* WOL not supported for all devices */
8180 hw->eeprom.ops.read(hw, 0x2c, &adapter->eeprom_cap);
8181 hw->wol_enabled = ixgbe_wol_supported(adapter, pdev->device,
8182 pdev->subsystem_device);
8183 if (hw->wol_enabled)
8184 adapter->wol = IXGBE_WUFC_MAG;
8186 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
8188 /* save off EEPROM version number */
8189 hw->eeprom.ops.read(hw, 0x2e, &adapter->eeprom_verh);
8190 hw->eeprom.ops.read(hw, 0x2d, &adapter->eeprom_verl);
8192 /* pick up the PCI bus settings for reporting later */
8193 hw->mac.ops.get_bus_info(hw);
8194 if (ixgbe_pcie_from_parent(hw))
8195 ixgbe_get_parent_bus_info(adapter);
8197 /* calculate the expected PCIe bandwidth required for optimal
8198 * performance. Note that some older parts will never have enough
8199 * bandwidth due to being older generation PCIe parts. We clamp these
8200 * parts to ensure no warning is displayed if it can't be fixed.
8202 switch (hw->mac.type) {
8203 case ixgbe_mac_82598EB:
8204 expected_gts = min(ixgbe_enumerate_functions(adapter) * 10, 16);
8207 expected_gts = ixgbe_enumerate_functions(adapter) * 10;
8210 ixgbe_check_minimum_link(adapter, expected_gts);
8212 err = ixgbe_read_pba_string_generic(hw, part_str, IXGBE_PBANUM_LENGTH);
8214 strncpy(part_str, "Unknown", IXGBE_PBANUM_LENGTH);
8215 if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
8216 e_dev_info("MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
8217 hw->mac.type, hw->phy.type, hw->phy.sfp_type,
8220 e_dev_info("MAC: %d, PHY: %d, PBA No: %s\n",
8221 hw->mac.type, hw->phy.type, part_str);
8223 e_dev_info("%pM\n", netdev->dev_addr);
8225 /* reset the hardware with the new settings */
8226 err = hw->mac.ops.start_hw(hw);
8227 if (err == IXGBE_ERR_EEPROM_VERSION) {
8228 /* We are running on a pre-production device, log a warning */
8229 e_dev_warn("This device is a pre-production adapter/LOM. "
8230 "Please be aware there may be issues associated "
8231 "with your hardware. If you are experiencing "
8232 "problems please contact your Intel or hardware "
8233 "representative who provided you with this "
8236 strcpy(netdev->name, "eth%d");
8237 err = register_netdev(netdev);
8241 /* power down the optics for 82599 SFP+ fiber */
8242 if (hw->mac.ops.disable_tx_laser)
8243 hw->mac.ops.disable_tx_laser(hw);
8245 /* carrier off reporting is important to ethtool even BEFORE open */
8246 netif_carrier_off(netdev);
8248 #ifdef CONFIG_IXGBE_DCA
8249 if (dca_add_requester(&pdev->dev) == 0) {
8250 adapter->flags |= IXGBE_FLAG_DCA_ENABLED;
8251 ixgbe_setup_dca(adapter);
8254 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
8255 e_info(probe, "IOV is enabled with %d VFs\n", adapter->num_vfs);
8256 for (i = 0; i < adapter->num_vfs; i++)
8257 ixgbe_vf_configuration(pdev, (i | 0x10000000));
8260 /* firmware requires driver version to be 0xFFFFFFFF
8261 * since os does not support feature
8263 if (hw->mac.ops.set_fw_drv_ver)
8264 hw->mac.ops.set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF,
8267 /* add san mac addr to netdev */
8268 ixgbe_add_sanmac_netdev(netdev);
8270 e_dev_info("%s\n", ixgbe_default_device_descr);
8273 #ifdef CONFIG_IXGBE_HWMON
8274 if (ixgbe_sysfs_init(adapter))
8275 e_err(probe, "failed to allocate sysfs resources\n");
8276 #endif /* CONFIG_IXGBE_HWMON */
8278 ixgbe_dbg_adapter_init(adapter);
8280 /* Need link setup for MNG FW, else wait for IXGBE_UP */
8281 if (hw->mng_fw_enabled && hw->mac.ops.setup_link)
8282 hw->mac.ops.setup_link(hw,
8283 IXGBE_LINK_SPEED_10GB_FULL | IXGBE_LINK_SPEED_1GB_FULL,
8289 ixgbe_release_hw_control(adapter);
8290 ixgbe_clear_interrupt_scheme(adapter);
8292 ixgbe_disable_sriov(adapter);
8293 adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
8294 iounmap(adapter->io_addr);
8296 free_netdev(netdev);
8298 pci_release_selected_regions(pdev,
8299 pci_select_bars(pdev, IORESOURCE_MEM));
8302 pci_disable_device(pdev);
8307 * ixgbe_remove - Device Removal Routine
8308 * @pdev: PCI device information struct
8310 * ixgbe_remove is called by the PCI subsystem to alert the driver
8311 * that it should release a PCI device. The could be caused by a
8312 * Hot-Plug event, or because the driver is going to be removed from
8315 static void ixgbe_remove(struct pci_dev *pdev)
8317 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8318 struct net_device *netdev = adapter->netdev;
8320 ixgbe_dbg_adapter_exit(adapter);
8322 set_bit(__IXGBE_REMOVING, &adapter->state);
8323 cancel_work_sync(&adapter->service_task);
8326 #ifdef CONFIG_IXGBE_DCA
8327 if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
8328 adapter->flags &= ~IXGBE_FLAG_DCA_ENABLED;
8329 dca_remove_requester(&pdev->dev);
8330 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_CTRL, 1);
8334 #ifdef CONFIG_IXGBE_HWMON
8335 ixgbe_sysfs_exit(adapter);
8336 #endif /* CONFIG_IXGBE_HWMON */
8338 /* remove the added san mac */
8339 ixgbe_del_sanmac_netdev(netdev);
8341 if (netdev->reg_state == NETREG_REGISTERED)
8342 unregister_netdev(netdev);
8344 #ifdef CONFIG_PCI_IOV
8346 * Only disable SR-IOV on unload if the user specified the now
8347 * deprecated max_vfs module parameter.
8350 ixgbe_disable_sriov(adapter);
8352 ixgbe_clear_interrupt_scheme(adapter);
8354 ixgbe_release_hw_control(adapter);
8357 kfree(adapter->ixgbe_ieee_pfc);
8358 kfree(adapter->ixgbe_ieee_ets);
8361 iounmap(adapter->io_addr);
8362 pci_release_selected_regions(pdev, pci_select_bars(pdev,
8365 e_dev_info("complete\n");
8367 free_netdev(netdev);
8369 pci_disable_pcie_error_reporting(pdev);
8371 pci_disable_device(pdev);
8375 * ixgbe_io_error_detected - called when PCI error is detected
8376 * @pdev: Pointer to PCI device
8377 * @state: The current pci connection state
8379 * This function is called after a PCI bus error affecting
8380 * this device has been detected.
8382 static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
8383 pci_channel_state_t state)
8385 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8386 struct net_device *netdev = adapter->netdev;
8388 #ifdef CONFIG_PCI_IOV
8389 struct ixgbe_hw *hw = &adapter->hw;
8390 struct pci_dev *bdev, *vfdev;
8391 u32 dw0, dw1, dw2, dw3;
8393 u16 req_id, pf_func;
8395 if (adapter->hw.mac.type == ixgbe_mac_82598EB ||
8396 adapter->num_vfs == 0)
8397 goto skip_bad_vf_detection;
8399 bdev = pdev->bus->self;
8400 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
8401 bdev = bdev->bus->self;
8404 goto skip_bad_vf_detection;
8406 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
8408 goto skip_bad_vf_detection;
8410 dw0 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG);
8411 dw1 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 4);
8412 dw2 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 8);
8413 dw3 = ixgbe_read_pci_cfg_dword(hw, pos + PCI_ERR_HEADER_LOG + 12);
8414 if (ixgbe_removed(hw->hw_addr))
8415 goto skip_bad_vf_detection;
8418 /* On the 82599 if bit 7 of the requestor ID is set then it's a VF */
8419 if (!(req_id & 0x0080))
8420 goto skip_bad_vf_detection;
8422 pf_func = req_id & 0x01;
8423 if ((pf_func & 1) == (pdev->devfn & 1)) {
8424 unsigned int device_id;
8426 vf = (req_id & 0x7F) >> 1;
8427 e_dev_err("VF %d has caused a PCIe error\n", vf);
8428 e_dev_err("TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
8429 "%8.8x\tdw3: %8.8x\n",
8430 dw0, dw1, dw2, dw3);
8431 switch (adapter->hw.mac.type) {
8432 case ixgbe_mac_82599EB:
8433 device_id = IXGBE_82599_VF_DEVICE_ID;
8435 case ixgbe_mac_X540:
8436 device_id = IXGBE_X540_VF_DEVICE_ID;
8443 /* Find the pci device of the offending VF */
8444 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL, device_id, NULL);
8446 if (vfdev->devfn == (req_id & 0xFF))
8448 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
8452 * There's a slim chance the VF could have been hot plugged,
8453 * so if it is no longer present we don't need to issue the
8454 * VFLR. Just clean up the AER in that case.
8457 e_dev_err("Issuing VFLR to VF %d\n", vf);
8458 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
8459 /* Free device reference count */
8463 pci_cleanup_aer_uncorrect_error_status(pdev);
8467 * Even though the error may have occurred on the other port
8468 * we still need to increment the vf error reference count for
8469 * both ports because the I/O resume function will be called
8472 adapter->vferr_refcount++;
8474 return PCI_ERS_RESULT_RECOVERED;
8476 skip_bad_vf_detection:
8477 #endif /* CONFIG_PCI_IOV */
8478 netif_device_detach(netdev);
8480 if (state == pci_channel_io_perm_failure)
8481 return PCI_ERS_RESULT_DISCONNECT;
8483 if (netif_running(netdev))
8484 ixgbe_down(adapter);
8485 pci_disable_device(pdev);
8487 /* Request a slot reset. */
8488 return PCI_ERS_RESULT_NEED_RESET;
8492 * ixgbe_io_slot_reset - called after the pci bus has been reset.
8493 * @pdev: Pointer to PCI device
8495 * Restart the card from scratch, as if from a cold-boot.
8497 static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
8499 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8500 pci_ers_result_t result;
8503 if (pci_enable_device_mem(pdev)) {
8504 e_err(probe, "Cannot re-enable PCI device after reset.\n");
8505 result = PCI_ERS_RESULT_DISCONNECT;
8507 adapter->hw.hw_addr = adapter->io_addr;
8508 pci_set_master(pdev);
8509 pci_restore_state(pdev);
8510 pci_save_state(pdev);
8512 pci_wake_from_d3(pdev, false);
8514 ixgbe_reset(adapter);
8515 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
8516 result = PCI_ERS_RESULT_RECOVERED;
8519 err = pci_cleanup_aer_uncorrect_error_status(pdev);
8521 e_dev_err("pci_cleanup_aer_uncorrect_error_status "
8522 "failed 0x%0x\n", err);
8523 /* non-fatal, continue */
8530 * ixgbe_io_resume - called when traffic can start flowing again.
8531 * @pdev: Pointer to PCI device
8533 * This callback is called when the error recovery driver tells us that
8534 * its OK to resume normal operation.
8536 static void ixgbe_io_resume(struct pci_dev *pdev)
8538 struct ixgbe_adapter *adapter = pci_get_drvdata(pdev);
8539 struct net_device *netdev = adapter->netdev;
8541 #ifdef CONFIG_PCI_IOV
8542 if (adapter->vferr_refcount) {
8543 e_info(drv, "Resuming after VF err\n");
8544 adapter->vferr_refcount--;
8549 if (netif_running(netdev))
8552 netif_device_attach(netdev);
8555 static const struct pci_error_handlers ixgbe_err_handler = {
8556 .error_detected = ixgbe_io_error_detected,
8557 .slot_reset = ixgbe_io_slot_reset,
8558 .resume = ixgbe_io_resume,
8561 static struct pci_driver ixgbe_driver = {
8562 .name = ixgbe_driver_name,
8563 .id_table = ixgbe_pci_tbl,
8564 .probe = ixgbe_probe,
8565 .remove = ixgbe_remove,
8567 .suspend = ixgbe_suspend,
8568 .resume = ixgbe_resume,
8570 .shutdown = ixgbe_shutdown,
8571 .sriov_configure = ixgbe_pci_sriov_configure,
8572 .err_handler = &ixgbe_err_handler
8576 * ixgbe_init_module - Driver Registration Routine
8578 * ixgbe_init_module is the first routine called when the driver is
8579 * loaded. All it does is register with the PCI subsystem.
8581 static int __init ixgbe_init_module(void)
8584 pr_info("%s - version %s\n", ixgbe_driver_string, ixgbe_driver_version);
8585 pr_info("%s\n", ixgbe_copyright);
8589 ret = pci_register_driver(&ixgbe_driver);
8595 #ifdef CONFIG_IXGBE_DCA
8596 dca_register_notify(&dca_notifier);
8602 module_init(ixgbe_init_module);
8605 * ixgbe_exit_module - Driver Exit Cleanup Routine
8607 * ixgbe_exit_module is called just before the driver is removed
8610 static void __exit ixgbe_exit_module(void)
8612 #ifdef CONFIG_IXGBE_DCA
8613 dca_unregister_notify(&dca_notifier);
8615 pci_unregister_driver(&ixgbe_driver);
8619 rcu_barrier(); /* Wait for completion of call_rcu()'s */
8622 #ifdef CONFIG_IXGBE_DCA
8623 static int ixgbe_notify_dca(struct notifier_block *nb, unsigned long event,
8628 ret_val = driver_for_each_device(&ixgbe_driver.driver, NULL, &event,
8629 __ixgbe_notify_dca);
8631 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
8634 #endif /* CONFIG_IXGBE_DCA */
8636 module_exit(ixgbe_exit_module);