drivers/media/pci/cx23885/cx23885-dvb.c

   1 /*
   2  *  Driver for the Conexant CX23885 PCIe bridge
   3  *
   4  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *
  15  *  GNU General Public License for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License
  18  *  along with this program; if not, write to the Free Software
  19  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20  */
  21
  22 #include <linux/module.h>
  23 #include <linux/init.h>
  24 #include <linux/device.h>
  25 #include <linux/fs.h>
  26 #include <linux/kthread.h>
  27 #include <linux/file.h>
  28 #include <linux/suspend.h>
  29
  30 #include "cx23885.h"
  31 #include <media/v4l2-common.h>
  32
  33 #include "dvb_ca_en50221.h"
  34 #include "s5h1409.h"
  35 #include "s5h1411.h"
  36 #include "mt2131.h"
  37 #include "tda8290.h"
  38 #include "tda18271.h"
  39 #include "lgdt330x.h"
  40 #include "xc4000.h"
  41 #include "xc5000.h"
  42 #include "max2165.h"
  43 #include "tda10048.h"
  44 #include "tuner-xc2028.h"
  45 #include "tuner-simple.h"
  46 #include "dib7000p.h"
  47 #include "dibx000_common.h"
  48 #include "zl10353.h"
  49 #include "stv0900.h"
  50 #include "stv0900_reg.h"
  51 #include "stv6110.h"
  52 #include "lnbh24.h"
  53 #include "cx24116.h"
  54 #include "cimax2.h"
  55 #include "lgs8gxx.h"
  56 #include "netup-eeprom.h"
  57 #include "netup-init.h"
  58 #include "lgdt3305.h"
  59 #include "atbm8830.h"
  60 #include "ts2020.h"
  61 #include "ds3000.h"
  62 #include "cx23885-f300.h"
  63 #include "altera-ci.h"
  64 #include "stv0367.h"
  65 #include "drxk.h"
  66 #include "mt2063.h"
  67 #include "stv090x.h"
  68 #include "stb6100.h"
  69 #include "stb6100_cfg.h"
  70 #include "tda10071.h"
  71 #include "a8293.h"
  72 #include "mb86a20s.h"
  73
  74 static unsigned int debug;
  75
  76 #define dprintk(level, fmt, arg...)\
  77         do { if (debug >= level)\
  78                 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
  79         } while (0)
  80
  81 /* ------------------------------------------------------------------ */
  82
  83 static unsigned int alt_tuner;
  84 module_param(alt_tuner, int, 0644);
  85 MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
  86
  87 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  88
  89 /* ------------------------------------------------------------------ */
  90
  91 static int dvb_buf_setup(struct videobuf_queue *q,
  92                          unsigned int *count, unsigned int *size)
  93 {
  94         struct cx23885_tsport *port = q->priv_data;
  95
  96         port->ts_packet_size  = 188 * 4;
  97         port->ts_packet_count = 32;
  98
  99         *size  = port->ts_packet_size * port->ts_packet_count;
 100         *count = 32;
 101         return 0;
 102 }
 103
 104 static int dvb_buf_prepare(struct videobuf_queue *q,
 105                            struct videobuf_buffer *vb, enum v4l2_field field)
 106 {
 107         struct cx23885_tsport *port = q->priv_data;
 108         return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field);
 109 }
 110
 111 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
 112 {
 113         struct cx23885_tsport *port = q->priv_data;
 114         cx23885_buf_queue(port, (struct cx23885_buffer *)vb);
 115 }
 116
 117 static void dvb_buf_release(struct videobuf_queue *q,
 118                             struct videobuf_buffer *vb)
 119 {
 120         cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
 121 }
 122
 123 static void cx23885_dvb_gate_ctrl(struct cx23885_tsport  *port, int open)
 124 {
 125         struct videobuf_dvb_frontends *f;
 126         struct videobuf_dvb_frontend *fe;
 127
 128         f = &port->frontends;
 129
 130         if (f->gate <= 1) /* undefined or fe0 */
 131                 fe = videobuf_dvb_get_frontend(f, 1);
 132         else
 133                 fe = videobuf_dvb_get_frontend(f, f->gate);
 134
 135         if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
 136                 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
 137 }
 138
 139 static struct videobuf_queue_ops dvb_qops = {
 140         .buf_setup    = dvb_buf_setup,
 141         .buf_prepare  = dvb_buf_prepare,
 142         .buf_queue    = dvb_buf_queue,
 143         .buf_release  = dvb_buf_release,
 144 };
 145
 146 static struct s5h1409_config hauppauge_generic_config = {
 147         .demod_address = 0x32 >> 1,
 148         .output_mode   = S5H1409_SERIAL_OUTPUT,
 149         .gpio          = S5H1409_GPIO_ON,
 150         .qam_if        = 44000,
 151         .inversion     = S5H1409_INVERSION_OFF,
 152         .status_mode   = S5H1409_DEMODLOCKING,
 153         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
 154 };
 155
 156 static struct tda10048_config hauppauge_hvr1200_config = {
 157         .demod_address    = 0x10 >> 1,
 158         .output_mode      = TDA10048_SERIAL_OUTPUT,
 159         .fwbulkwritelen   = TDA10048_BULKWRITE_200,
 160         .inversion        = TDA10048_INVERSION_ON,
 161         .dtv6_if_freq_khz = TDA10048_IF_3300,
 162         .dtv7_if_freq_khz = TDA10048_IF_3800,
 163         .dtv8_if_freq_khz = TDA10048_IF_4300,
 164         .clk_freq_khz     = TDA10048_CLK_16000,
 165 };
 166
 167 static struct tda10048_config hauppauge_hvr1210_config = {
 168         .demod_address    = 0x10 >> 1,
 169         .output_mode      = TDA10048_SERIAL_OUTPUT,
 170         .fwbulkwritelen   = TDA10048_BULKWRITE_200,
 171         .inversion        = TDA10048_INVERSION_ON,
 172         .dtv6_if_freq_khz = TDA10048_IF_3300,
 173         .dtv7_if_freq_khz = TDA10048_IF_3500,
 174         .dtv8_if_freq_khz = TDA10048_IF_4000,
 175         .clk_freq_khz     = TDA10048_CLK_16000,
 176 };
 177
 178 static struct s5h1409_config hauppauge_ezqam_config = {
 179         .demod_address = 0x32 >> 1,
 180         .output_mode   = S5H1409_SERIAL_OUTPUT,
 181         .gpio          = S5H1409_GPIO_OFF,
 182         .qam_if        = 4000,
 183         .inversion     = S5H1409_INVERSION_ON,
 184         .status_mode   = S5H1409_DEMODLOCKING,
 185         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
 186 };
 187
 188 static struct s5h1409_config hauppauge_hvr1800lp_config = {
 189         .demod_address = 0x32 >> 1,
 190         .output_mode   = S5H1409_SERIAL_OUTPUT,
 191         .gpio          = S5H1409_GPIO_OFF,
 192         .qam_if        = 44000,
 193         .inversion     = S5H1409_INVERSION_OFF,
 194         .status_mode   = S5H1409_DEMODLOCKING,
 195         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
 196 };
 197
 198 static struct s5h1409_config hauppauge_hvr1500_config = {
 199         .demod_address = 0x32 >> 1,
 200         .output_mode   = S5H1409_SERIAL_OUTPUT,
 201         .gpio          = S5H1409_GPIO_OFF,
 202         .inversion     = S5H1409_INVERSION_OFF,
 203         .status_mode   = S5H1409_DEMODLOCKING,
 204         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
 205 };
 206
 207 static struct mt2131_config hauppauge_generic_tunerconfig = {
 208         0x61
 209 };
 210
 211 static struct lgdt330x_config fusionhdtv_5_express = {
 212         .demod_address = 0x0e,
 213         .demod_chip = LGDT3303,
 214         .serial_mpeg = 0x40,
 215 };
 216
 217 static struct s5h1409_config hauppauge_hvr1500q_config = {
 218         .demod_address = 0x32 >> 1,
 219         .output_mode   = S5H1409_SERIAL_OUTPUT,
 220         .gpio          = S5H1409_GPIO_ON,
 221         .qam_if        = 44000,
 222         .inversion     = S5H1409_INVERSION_OFF,
 223         .status_mode   = S5H1409_DEMODLOCKING,
 224         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
 225 };
 226
 227 static struct s5h1409_config dvico_s5h1409_config = {
 228         .demod_address = 0x32 >> 1,
 229         .output_mode   = S5H1409_SERIAL_OUTPUT,
 230         .gpio          = S5H1409_GPIO_ON,
 231         .qam_if        = 44000,
 232         .inversion     = S5H1409_INVERSION_OFF,
 233         .status_mode   = S5H1409_DEMODLOCKING,
 234         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
 235 };
 236
 237 static struct s5h1411_config dvico_s5h1411_config = {
 238         .output_mode   = S5H1411_SERIAL_OUTPUT,
 239         .gpio          = S5H1411_GPIO_ON,
 240         .qam_if        = S5H1411_IF_44000,
 241         .vsb_if        = S5H1411_IF_44000,
 242         .inversion     = S5H1411_INVERSION_OFF,
 243         .status_mode   = S5H1411_DEMODLOCKING,
 244         .mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
 245 };
 246
 247 static struct s5h1411_config hcw_s5h1411_config = {
 248         .output_mode   = S5H1411_SERIAL_OUTPUT,
 249         .gpio          = S5H1411_GPIO_OFF,
 250         .vsb_if        = S5H1411_IF_44000,
 251         .qam_if        = S5H1411_IF_4000,
 252         .inversion     = S5H1411_INVERSION_ON,
 253         .status_mode   = S5H1411_DEMODLOCKING,
 254         .mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
 255 };
 256
 257 static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
 258         .i2c_address      = 0x61,
 259         .if_khz           = 5380,
 260 };
 261
 262 static struct xc5000_config dvico_xc5000_tunerconfig = {
 263         .i2c_address      = 0x64,
 264         .if_khz           = 5380,
 265 };
 266
 267 static struct tda829x_config tda829x_no_probe = {
 268         .probe_tuner = TDA829X_DONT_PROBE,
 269 };
 270
 271 static struct tda18271_std_map hauppauge_tda18271_std_map = {
 272         .atsc_6   = { .if_freq = 5380, .agc_mode = 3, .std = 3,
 273                       .if_lvl = 6, .rfagc_top = 0x37 },
 274         .qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 0,
 275                       .if_lvl = 6, .rfagc_top = 0x37 },
 276 };
 277
 278 static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
 279         .dvbt_6   = { .if_freq = 3300, .agc_mode = 3, .std = 4,
 280                       .if_lvl = 1, .rfagc_top = 0x37, },
 281         .dvbt_7   = { .if_freq = 3800, .agc_mode = 3, .std = 5,
 282                       .if_lvl = 1, .rfagc_top = 0x37, },
 283         .dvbt_8   = { .if_freq = 4300, .agc_mode = 3, .std = 6,
 284                       .if_lvl = 1, .rfagc_top = 0x37, },
 285 };
 286
 287 static struct tda18271_config hauppauge_tda18271_config = {
 288         .std_map = &hauppauge_tda18271_std_map,
 289         .gate    = TDA18271_GATE_ANALOG,
 290         .output_opt = TDA18271_OUTPUT_LT_OFF,
 291 };
 292
 293 static struct tda18271_config hauppauge_hvr1200_tuner_config = {
 294         .std_map = &hauppauge_hvr1200_tda18271_std_map,
 295         .gate    = TDA18271_GATE_ANALOG,
 296         .output_opt = TDA18271_OUTPUT_LT_OFF,
 297 };
 298
 299 static struct tda18271_config hauppauge_hvr1210_tuner_config = {
 300         .gate    = TDA18271_GATE_DIGITAL,
 301         .output_opt = TDA18271_OUTPUT_LT_OFF,
 302 };
 303
 304 static struct tda18271_std_map hauppauge_hvr127x_std_map = {
 305         .atsc_6   = { .if_freq = 3250, .agc_mode = 3, .std = 4,
 306                       .if_lvl = 1, .rfagc_top = 0x58 },
 307         .qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 5,
 308                       .if_lvl = 1, .rfagc_top = 0x58 },
 309 };
 310
 311 static struct tda18271_config hauppauge_hvr127x_config = {
 312         .std_map = &hauppauge_hvr127x_std_map,
 313         .output_opt = TDA18271_OUTPUT_LT_OFF,
 314 };
 315
 316 static struct lgdt3305_config hauppauge_lgdt3305_config = {
 317         .i2c_addr           = 0x0e,
 318         .mpeg_mode          = LGDT3305_MPEG_SERIAL,
 319         .tpclk_edge         = LGDT3305_TPCLK_FALLING_EDGE,
 320         .tpvalid_polarity   = LGDT3305_TP_VALID_HIGH,
 321         .deny_i2c_rptr      = 1,
 322         .spectral_inversion = 1,
 323         .qam_if_khz         = 4000,
 324         .vsb_if_khz         = 3250,
 325 };
 326
 327 static struct dibx000_agc_config xc3028_agc_config = {
 328         BAND_VHF | BAND_UHF,    /* band_caps */
 329
 330         /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
 331          * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
 332          * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
 333          * P_agc_nb_est=2, P_agc_write=0
 334          */
 335         (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
 336                 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
 337
 338         712,    /* inv_gain */
 339         21,     /* time_stabiliz */
 340
 341         0,      /* alpha_level */
 342         118,    /* thlock */
 343
 344         0,      /* wbd_inv */
 345         2867,   /* wbd_ref */
 346         0,      /* wbd_sel */
 347         2,      /* wbd_alpha */
 348
 349         0,      /* agc1_max */
 350         0,      /* agc1_min */
 351         39718,  /* agc2_max */
 352         9930,   /* agc2_min */
 353         0,      /* agc1_pt1 */
 354         0,      /* agc1_pt2 */
 355         0,      /* agc1_pt3 */
 356         0,      /* agc1_slope1 */
 357         0,      /* agc1_slope2 */
 358         0,      /* agc2_pt1 */
 359         128,    /* agc2_pt2 */
 360         29,     /* agc2_slope1 */
 361         29,     /* agc2_slope2 */
 362
 363         17,     /* alpha_mant */
 364         27,     /* alpha_exp */
 365         23,     /* beta_mant */
 366         51,     /* beta_exp */
 367
 368         1,      /* perform_agc_softsplit */
 369 };
 370
 371 /* PLL Configuration for COFDM BW_MHz = 8.000000
 372  * With external clock = 30.000000 */
 373 static struct dibx000_bandwidth_config xc3028_bw_config = {
 374         60000,  /* internal */
 375         30000,  /* sampling */
 376         1,      /* pll_cfg: prediv */
 377         8,      /* pll_cfg: ratio */
 378         3,      /* pll_cfg: range */
 379         1,      /* pll_cfg: reset */
 380         0,      /* pll_cfg: bypass */
 381         0,      /* misc: refdiv */
 382         0,      /* misc: bypclk_div */
 383         1,      /* misc: IO_CLK_en_core */
 384         1,      /* misc: ADClkSrc */
 385         0,      /* misc: modulo */
 386         (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
 387         (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
 388         20452225, /* timf */
 389         30000000  /* xtal_hz */
 390 };
 391
 392 static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
 393         .output_mpeg2_in_188_bytes = 1,
 394         .hostbus_diversity = 1,
 395         .tuner_is_baseband = 0,
 396         .update_lna  = NULL,
 397
 398         .agc_config_count = 1,
 399         .agc = &xc3028_agc_config,
 400         .bw  = &xc3028_bw_config,
 401
 402         .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
 403         .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
 404         .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
 405
 406         .pwm_freq_div = 0,
 407         .agc_control  = NULL,
 408         .spur_protect = 0,
 409
 410         .output_mode = OUTMODE_MPEG2_SERIAL,
 411 };
 412
 413 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
 414         .demod_address = 0x0f,
 415         .if2           = 45600,
 416         .no_tuner      = 1,
 417         .disable_i2c_gate_ctrl = 1,
 418 };
 419
 420 static struct stv0900_reg stv0900_ts_regs[] = {
 421         { R0900_TSGENERAL, 0x00 },
 422         { R0900_P1_TSSPEED, 0x40 },
 423         { R0900_P2_TSSPEED, 0x40 },
 424         { R0900_P1_TSCFGM, 0xc0 },
 425         { R0900_P2_TSCFGM, 0xc0 },
 426         { R0900_P1_TSCFGH, 0xe0 },
 427         { R0900_P2_TSCFGH, 0xe0 },
 428         { R0900_P1_TSCFGL, 0x20 },
 429         { R0900_P2_TSCFGL, 0x20 },
 430         { 0xffff, 0xff }, /* terminate */
 431 };
 432
 433 static struct stv0900_config netup_stv0900_config = {
 434         .demod_address = 0x68,
 435         .demod_mode = 1, /* dual */
 436         .xtal = 8000000,
 437         .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
 438         .diseqc_mode = 2,/* 2/3 PWM */
 439         .ts_config_regs = stv0900_ts_regs,
 440         .tun1_maddress = 0,/* 0x60 */
 441         .tun2_maddress = 3,/* 0x63 */
 442         .tun1_adc = 1,/* 1 Vpp */
 443         .tun2_adc = 1,/* 1 Vpp */
 444 };
 445
 446 static struct stv6110_config netup_stv6110_tunerconfig_a = {
 447         .i2c_address = 0x60,
 448         .mclk = 16000000,
 449         .clk_div = 1,
 450         .gain = 8, /* +16 dB  - maximum gain */
 451 };
 452
 453 static struct stv6110_config netup_stv6110_tunerconfig_b = {
 454         .i2c_address = 0x63,
 455         .mclk = 16000000,
 456         .clk_div = 1,
 457         .gain = 8, /* +16 dB  - maximum gain */
 458 };
 459
 460 static struct cx24116_config tbs_cx24116_config = {
 461         .demod_address = 0x55,
 462 };
 463
 464 static struct ds3000_config tevii_ds3000_config = {
 465         .demod_address = 0x68,
 466 };
 467
 468 static struct ts2020_config tevii_ts2020_config  = {
 469         .tuner_address = 0x60,
 470         .clk_out_div = 1,
 471 };
 472
 473 static struct cx24116_config dvbworld_cx24116_config = {
 474         .demod_address = 0x05,
 475 };
 476
 477 static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
 478         .prod = LGS8GXX_PROD_LGS8GL5,
 479         .demod_address = 0x19,
 480         .serial_ts = 0,
 481         .ts_clk_pol = 1,
 482         .ts_clk_gated = 1,
 483         .if_clk_freq = 30400, /* 30.4 MHz */
 484         .if_freq = 5380, /* 5.38 MHz */
 485         .if_neg_center = 1,
 486         .ext_adc = 0,
 487         .adc_signed = 0,
 488         .if_neg_edge = 0,
 489 };
 490
 491 static struct xc5000_config mygica_x8506_xc5000_config = {
 492         .i2c_address = 0x61,
 493         .if_khz = 5380,
 494 };
 495
 496 static struct mb86a20s_config mygica_x8507_mb86a20s_config = {
 497         .demod_address = 0x10,
 498 };
 499
 500 static struct xc5000_config mygica_x8507_xc5000_config = {
 501         .i2c_address = 0x61,
 502         .if_khz = 4000,
 503 };
 504
 505 static struct stv090x_config prof_8000_stv090x_config = {
 506         .device                 = STV0903,
 507         .demod_mode             = STV090x_SINGLE,
 508         .clk_mode               = STV090x_CLK_EXT,
 509         .xtal                   = 27000000,
 510         .address                = 0x6A,
 511         .ts1_mode               = STV090x_TSMODE_PARALLEL_PUNCTURED,
 512         .repeater_level         = STV090x_RPTLEVEL_64,
 513         .adc1_range             = STV090x_ADC_2Vpp,
 514         .diseqc_envelope_mode   = false,
 515
 516         .tuner_get_frequency    = stb6100_get_frequency,
 517         .tuner_set_frequency    = stb6100_set_frequency,
 518         .tuner_set_bandwidth    = stb6100_set_bandwidth,
 519         .tuner_get_bandwidth    = stb6100_get_bandwidth,
 520 };
 521
 522 static struct stb6100_config prof_8000_stb6100_config = {
 523         .tuner_address = 0x60,
 524         .refclock = 27000000,
 525 };
 526
 527 static int p8000_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
 528 {
 529         struct cx23885_tsport *port = fe->dvb->priv;
 530         struct cx23885_dev *dev = port->dev;
 531
 532         if (voltage == SEC_VOLTAGE_18)
 533                 cx_write(MC417_RWD, 0x00001e00);
 534         else if (voltage == SEC_VOLTAGE_13)
 535                 cx_write(MC417_RWD, 0x00001a00);
 536         else
 537                 cx_write(MC417_RWD, 0x00001800);
 538         return 0;
 539 }
 540
 541 static int cx23885_dvb_set_frontend(struct dvb_frontend *fe)
 542 {
 543         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
 544         struct cx23885_tsport *port = fe->dvb->priv;
 545         struct cx23885_dev *dev = port->dev;
 546
 547         switch (dev->board) {
 548         case CX23885_BOARD_HAUPPAUGE_HVR1275:
 549                 switch (p->modulation) {
 550                 case VSB_8:
 551                         cx23885_gpio_clear(dev, GPIO_5);
 552                         break;
 553                 case QAM_64:
 554                 case QAM_256:
 555                 default:
 556                         cx23885_gpio_set(dev, GPIO_5);
 557                         break;
 558                 }
 559                 break;
 560         case CX23885_BOARD_MYGICA_X8506:
 561         case CX23885_BOARD_MYGICA_X8507:
 562         case CX23885_BOARD_MAGICPRO_PROHDTVE2:
 563                 /* Select Digital TV */
 564                 cx23885_gpio_set(dev, GPIO_0);
 565                 break;
 566         }
 567
 568         /* Call the real set_frontend */
 569         if (port->set_frontend)
 570                 return port->set_frontend(fe);
 571
 572         return 0;
 573 }
 574
 575 static void cx23885_set_frontend_hook(struct cx23885_tsport *port,
 576                                      struct dvb_frontend *fe)
 577 {
 578         port->set_frontend = fe->ops.set_frontend;
 579         fe->ops.set_frontend = cx23885_dvb_set_frontend;
 580 }
 581
 582 static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
 583         .prod = LGS8GXX_PROD_LGS8G75,
 584         .demod_address = 0x19,
 585         .serial_ts = 0,
 586         .ts_clk_pol = 1,
 587         .ts_clk_gated = 1,
 588         .if_clk_freq = 30400, /* 30.4 MHz */
 589         .if_freq = 6500, /* 6.50 MHz */
 590         .if_neg_center = 1,
 591         .ext_adc = 0,
 592         .adc_signed = 1,
 593         .adc_vpp = 2, /* 1.6 Vpp */
 594         .if_neg_edge = 1,
 595 };
 596
 597 static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
 598         .i2c_address = 0x61,
 599         .if_khz = 6500,
 600 };
 601
 602 static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = {
 603         .prod = ATBM8830_PROD_8830,
 604         .demod_address = 0x44,
 605         .serial_ts = 0,
 606         .ts_sampling_edge = 1,
 607         .ts_clk_gated = 0,
 608         .osc_clk_freq = 30400, /* in kHz */
 609         .if_freq = 0, /* zero IF */
 610         .zif_swap_iq = 1,
 611         .agc_min = 0x2E,
 612         .agc_max = 0xFF,
 613         .agc_hold_loop = 0,
 614 };
 615
 616 static struct max2165_config mygic_x8558pro_max2165_cfg1 = {
 617         .i2c_address = 0x60,
 618         .osc_clk = 20
 619 };
 620
 621 static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = {
 622         .prod = ATBM8830_PROD_8830,
 623         .demod_address = 0x44,
 624         .serial_ts = 1,
 625         .ts_sampling_edge = 1,
 626         .ts_clk_gated = 0,
 627         .osc_clk_freq = 30400, /* in kHz */
 628         .if_freq = 0, /* zero IF */
 629         .zif_swap_iq = 1,
 630         .agc_min = 0x2E,
 631         .agc_max = 0xFF,
 632         .agc_hold_loop = 0,
 633 };
 634
 635 static struct max2165_config mygic_x8558pro_max2165_cfg2 = {
 636         .i2c_address = 0x60,
 637         .osc_clk = 20
 638 };
 639 static struct stv0367_config netup_stv0367_config[] = {
 640         {
 641                 .demod_address = 0x1c,
 642                 .xtal = 27000000,
 643                 .if_khz = 4500,
 644                 .if_iq_mode = 0,
 645                 .ts_mode = 1,
 646                 .clk_pol = 0,
 647         }, {
 648                 .demod_address = 0x1d,
 649                 .xtal = 27000000,
 650                 .if_khz = 4500,
 651                 .if_iq_mode = 0,
 652                 .ts_mode = 1,
 653                 .clk_pol = 0,
 654         },
 655 };
 656
 657 static struct xc5000_config netup_xc5000_config[] = {
 658         {
 659                 .i2c_address = 0x61,
 660                 .if_khz = 4500,
 661         }, {
 662                 .i2c_address = 0x64,
 663                 .if_khz = 4500,
 664         },
 665 };
 666
 667 static struct drxk_config terratec_drxk_config[] = {
 668         {
 669                 .adr = 0x29,
 670                 .no_i2c_bridge = 1,
 671         }, {
 672                 .adr = 0x2a,
 673                 .no_i2c_bridge = 1,
 674         },
 675 };
 676
 677 static struct mt2063_config terratec_mt2063_config[] = {
 678         {
 679                 .tuner_address = 0x60,
 680         }, {
 681                 .tuner_address = 0x67,
 682         },
 683 };
 684
 685 static const struct tda10071_config hauppauge_tda10071_config = {
 686         .demod_i2c_addr = 0x05,
 687         .tuner_i2c_addr = 0x54,
 688         .i2c_wr_max = 64,
 689         .ts_mode = TDA10071_TS_SERIAL,
 690         .spec_inv = 0,
 691         .xtal = 40444000, /* 40.444 MHz */
 692         .pll_multiplier = 20,
 693 };
 694
 695 static const struct a8293_config hauppauge_a8293_config = {
 696         .i2c_addr = 0x0b,
 697 };
 698
 699 static int netup_altera_fpga_rw(void *device, int flag, int data, int read)
 700 {
 701         struct cx23885_dev *dev = (struct cx23885_dev *)device;
 702         unsigned long timeout = jiffies + msecs_to_jiffies(1);
 703         uint32_t mem = 0;
 704
 705         mem = cx_read(MC417_RWD);
 706         if (read)
 707                 cx_set(MC417_OEN, ALT_DATA);
 708         else {
 709                 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
 710                 mem &= ~ALT_DATA;
 711                 mem |= (data & ALT_DATA);
 712         }
 713
 714         if (flag)
 715                 mem |= ALT_AD_RG;
 716         else
 717                 mem &= ~ALT_AD_RG;
 718
 719         mem &= ~ALT_CS;
 720         if (read)
 721                 mem = (mem & ~ALT_RD) | ALT_WR;
 722         else
 723                 mem = (mem & ~ALT_WR) | ALT_RD;
 724
 725         cx_write(MC417_RWD, mem);  /* start RW cycle */
 726
 727         for (;;) {
 728                 mem = cx_read(MC417_RWD);
 729                 if ((mem & ALT_RDY) == 0)
 730                         break;
 731                 if (time_after(jiffies, timeout))
 732                         break;
 733                 udelay(1);
 734         }
 735
 736         cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS);
 737         if (read)
 738                 return mem & ALT_DATA;
 739
 740         return 0;
 741 };
 742
 743 static int dvb_register(struct cx23885_tsport *port)
 744 {
 745         struct cx23885_dev *dev = port->dev;
 746         struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
 747         struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
 748         int mfe_shared = 0; /* bus not shared by default */
 749         int ret;
 750
 751         /* Get the first frontend */
 752         fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
 753         if (!fe0)
 754                 return -EINVAL;
 755
 756         /* init struct videobuf_dvb */
 757         fe0->dvb.name = dev->name;
 758
 759         /* multi-frontend gate control is undefined or defaults to fe0 */
 760         port->frontends.gate = 0;
 761
 762         /* Sets the gate control callback to be used by i2c command calls */
 763         port->gate_ctrl = cx23885_dvb_gate_ctrl;
 764
 765         /* init frontend */
 766         switch (dev->board) {
 767         case CX23885_BOARD_HAUPPAUGE_HVR1250:
 768                 i2c_bus = &dev->i2c_bus[0];
 769                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
 770                                                 &hauppauge_generic_config,
 771                                                 &i2c_bus->i2c_adap);
 772                 if (fe0->dvb.frontend != NULL) {
 773                         dvb_attach(mt2131_attach, fe0->dvb.frontend,
 774                                    &i2c_bus->i2c_adap,
 775                                    &hauppauge_generic_tunerconfig, 0);
 776                 }
 777                 break;
 778         case CX23885_BOARD_HAUPPAUGE_HVR1270:
 779         case CX23885_BOARD_HAUPPAUGE_HVR1275:
 780                 i2c_bus = &dev->i2c_bus[0];
 781                 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
 782                                                &hauppauge_lgdt3305_config,
 783                                                &i2c_bus->i2c_adap);
 784                 if (fe0->dvb.frontend != NULL) {
 785                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
 786                                    0x60, &dev->i2c_bus[1].i2c_adap,
 787                                    &hauppauge_hvr127x_config);
 788                 }
 789                 if (dev->board == CX23885_BOARD_HAUPPAUGE_HVR1275)
 790                         cx23885_set_frontend_hook(port, fe0->dvb.frontend);
 791                 break;
 792         case CX23885_BOARD_HAUPPAUGE_HVR1255:
 793         case CX23885_BOARD_HAUPPAUGE_HVR1255_22111:
 794                 i2c_bus = &dev->i2c_bus[0];
 795                 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
 796                                                &hcw_s5h1411_config,
 797                                                &i2c_bus->i2c_adap);
 798                 if (fe0->dvb.frontend != NULL) {
 799                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
 800                                    0x60, &dev->i2c_bus[1].i2c_adap,
 801                                    &hauppauge_tda18271_config);
 802                 }
 803
 804                 tda18271_attach(&dev->ts1.analog_fe,
 805                         0x60, &dev->i2c_bus[1].i2c_adap,
 806                         &hauppauge_tda18271_config);
 807
 808                 break;
 809         case CX23885_BOARD_HAUPPAUGE_HVR1800:
 810                 i2c_bus = &dev->i2c_bus[0];
 811                 switch (alt_tuner) {
 812                 case 1:
 813                         fe0->dvb.frontend =
 814                                 dvb_attach(s5h1409_attach,
 815                                            &hauppauge_ezqam_config,
 816                                            &i2c_bus->i2c_adap);
 817                         if (fe0->dvb.frontend != NULL) {
 818                                 dvb_attach(tda829x_attach, fe0->dvb.frontend,
 819                                            &dev->i2c_bus[1].i2c_adap, 0x42,
 820                                            &tda829x_no_probe);
 821                                 dvb_attach(tda18271_attach, fe0->dvb.frontend,
 822                                            0x60, &dev->i2c_bus[1].i2c_adap,
 823                                            &hauppauge_tda18271_config);
 824                         }
 825                         break;
 826                 case 0:
 827                 default:
 828                         fe0->dvb.frontend =
 829                                 dvb_attach(s5h1409_attach,
 830                                            &hauppauge_generic_config,
 831                                            &i2c_bus->i2c_adap);
 832                         if (fe0->dvb.frontend != NULL)
 833                                 dvb_attach(mt2131_attach, fe0->dvb.frontend,
 834                                            &i2c_bus->i2c_adap,
 835                                            &hauppauge_generic_tunerconfig, 0);
 836                         break;
 837                 }
 838                 break;
 839         case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
 840                 i2c_bus = &dev->i2c_bus[0];
 841                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
 842                                                 &hauppauge_hvr1800lp_config,
 843                                                 &i2c_bus->i2c_adap);
 844                 if (fe0->dvb.frontend != NULL) {
 845                         dvb_attach(mt2131_attach, fe0->dvb.frontend,
 846                                    &i2c_bus->i2c_adap,
 847                                    &hauppauge_generic_tunerconfig, 0);
 848                 }
 849                 break;
 850         case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
 851                 i2c_bus = &dev->i2c_bus[0];
 852                 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
 853                                                 &fusionhdtv_5_express,
 854                                                 &i2c_bus->i2c_adap);
 855                 if (fe0->dvb.frontend != NULL) {
 856                         dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
 857                                    &i2c_bus->i2c_adap, 0x61,
 858                                    TUNER_LG_TDVS_H06XF);
 859                 }
 860                 break;
 861         case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
 862                 i2c_bus = &dev->i2c_bus[1];
 863                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
 864                                                 &hauppauge_hvr1500q_config,
 865                                                 &dev->i2c_bus[0].i2c_adap);
 866                 if (fe0->dvb.frontend != NULL)
 867                         dvb_attach(xc5000_attach, fe0->dvb.frontend,
 868                                    &i2c_bus->i2c_adap,
 869                                    &hauppauge_hvr1500q_tunerconfig);
 870                 break;
 871         case CX23885_BOARD_HAUPPAUGE_HVR1500:
 872                 i2c_bus = &dev->i2c_bus[1];
 873                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
 874                                                 &hauppauge_hvr1500_config,
 875                                                 &dev->i2c_bus[0].i2c_adap);
 876                 if (fe0->dvb.frontend != NULL) {
 877                         struct dvb_frontend *fe;
 878                         struct xc2028_config cfg = {
 879                                 .i2c_adap  = &i2c_bus->i2c_adap,
 880                                 .i2c_addr  = 0x61,
 881                         };
 882                         static struct xc2028_ctrl ctl = {
 883                                 .fname       = XC2028_DEFAULT_FIRMWARE,
 884                                 .max_len     = 64,
 885                                 .demod       = XC3028_FE_OREN538,
 886                         };
 887
 888                         fe = dvb_attach(xc2028_attach,
 889                                         fe0->dvb.frontend, &cfg);
 890                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
 891                                 fe->ops.tuner_ops.set_config(fe, &ctl);
 892                 }
 893                 break;
 894         case CX23885_BOARD_HAUPPAUGE_HVR1200:
 895         case CX23885_BOARD_HAUPPAUGE_HVR1700:
 896                 i2c_bus = &dev->i2c_bus[0];
 897                 fe0->dvb.frontend = dvb_attach(tda10048_attach,
 898                         &hauppauge_hvr1200_config,
 899                         &i2c_bus->i2c_adap);
 900                 if (fe0->dvb.frontend != NULL) {
 901                         dvb_attach(tda829x_attach, fe0->dvb.frontend,
 902                                 &dev->i2c_bus[1].i2c_adap, 0x42,
 903                                 &tda829x_no_probe);
 904                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
 905                                 0x60, &dev->i2c_bus[1].i2c_adap,
 906                                 &hauppauge_hvr1200_tuner_config);
 907                 }
 908                 break;
 909         case CX23885_BOARD_HAUPPAUGE_HVR1210:
 910                 i2c_bus = &dev->i2c_bus[0];
 911                 fe0->dvb.frontend = dvb_attach(tda10048_attach,
 912                         &hauppauge_hvr1210_config,
 913                         &i2c_bus->i2c_adap);
 914                 if (fe0->dvb.frontend != NULL) {
 915                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
 916                                 0x60, &dev->i2c_bus[1].i2c_adap,
 917                                 &hauppauge_hvr1210_tuner_config);
 918                 }
 919                 break;
 920         case CX23885_BOARD_HAUPPAUGE_HVR1400:
 921                 i2c_bus = &dev->i2c_bus[0];
 922                 fe0->dvb.frontend = dvb_attach(dib7000p_attach,
 923                         &i2c_bus->i2c_adap,
 924                         0x12, &hauppauge_hvr1400_dib7000_config);
 925                 if (fe0->dvb.frontend != NULL) {
 926                         struct dvb_frontend *fe;
 927                         struct xc2028_config cfg = {
 928                                 .i2c_adap  = &dev->i2c_bus[1].i2c_adap,
 929                                 .i2c_addr  = 0x64,
 930                         };
 931                         static struct xc2028_ctrl ctl = {
 932                                 .fname   = XC3028L_DEFAULT_FIRMWARE,
 933                                 .max_len = 64,
 934                                 .demod   = XC3028_FE_DIBCOM52,
 935                                 /* This is true for all demods with
 936                                         v36 firmware? */
 937                                 .type    = XC2028_D2633,
 938                         };
 939
 940                         fe = dvb_attach(xc2028_attach,
 941                                         fe0->dvb.frontend, &cfg);
 942                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
 943                                 fe->ops.tuner_ops.set_config(fe, &ctl);
 944                 }
 945                 break;
 946         case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
 947                 i2c_bus = &dev->i2c_bus[port->nr - 1];
 948
 949                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
 950                                                 &dvico_s5h1409_config,
 951                                                 &i2c_bus->i2c_adap);
 952                 if (fe0->dvb.frontend == NULL)
 953                         fe0->dvb.frontend = dvb_attach(s5h1411_attach,
 954                                                         &dvico_s5h1411_config,
 955                                                         &i2c_bus->i2c_adap);
 956                 if (fe0->dvb.frontend != NULL)
 957                         dvb_attach(xc5000_attach, fe0->dvb.frontend,
 958                                    &i2c_bus->i2c_adap,
 959                                    &dvico_xc5000_tunerconfig);
 960                 break;
 961         case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
 962                 i2c_bus = &dev->i2c_bus[port->nr - 1];
 963
 964                 fe0->dvb.frontend = dvb_attach(zl10353_attach,
 965                                                &dvico_fusionhdtv_xc3028,
 966                                                &i2c_bus->i2c_adap);
 967                 if (fe0->dvb.frontend != NULL) {
 968                         struct dvb_frontend      *fe;
 969                         struct xc2028_config      cfg = {
 970                                 .i2c_adap  = &i2c_bus->i2c_adap,
 971                                 .i2c_addr  = 0x61,
 972                         };
 973                         static struct xc2028_ctrl ctl = {
 974                                 .fname       = XC2028_DEFAULT_FIRMWARE,
 975                                 .max_len     = 64,
 976                                 .demod       = XC3028_FE_ZARLINK456,
 977                         };
 978
 979                         fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
 980                                         &cfg);
 981                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
 982                                 fe->ops.tuner_ops.set_config(fe, &ctl);
 983                 }
 984                 break;
 985         }
 986         case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
 987         case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
 988         case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
 989                 i2c_bus = &dev->i2c_bus[0];
 990
 991                 fe0->dvb.frontend = dvb_attach(zl10353_attach,
 992                         &dvico_fusionhdtv_xc3028,
 993                         &i2c_bus->i2c_adap);
 994                 if (fe0->dvb.frontend != NULL) {
 995                         struct dvb_frontend      *fe;
 996                         struct xc2028_config      cfg = {
 997                                 .i2c_adap  = &dev->i2c_bus[1].i2c_adap,
 998                                 .i2c_addr  = 0x61,
 999                         };
1000                         static struct xc2028_ctrl ctl = {
1001                                 .fname       = XC2028_DEFAULT_FIRMWARE,
1002                                 .max_len     = 64,
1003                                 .demod       = XC3028_FE_ZARLINK456,
1004                         };
1005
1006                         fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
1007                                 &cfg);
1008                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
1009                                 fe->ops.tuner_ops.set_config(fe, &ctl);
1010                 }
1011                 break;
1012         case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000:
1013                 i2c_bus = &dev->i2c_bus[0];
1014
1015                 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1016                                                &dvico_fusionhdtv_xc3028,
1017                                                &i2c_bus->i2c_adap);
1018                 if (fe0->dvb.frontend != NULL) {
1019                         struct dvb_frontend     *fe;
1020                         struct xc4000_config    cfg = {
1021                                 .i2c_address      = 0x61,
1022                                 .default_pm       = 0,
1023                                 .dvb_amplitude    = 134,
1024                                 .set_smoothedcvbs = 1,
1025                                 .if_khz           = 4560
1026                         };
1027
1028                         fe = dvb_attach(xc4000_attach, fe0->dvb.frontend,
1029                                         &dev->i2c_bus[1].i2c_adap, &cfg);
1030                         if (!fe) {
1031                                 printk(KERN_ERR "%s/2: xc4000 attach failed\n",
1032                                        dev->name);
1033                                 goto frontend_detach;
1034                         }
1035                 }
1036                 break;
1037         case CX23885_BOARD_TBS_6920:
1038                 i2c_bus = &dev->i2c_bus[1];
1039
1040                 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1041                                         &tbs_cx24116_config,
1042                                         &i2c_bus->i2c_adap);
1043                 if (fe0->dvb.frontend != NULL)
1044                         fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
1045
1046                 break;
1047         case CX23885_BOARD_TEVII_S470:
1048                 i2c_bus = &dev->i2c_bus[1];
1049
1050                 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1051                                         &tevii_ds3000_config,
1052                                         &i2c_bus->i2c_adap);
1053                 if (fe0->dvb.frontend != NULL) {
1054                         dvb_attach(ts2020_attach, fe0->dvb.frontend,
1055                                 &tevii_ts2020_config, &i2c_bus->i2c_adap);
1056                         fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
1057                 }
1058
1059                 break;
1060         case CX23885_BOARD_DVBWORLD_2005:
1061                 i2c_bus = &dev->i2c_bus[1];
1062
1063                 fe0->dvb.frontend = dvb_attach(cx24116_attach,
1064                         &dvbworld_cx24116_config,
1065                         &i2c_bus->i2c_adap);
1066                 break;
1067         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1068                 i2c_bus = &dev->i2c_bus[0];
1069                 switch (port->nr) {
1070                 /* port B */
1071                 case 1:
1072                         fe0->dvb.frontend = dvb_attach(stv0900_attach,
1073                                                         &netup_stv0900_config,
1074                                                         &i2c_bus->i2c_adap, 0);
1075                         if (fe0->dvb.frontend != NULL) {
1076                                 if (dvb_attach(stv6110_attach,
1077                                                 fe0->dvb.frontend,
1078                                                 &netup_stv6110_tunerconfig_a,
1079                                                 &i2c_bus->i2c_adap)) {
1080                                         if (!dvb_attach(lnbh24_attach,
1081                                                         fe0->dvb.frontend,
1082                                                         &i2c_bus->i2c_adap,
1083                                                         LNBH24_PCL | LNBH24_TTX,
1084                                                         LNBH24_TEN, 0x09))
1085                                                 printk(KERN_ERR
1086                                                         "No LNBH24 found!\n");
1087
1088                                 }
1089                         }
1090                         break;
1091                 /* port C */
1092                 case 2:
1093                         fe0->dvb.frontend = dvb_attach(stv0900_attach,
1094                                                         &netup_stv0900_config,
1095                                                         &i2c_bus->i2c_adap, 1);
1096                         if (fe0->dvb.frontend != NULL) {
1097                                 if (dvb_attach(stv6110_attach,
1098                                                 fe0->dvb.frontend,
1099                                                 &netup_stv6110_tunerconfig_b,
1100                                                 &i2c_bus->i2c_adap)) {
1101                                         if (!dvb_attach(lnbh24_attach,
1102                                                         fe0->dvb.frontend,
1103                                                         &i2c_bus->i2c_adap,
1104                                                         LNBH24_PCL | LNBH24_TTX,
1105                                                         LNBH24_TEN, 0x0a))
1106                                                 printk(KERN_ERR
1107                                                         "No LNBH24 found!\n");
1108
1109                                 }
1110                         }
1111                         break;
1112                 }
1113                 break;
1114         case CX23885_BOARD_MYGICA_X8506:
1115                 i2c_bus = &dev->i2c_bus[0];
1116                 i2c_bus2 = &dev->i2c_bus[1];
1117                 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1118                         &mygica_x8506_lgs8gl5_config,
1119                         &i2c_bus->i2c_adap);
1120                 if (fe0->dvb.frontend != NULL) {
1121                         dvb_attach(xc5000_attach,
1122                                 fe0->dvb.frontend,
1123                                 &i2c_bus2->i2c_adap,
1124                                 &mygica_x8506_xc5000_config);
1125                 }
1126                 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1127                 break;
1128         case CX23885_BOARD_MYGICA_X8507:
1129                 i2c_bus = &dev->i2c_bus[0];
1130                 i2c_bus2 = &dev->i2c_bus[1];
1131                 fe0->dvb.frontend = dvb_attach(mb86a20s_attach,
1132                         &mygica_x8507_mb86a20s_config,
1133                         &i2c_bus->i2c_adap);
1134                 if (fe0->dvb.frontend != NULL) {
1135                         dvb_attach(xc5000_attach,
1136                         fe0->dvb.frontend,
1137                         &i2c_bus2->i2c_adap,
1138                         &mygica_x8507_xc5000_config);
1139                 }
1140                 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1141                 break;
1142         case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1143                 i2c_bus = &dev->i2c_bus[0];
1144                 i2c_bus2 = &dev->i2c_bus[1];
1145                 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1146                         &magicpro_prohdtve2_lgs8g75_config,
1147                         &i2c_bus->i2c_adap);
1148                 if (fe0->dvb.frontend != NULL) {
1149                         dvb_attach(xc5000_attach,
1150                                 fe0->dvb.frontend,
1151                                 &i2c_bus2->i2c_adap,
1152                                 &magicpro_prohdtve2_xc5000_config);
1153                 }
1154                 cx23885_set_frontend_hook(port, fe0->dvb.frontend);
1155                 break;
1156         case CX23885_BOARD_HAUPPAUGE_HVR1850:
1157                 i2c_bus = &dev->i2c_bus[0];
1158                 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1159                         &hcw_s5h1411_config,
1160                         &i2c_bus->i2c_adap);
1161                 if (fe0->dvb.frontend != NULL)
1162                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
1163                                 0x60, &dev->i2c_bus[0].i2c_adap,
1164                                 &hauppauge_tda18271_config);
1165
1166                 tda18271_attach(&dev->ts1.analog_fe,
1167                         0x60, &dev->i2c_bus[1].i2c_adap,
1168                         &hauppauge_tda18271_config);
1169
1170                 break;
1171         case CX23885_BOARD_HAUPPAUGE_HVR1290:
1172                 i2c_bus = &dev->i2c_bus[0];
1173                 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1174                         &hcw_s5h1411_config,
1175                         &i2c_bus->i2c_adap);
1176                 if (fe0->dvb.frontend != NULL)
1177                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
1178                                 0x60, &dev->i2c_bus[0].i2c_adap,
1179                                 &hauppauge_tda18271_config);
1180                 break;
1181         case CX23885_BOARD_MYGICA_X8558PRO:
1182                 switch (port->nr) {
1183                 /* port B */
1184                 case 1:
1185                         i2c_bus = &dev->i2c_bus[0];
1186                         fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1187                                 &mygica_x8558pro_atbm8830_cfg1,
1188                                 &i2c_bus->i2c_adap);
1189                         if (fe0->dvb.frontend != NULL) {
1190                                 dvb_attach(max2165_attach,
1191                                         fe0->dvb.frontend,
1192                                         &i2c_bus->i2c_adap,
1193                                         &mygic_x8558pro_max2165_cfg1);
1194                         }
1195                         break;
1196                 /* port C */
1197                 case 2:
1198                         i2c_bus = &dev->i2c_bus[1];
1199                         fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1200                                 &mygica_x8558pro_atbm8830_cfg2,
1201                                 &i2c_bus->i2c_adap);
1202                         if (fe0->dvb.frontend != NULL) {
1203                                 dvb_attach(max2165_attach,
1204                                         fe0->dvb.frontend,
1205                                         &i2c_bus->i2c_adap,
1206                                         &mygic_x8558pro_max2165_cfg2);
1207                         }
1208                         break;
1209                 }
1210                 break;
1211         case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1212                 i2c_bus = &dev->i2c_bus[0];
1213                 mfe_shared = 1;/* MFE */
1214                 port->frontends.gate = 0;/* not clear for me yet */
1215                 /* ports B, C */
1216                 /* MFE frontend 1 DVB-T */
1217                 fe0->dvb.frontend = dvb_attach(stv0367ter_attach,
1218                                         &netup_stv0367_config[port->nr - 1],
1219                                         &i2c_bus->i2c_adap);
1220                 if (fe0->dvb.frontend != NULL) {
1221                         if (NULL == dvb_attach(xc5000_attach,
1222                                         fe0->dvb.frontend,
1223                                         &i2c_bus->i2c_adap,
1224                                         &netup_xc5000_config[port->nr - 1]))
1225                                 goto frontend_detach;
1226                         /* load xc5000 firmware */
1227                         fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend);
1228                 }
1229                 /* MFE frontend 2 */
1230                 fe1 = videobuf_dvb_get_frontend(&port->frontends, 2);
1231                 if (fe1 == NULL)
1232                         goto frontend_detach;
1233                 /* DVB-C init */
1234                 fe1->dvb.frontend = dvb_attach(stv0367cab_attach,
1235                                         &netup_stv0367_config[port->nr - 1],
1236                                         &i2c_bus->i2c_adap);
1237                 if (fe1->dvb.frontend != NULL) {
1238                         fe1->dvb.frontend->id = 1;
1239                         if (NULL == dvb_attach(xc5000_attach,
1240                                         fe1->dvb.frontend,
1241                                         &i2c_bus->i2c_adap,
1242                                         &netup_xc5000_config[port->nr - 1]))
1243                                 goto frontend_detach;
1244                 }
1245                 break;
1246         case CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL:
1247                 i2c_bus = &dev->i2c_bus[0];
1248                 i2c_bus2 = &dev->i2c_bus[1];
1249
1250                 switch (port->nr) {
1251                 /* port b */
1252                 case 1:
1253                         fe0->dvb.frontend = dvb_attach(drxk_attach,
1254                                         &terratec_drxk_config[0],
1255                                         &i2c_bus->i2c_adap);
1256                         if (fe0->dvb.frontend != NULL) {
1257                                 if (!dvb_attach(mt2063_attach,
1258                                                 fe0->dvb.frontend,
1259                                                 &terratec_mt2063_config[0],
1260                                                 &i2c_bus2->i2c_adap))
1261                                         goto frontend_detach;
1262                         }
1263                         break;
1264                 /* port c */
1265                 case 2:
1266                         fe0->dvb.frontend = dvb_attach(drxk_attach,
1267                                         &terratec_drxk_config[1],
1268                                         &i2c_bus->i2c_adap);
1269                         if (fe0->dvb.frontend != NULL) {
1270                                 if (!dvb_attach(mt2063_attach,
1271                                                 fe0->dvb.frontend,
1272                                                 &terratec_mt2063_config[1],
1273                                                 &i2c_bus2->i2c_adap))
1274                                         goto frontend_detach;
1275                         }
1276                         break;
1277                 }
1278                 break;
1279         case CX23885_BOARD_TEVII_S471:
1280                 i2c_bus = &dev->i2c_bus[1];
1281
1282                 fe0->dvb.frontend = dvb_attach(ds3000_attach,
1283                                         &tevii_ds3000_config,
1284                                         &i2c_bus->i2c_adap);
1285                 if (fe0->dvb.frontend != NULL) {
1286                         dvb_attach(ts2020_attach, fe0->dvb.frontend,
1287                                 &tevii_ts2020_config, &i2c_bus->i2c_adap);
1288                 }
1289                 break;
1290         case CX23885_BOARD_PROF_8000:
1291                 i2c_bus = &dev->i2c_bus[0];
1292
1293                 fe0->dvb.frontend = dvb_attach(stv090x_attach,
1294                                                 &prof_8000_stv090x_config,
1295                                                 &i2c_bus->i2c_adap,
1296                                                 STV090x_DEMODULATOR_0);
1297                 if (fe0->dvb.frontend != NULL) {
1298                         if (!dvb_attach(stb6100_attach,
1299                                         fe0->dvb.frontend,
1300                                         &prof_8000_stb6100_config,
1301                                         &i2c_bus->i2c_adap))
1302                                 goto frontend_detach;
1303
1304                         fe0->dvb.frontend->ops.set_voltage = p8000_set_voltage;
1305                 }
1306                 break;
1307         case CX23885_BOARD_HAUPPAUGE_HVR4400:
1308                 i2c_bus = &dev->i2c_bus[0];
1309                 fe0->dvb.frontend = dvb_attach(tda10071_attach,
1310                                                 &hauppauge_tda10071_config,
1311                                                 &i2c_bus->i2c_adap);
1312                 if (fe0->dvb.frontend != NULL) {
1313                         dvb_attach(a8293_attach, fe0->dvb.frontend,
1314                                    &i2c_bus->i2c_adap,
1315                                    &hauppauge_a8293_config);
1316                 }
1317                 break;
1318         default:
1319                 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
1320                         " isn't supported yet\n",
1321                        dev->name);
1322                 break;
1323         }
1324
1325         if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
1326                 printk(KERN_ERR "%s: frontend initialization failed\n",
1327                        dev->name);
1328                 goto frontend_detach;
1329         }
1330
1331         /* define general-purpose callback pointer */
1332         fe0->dvb.frontend->callback = cx23885_tuner_callback;
1333         if (fe1)
1334                 fe1->dvb.frontend->callback = cx23885_tuner_callback;
1335 #if 0
1336         /* Ensure all frontends negotiate bus access */
1337         fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
1338         if (fe1)
1339                 fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
1340 #endif
1341
1342         /* Put the analog decoder in standby to keep it quiet */
1343         call_all(dev, core, s_power, 0);
1344
1345         if (fe0->dvb.frontend->ops.analog_ops.standby)
1346                 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
1347
1348         /* register everything */
1349         ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
1350                                         &dev->pci->dev, adapter_nr, mfe_shared);
1351         if (ret)
1352                 goto frontend_detach;
1353
1354         /* init CI & MAC */
1355         switch (dev->board) {
1356         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
1357                 static struct netup_card_info cinfo;
1358
1359                 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
1360                 memcpy(port->frontends.adapter.proposed_mac,
1361                                 cinfo.port[port->nr - 1].mac, 6);
1362                 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
1363                         port->nr, port->frontends.adapter.proposed_mac);
1364
1365                 netup_ci_init(port);
1366                 break;
1367                 }
1368         case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1369                 struct altera_ci_config netup_ci_cfg = {
1370                         .dev = dev,/* magic number to identify*/
1371                         .adapter = &port->frontends.adapter,/* for CI */
1372                         .demux = &fe0->dvb.demux,/* for hw pid filter */
1373                         .fpga_rw = netup_altera_fpga_rw,
1374                 };
1375
1376                 altera_ci_init(&netup_ci_cfg, port->nr);
1377                 break;
1378                 }
1379         case CX23885_BOARD_TEVII_S470: {
1380                 u8 eeprom[256]; /* 24C02 i2c eeprom */
1381
1382                 if (port->nr != 1)
1383                         break;
1384
1385                 /* Read entire EEPROM */
1386                 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1387                 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom));
1388                 printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0);
1389                 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
1390                 break;
1391                 }
1392         }
1393
1394         return ret;
1395
1396 frontend_detach:
1397         port->gate_ctrl = NULL;
1398         videobuf_dvb_dealloc_frontends(&port->frontends);
1399         return -EINVAL;
1400 }
1401
1402 int cx23885_dvb_register(struct cx23885_tsport *port)
1403 {
1404
1405         struct videobuf_dvb_frontend *fe0;
1406         struct cx23885_dev *dev = port->dev;
1407         int err, i;
1408
1409         /* Here we need to allocate the correct number of frontends,
1410          * as reflected in the cards struct. The reality is that currently
1411          * no cx23885 boards support this - yet. But, if we don't modify this
1412          * code then the second frontend would never be allocated (later)
1413          * and fail with error before the attach in dvb_register().
1414          * Without these changes we risk an OOPS later. The changes here
1415          * are for safety, and should provide a good foundation for the
1416          * future addition of any multi-frontend cx23885 based boards.
1417          */
1418         printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
1419                 port->num_frontends);
1420
1421         for (i = 1; i <= port->num_frontends; i++) {
1422                 if (videobuf_dvb_alloc_frontend(
1423                         &port->frontends, i) == NULL) {
1424                         printk(KERN_ERR "%s() failed to alloc\n", __func__);
1425                         return -ENOMEM;
1426                 }
1427
1428                 fe0 = videobuf_dvb_get_frontend(&port->frontends, i);
1429                 if (!fe0)
1430                         err = -EINVAL;
1431
1432                 dprintk(1, "%s\n", __func__);
1433                 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
1434                         dev->board,
1435                         dev->name,
1436                         dev->pci_bus,
1437                         dev->pci_slot);
1438
1439                 err = -ENODEV;
1440
1441                 /* dvb stuff */
1442                 /* We have to init the queue for each frontend on a port. */
1443                 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
1444                 videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops,
1445                             &dev->pci->dev, &port->slock,
1446                             V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
1447                             sizeof(struct cx23885_buffer), port, NULL);
1448         }
1449         err = dvb_register(port);
1450         if (err != 0)
1451                 printk(KERN_ERR "%s() dvb_register failed err = %d\n",
1452                         __func__, err);
1453
1454         return err;
1455 }
1456
1457 int cx23885_dvb_unregister(struct cx23885_tsport *port)
1458 {
1459         struct videobuf_dvb_frontend *fe0;
1460
1461         /* FIXME: in an error condition where the we have
1462          * an expected number of frontends (attach problem)
1463          * then this might not clean up correctly, if 1
1464          * is invalid.
1465          * This comment only applies to future boards IF they
1466          * implement MFE support.
1467          */
1468         fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
1469         if (fe0 && fe0->dvb.frontend)
1470                 videobuf_dvb_unregister_bus(&port->frontends);
1471
1472         switch (port->dev->board) {
1473         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1474                 netup_ci_exit(port);
1475                 break;
1476         case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1477                 altera_ci_release(port->dev, port->nr);
1478                 break;
1479         }
1480
1481         port->gate_ctrl = NULL;
1482
1483         return 0;
1484 }
1485