drivers/media/i2c/adv7343.c

   1 /*
   2  * adv7343 - ADV7343 Video Encoder Driver
   3  *
   4  * The encoder hardware does not support SECAM.
   5  *
   6  * Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com/
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation version 2.
  11  *
  12  * This program is distributed .as is. WITHOUT ANY WARRANTY of any
  13  * kind, whether express or implied; without even the implied warranty
  14  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  */
  17
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/ctype.h>
  21 #include <linux/slab.h>
  22 #include <linux/i2c.h>
  23 #include <linux/device.h>
  24 #include <linux/delay.h>
  25 #include <linux/module.h>
  26 #include <linux/videodev2.h>
  27 #include <linux/uaccess.h>
  28
  29 #include <media/adv7343.h>
  30 #include <media/v4l2-async.h>
  31 #include <media/v4l2-device.h>
  32 #include <media/v4l2-ctrls.h>
  33 #include <media/v4l2-of.h>
  34
  35 #include "adv7343_regs.h"
  36
  37 MODULE_DESCRIPTION("ADV7343 video encoder driver");
  38 MODULE_LICENSE("GPL");
  39
  40 static int debug;
  41 module_param(debug, int, 0644);
  42 MODULE_PARM_DESC(debug, "Debug level 0-1");
  43
  44 struct adv7343_state {
  45         struct v4l2_subdev sd;
  46         struct v4l2_ctrl_handler hdl;
  47         const struct adv7343_platform_data *pdata;
  48         u8 reg00;
  49         u8 reg01;
  50         u8 reg02;
  51         u8 reg35;
  52         u8 reg80;
  53         u8 reg82;
  54         u32 output;
  55         v4l2_std_id std;
  56 };
  57
  58 static inline struct adv7343_state *to_state(struct v4l2_subdev *sd)
  59 {
  60         return container_of(sd, struct adv7343_state, sd);
  61 }
  62
  63 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
  64 {
  65         return &container_of(ctrl->handler, struct adv7343_state, hdl)->sd;
  66 }
  67
  68 static inline int adv7343_write(struct v4l2_subdev *sd, u8 reg, u8 value)
  69 {
  70         struct i2c_client *client = v4l2_get_subdevdata(sd);
  71
  72         return i2c_smbus_write_byte_data(client, reg, value);
  73 }
  74
  75 static const u8 adv7343_init_reg_val[] = {
  76         ADV7343_SOFT_RESET, ADV7343_SOFT_RESET_DEFAULT,
  77         ADV7343_POWER_MODE_REG, ADV7343_POWER_MODE_REG_DEFAULT,
  78
  79         ADV7343_HD_MODE_REG1, ADV7343_HD_MODE_REG1_DEFAULT,
  80         ADV7343_HD_MODE_REG2, ADV7343_HD_MODE_REG2_DEFAULT,
  81         ADV7343_HD_MODE_REG3, ADV7343_HD_MODE_REG3_DEFAULT,
  82         ADV7343_HD_MODE_REG4, ADV7343_HD_MODE_REG4_DEFAULT,
  83         ADV7343_HD_MODE_REG5, ADV7343_HD_MODE_REG5_DEFAULT,
  84         ADV7343_HD_MODE_REG6, ADV7343_HD_MODE_REG6_DEFAULT,
  85         ADV7343_HD_MODE_REG7, ADV7343_HD_MODE_REG7_DEFAULT,
  86
  87         ADV7343_SD_MODE_REG1, ADV7343_SD_MODE_REG1_DEFAULT,
  88         ADV7343_SD_MODE_REG2, ADV7343_SD_MODE_REG2_DEFAULT,
  89         ADV7343_SD_MODE_REG3, ADV7343_SD_MODE_REG3_DEFAULT,
  90         ADV7343_SD_MODE_REG4, ADV7343_SD_MODE_REG4_DEFAULT,
  91         ADV7343_SD_MODE_REG5, ADV7343_SD_MODE_REG5_DEFAULT,
  92         ADV7343_SD_MODE_REG6, ADV7343_SD_MODE_REG6_DEFAULT,
  93         ADV7343_SD_MODE_REG7, ADV7343_SD_MODE_REG7_DEFAULT,
  94         ADV7343_SD_MODE_REG8, ADV7343_SD_MODE_REG8_DEFAULT,
  95
  96         ADV7343_SD_HUE_REG, ADV7343_SD_HUE_REG_DEFAULT,
  97         ADV7343_SD_CGMS_WSS0, ADV7343_SD_CGMS_WSS0_DEFAULT,
  98         ADV7343_SD_BRIGHTNESS_WSS, ADV7343_SD_BRIGHTNESS_WSS_DEFAULT,
  99 };
 100
 101 /*
 102  *                          2^32
 103  * FSC(reg) =  FSC (HZ) * --------
 104  *                        27000000
 105  */
 106 static const struct adv7343_std_info stdinfo[] = {
 107         {
 108                 /* FSC(Hz) = 3,579,545.45 Hz */
 109                 SD_STD_NTSC, 569408542, V4L2_STD_NTSC,
 110         }, {
 111                 /* FSC(Hz) = 3,575,611.00 Hz */
 112                 SD_STD_PAL_M, 568782678, V4L2_STD_PAL_M,
 113         }, {
 114                 /* FSC(Hz) = 3,582,056.00 */
 115                 SD_STD_PAL_N, 569807903, V4L2_STD_PAL_Nc,
 116         }, {
 117                 /* FSC(Hz) = 4,433,618.75 Hz */
 118                 SD_STD_PAL_N, 705268427, V4L2_STD_PAL_N,
 119         }, {
 120                 /* FSC(Hz) = 4,433,618.75 Hz */
 121                 SD_STD_PAL_BDGHI, 705268427, V4L2_STD_PAL,
 122         }, {
 123                 /* FSC(Hz) = 4,433,618.75 Hz */
 124                 SD_STD_NTSC, 705268427, V4L2_STD_NTSC_443,
 125         }, {
 126                 /* FSC(Hz) = 4,433,618.75 Hz */
 127                 SD_STD_PAL_M, 705268427, V4L2_STD_PAL_60,
 128         },
 129 };
 130
 131 static int adv7343_setstd(struct v4l2_subdev *sd, v4l2_std_id std)
 132 {
 133         struct adv7343_state *state = to_state(sd);
 134         struct adv7343_std_info *std_info;
 135         int num_std;
 136         char *fsc_ptr;
 137         u8 reg, val;
 138         int err = 0;
 139         int i = 0;
 140
 141         std_info = (struct adv7343_std_info *)stdinfo;
 142         num_std = ARRAY_SIZE(stdinfo);
 143
 144         for (i = 0; i < num_std; i++) {
 145                 if (std_info[i].stdid & std)
 146                         break;
 147         }
 148
 149         if (i == num_std) {
 150                 v4l2_dbg(1, debug, sd,
 151                                 "Invalid std or std is not supported: %llx\n",
 152                                                 (unsigned long long)std);
 153                 return -EINVAL;
 154         }
 155
 156         /* Set the standard */
 157         val = state->reg80 & (~(SD_STD_MASK));
 158         val |= std_info[i].standard_val3;
 159         err = adv7343_write(sd, ADV7343_SD_MODE_REG1, val);
 160         if (err < 0)
 161                 goto setstd_exit;
 162
 163         state->reg80 = val;
 164
 165         /* Configure the input mode register */
 166         val = state->reg01 & (~((u8) INPUT_MODE_MASK));
 167         val |= SD_INPUT_MODE;
 168         err = adv7343_write(sd, ADV7343_MODE_SELECT_REG, val);
 169         if (err < 0)
 170                 goto setstd_exit;
 171
 172         state->reg01 = val;
 173
 174         /* Program the sub carrier frequency registers */
 175         fsc_ptr = (unsigned char *)&std_info[i].fsc_val;
 176         reg = ADV7343_FSC_REG0;
 177         for (i = 0; i < 4; i++, reg++, fsc_ptr++) {
 178                 err = adv7343_write(sd, reg, *fsc_ptr);
 179                 if (err < 0)
 180                         goto setstd_exit;
 181         }
 182
 183         val = state->reg80;
 184
 185         /* Filter settings */
 186         if (std & (V4L2_STD_NTSC | V4L2_STD_NTSC_443))
 187                 val &= 0x03;
 188         else if (std & ~V4L2_STD_SECAM)
 189                 val |= 0x04;
 190
 191         err = adv7343_write(sd, ADV7343_SD_MODE_REG1, val);
 192         if (err < 0)
 193                 goto setstd_exit;
 194
 195         state->reg80 = val;
 196
 197 setstd_exit:
 198         if (err != 0)
 199                 v4l2_err(sd, "Error setting std, write failed\n");
 200
 201         return err;
 202 }
 203
 204 static int adv7343_setoutput(struct v4l2_subdev *sd, u32 output_type)
 205 {
 206         struct adv7343_state *state = to_state(sd);
 207         unsigned char val;
 208         int err = 0;
 209
 210         if (output_type > ADV7343_SVIDEO_ID) {
 211                 v4l2_dbg(1, debug, sd,
 212                         "Invalid output type or output type not supported:%d\n",
 213                                                                 output_type);
 214                 return -EINVAL;
 215         }
 216
 217         /* Enable Appropriate DAC */
 218         val = state->reg00 & 0x03;
 219
 220         /* configure default configuration */
 221         if (!state->pdata)
 222                 if (output_type == ADV7343_COMPOSITE_ID)
 223                         val |= ADV7343_COMPOSITE_POWER_VALUE;
 224                 else if (output_type == ADV7343_COMPONENT_ID)
 225                         val |= ADV7343_COMPONENT_POWER_VALUE;
 226                 else
 227                         val |= ADV7343_SVIDEO_POWER_VALUE;
 228         else
 229                 val = state->pdata->mode_config.sleep_mode << 0 |
 230                       state->pdata->mode_config.pll_control << 1 |
 231                       state->pdata->mode_config.dac[2] << 2 |
 232                       state->pdata->mode_config.dac[1] << 3 |
 233                       state->pdata->mode_config.dac[0] << 4 |
 234                       state->pdata->mode_config.dac[5] << 5 |
 235                       state->pdata->mode_config.dac[4] << 6 |
 236                       state->pdata->mode_config.dac[3] << 7;
 237
 238         err = adv7343_write(sd, ADV7343_POWER_MODE_REG, val);
 239         if (err < 0)
 240                 goto setoutput_exit;
 241
 242         state->reg00 = val;
 243
 244         /* Enable YUV output */
 245         val = state->reg02 | YUV_OUTPUT_SELECT;
 246         err = adv7343_write(sd, ADV7343_MODE_REG0, val);
 247         if (err < 0)
 248                 goto setoutput_exit;
 249
 250         state->reg02 = val;
 251
 252         /* configure SD DAC Output 2 and SD DAC Output 1 bit to zero */
 253         val = state->reg82 & (SD_DAC_1_DI & SD_DAC_2_DI);
 254
 255         if (state->pdata && state->pdata->sd_config.sd_dac_out[0])
 256                 val = val | (state->pdata->sd_config.sd_dac_out[0] << 1);
 257         else if (state->pdata && !state->pdata->sd_config.sd_dac_out[0])
 258                 val = val & ~(state->pdata->sd_config.sd_dac_out[0] << 1);
 259
 260         if (state->pdata && state->pdata->sd_config.sd_dac_out[1])
 261                 val = val | (state->pdata->sd_config.sd_dac_out[1] << 2);
 262         else if (state->pdata && !state->pdata->sd_config.sd_dac_out[1])
 263                 val = val & ~(state->pdata->sd_config.sd_dac_out[1] << 2);
 264
 265         err = adv7343_write(sd, ADV7343_SD_MODE_REG2, val);
 266         if (err < 0)
 267                 goto setoutput_exit;
 268
 269         state->reg82 = val;
 270
 271         /* configure ED/HD Color DAC Swap and ED/HD RGB Input Enable bit to
 272          * zero */
 273         val = state->reg35 & (HD_RGB_INPUT_DI & HD_DAC_SWAP_DI);
 274         err = adv7343_write(sd, ADV7343_HD_MODE_REG6, val);
 275         if (err < 0)
 276                 goto setoutput_exit;
 277
 278         state->reg35 = val;
 279
 280 setoutput_exit:
 281         if (err != 0)
 282                 v4l2_err(sd, "Error setting output, write failed\n");
 283
 284         return err;
 285 }
 286
 287 static int adv7343_log_status(struct v4l2_subdev *sd)
 288 {
 289         struct adv7343_state *state = to_state(sd);
 290
 291         v4l2_info(sd, "Standard: %llx\n", (unsigned long long)state->std);
 292         v4l2_info(sd, "Output: %s\n", (state->output == 0) ? "Composite" :
 293                         ((state->output == 1) ? "Component" : "S-Video"));
 294         return 0;
 295 }
 296
 297 static int adv7343_s_ctrl(struct v4l2_ctrl *ctrl)
 298 {
 299         struct v4l2_subdev *sd = to_sd(ctrl);
 300
 301         switch (ctrl->id) {
 302         case V4L2_CID_BRIGHTNESS:
 303                 return adv7343_write(sd, ADV7343_SD_BRIGHTNESS_WSS,
 304                                         ctrl->val);
 305
 306         case V4L2_CID_HUE:
 307                 return adv7343_write(sd, ADV7343_SD_HUE_REG, ctrl->val);
 308
 309         case V4L2_CID_GAIN:
 310                 return adv7343_write(sd, ADV7343_DAC2_OUTPUT_LEVEL, ctrl->val);
 311         }
 312         return -EINVAL;
 313 }
 314
 315 static const struct v4l2_ctrl_ops adv7343_ctrl_ops = {
 316         .s_ctrl = adv7343_s_ctrl,
 317 };
 318
 319 static const struct v4l2_subdev_core_ops adv7343_core_ops = {
 320         .log_status = adv7343_log_status,
 321         .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
 322         .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
 323         .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
 324         .g_ctrl = v4l2_subdev_g_ctrl,
 325         .s_ctrl = v4l2_subdev_s_ctrl,
 326         .queryctrl = v4l2_subdev_queryctrl,
 327         .querymenu = v4l2_subdev_querymenu,
 328 };
 329
 330 static int adv7343_s_std_output(struct v4l2_subdev *sd, v4l2_std_id std)
 331 {
 332         struct adv7343_state *state = to_state(sd);
 333         int err = 0;
 334
 335         if (state->std == std)
 336                 return 0;
 337
 338         err = adv7343_setstd(sd, std);
 339         if (!err)
 340                 state->std = std;
 341
 342         return err;
 343 }
 344
 345 static int adv7343_s_routing(struct v4l2_subdev *sd,
 346                 u32 input, u32 output, u32 config)
 347 {
 348         struct adv7343_state *state = to_state(sd);
 349         int err = 0;
 350
 351         if (state->output == output)
 352                 return 0;
 353
 354         err = adv7343_setoutput(sd, output);
 355         if (!err)
 356                 state->output = output;
 357
 358         return err;
 359 }
 360
 361 static const struct v4l2_subdev_video_ops adv7343_video_ops = {
 362         .s_std_output   = adv7343_s_std_output,
 363         .s_routing      = adv7343_s_routing,
 364 };
 365
 366 static const struct v4l2_subdev_ops adv7343_ops = {
 367         .core   = &adv7343_core_ops,
 368         .video  = &adv7343_video_ops,
 369 };
 370
 371 static int adv7343_initialize(struct v4l2_subdev *sd)
 372 {
 373         struct adv7343_state *state = to_state(sd);
 374         int err = 0;
 375         int i;
 376
 377         for (i = 0; i < ARRAY_SIZE(adv7343_init_reg_val); i += 2) {
 378
 379                 err = adv7343_write(sd, adv7343_init_reg_val[i],
 380                                         adv7343_init_reg_val[i+1]);
 381                 if (err) {
 382                         v4l2_err(sd, "Error initializing\n");
 383                         return err;
 384                 }
 385         }
 386
 387         /* Configure for default video standard */
 388         err = adv7343_setoutput(sd, state->output);
 389         if (err < 0) {
 390                 v4l2_err(sd, "Error setting output during init\n");
 391                 return -EINVAL;
 392         }
 393
 394         err = adv7343_setstd(sd, state->std);
 395         if (err < 0) {
 396                 v4l2_err(sd, "Error setting std during init\n");
 397                 return -EINVAL;
 398         }
 399
 400         return err;
 401 }
 402
 403 static struct adv7343_platform_data *
 404 adv7343_get_pdata(struct i2c_client *client)
 405 {
 406         struct adv7343_platform_data *pdata;
 407         struct device_node *np;
 408
 409         if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node)
 410                 return client->dev.platform_data;
 411
 412         np = v4l2_of_get_next_endpoint(client->dev.of_node, NULL);
 413         if (!np)
 414                 return NULL;
 415
 416         pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
 417         if (!pdata)
 418                 goto done;
 419
 420         pdata->mode_config.sleep_mode =
 421                         of_property_read_bool(np, "adi,power-mode-sleep-mode");
 422
 423         pdata->mode_config.pll_control =
 424                         of_property_read_bool(np, "adi,power-mode-pll-ctrl");
 425
 426         of_property_read_u32_array(np, "adi,dac-enable",
 427                                    pdata->mode_config.dac, 6);
 428
 429         of_property_read_u32_array(np, "adi,sd-dac-enable",
 430                                    pdata->sd_config.sd_dac_out, 2);
 431
 432 done:
 433         of_node_put(np);
 434         return pdata;
 435 }
 436
 437 static int adv7343_probe(struct i2c_client *client,
 438                                 const struct i2c_device_id *id)
 439 {
 440         struct adv7343_state *state;
 441         int err;
 442
 443         if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
 444                 return -ENODEV;
 445
 446         v4l_info(client, "chip found @ 0x%x (%s)\n",
 447                         client->addr << 1, client->adapter->name);
 448
 449         state = devm_kzalloc(&client->dev, sizeof(struct adv7343_state),
 450                              GFP_KERNEL);
 451         if (state == NULL)
 452                 return -ENOMEM;
 453
 454         /* Copy board specific information here */
 455         state->pdata = adv7343_get_pdata(client);
 456
 457         state->reg00    = 0x80;
 458         state->reg01    = 0x00;
 459         state->reg02    = 0x20;
 460         state->reg35    = 0x00;
 461         state->reg80    = ADV7343_SD_MODE_REG1_DEFAULT;
 462         state->reg82    = ADV7343_SD_MODE_REG2_DEFAULT;
 463
 464         state->output = ADV7343_COMPOSITE_ID;
 465         state->std = V4L2_STD_NTSC;
 466
 467         v4l2_i2c_subdev_init(&state->sd, client, &adv7343_ops);
 468
 469         v4l2_ctrl_handler_init(&state->hdl, 2);
 470         v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
 471                         V4L2_CID_BRIGHTNESS, ADV7343_BRIGHTNESS_MIN,
 472                                              ADV7343_BRIGHTNESS_MAX, 1,
 473                                              ADV7343_BRIGHTNESS_DEF);
 474         v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
 475                         V4L2_CID_HUE, ADV7343_HUE_MIN,
 476                                       ADV7343_HUE_MAX, 1,
 477                                       ADV7343_HUE_DEF);
 478         v4l2_ctrl_new_std(&state->hdl, &adv7343_ctrl_ops,
 479                         V4L2_CID_GAIN, ADV7343_GAIN_MIN,
 480                                        ADV7343_GAIN_MAX, 1,
 481                                        ADV7343_GAIN_DEF);
 482         state->sd.ctrl_handler = &state->hdl;
 483         if (state->hdl.error) {
 484                 err = state->hdl.error;
 485                 goto done;
 486         }
 487         v4l2_ctrl_handler_setup(&state->hdl);
 488
 489         err = adv7343_initialize(&state->sd);
 490         if (err)
 491                 goto done;
 492
 493         err = v4l2_async_register_subdev(&state->sd);
 494
 495 done:
 496         if (err < 0)
 497                 v4l2_ctrl_handler_free(&state->hdl);
 498
 499         return err;
 500 }
 501
 502 static int adv7343_remove(struct i2c_client *client)
 503 {
 504         struct v4l2_subdev *sd = i2c_get_clientdata(client);
 505         struct adv7343_state *state = to_state(sd);
 506
 507         v4l2_async_unregister_subdev(&state->sd);
 508         v4l2_device_unregister_subdev(sd);
 509         v4l2_ctrl_handler_free(&state->hdl);
 510
 511         return 0;
 512 }
 513
 514 static const struct i2c_device_id adv7343_id[] = {
 515         {"adv7343", 0},
 516         {},
 517 };
 518
 519 MODULE_DEVICE_TABLE(i2c, adv7343_id);
 520
 521 #if IS_ENABLED(CONFIG_OF)
 522 static const struct of_device_id adv7343_of_match[] = {
 523         {.compatible = "adi,adv7343", },
 524         { /* sentinel */ },
 525 };
 526 MODULE_DEVICE_TABLE(of, adv7343_of_match);
 527 #endif
 528
 529 static struct i2c_driver adv7343_driver = {
 530         .driver = {
 531                 .of_match_table = of_match_ptr(adv7343_of_match),
 532                 .owner  = THIS_MODULE,
 533                 .name   = "adv7343",
 534         },
 535         .probe          = adv7343_probe,
 536         .remove         = adv7343_remove,
 537         .id_table       = adv7343_id,
 538 };
 539
 540 module_i2c_driver(adv7343_driver);