hwmon: (acpi_power_meter) Fix acpi_bus_get_device() return value check
[linux-drm-fsl-dcu.git] / drivers / media / dvb-frontends / ts2020.c
1 /*
2     Montage Technology TS2020 - Silicon Tuner driver
3     Copyright (C) 2009-2012 Konstantin Dimitrov <kosio.dimitrov@gmail.com>
4
5     Copyright (C) 2009-2012 TurboSight.com
6
7     This program is free software; you can redistribute it and/or modify
8     it under the terms of the GNU General Public License as published by
9     the Free Software Foundation; either version 2 of the License, or
10     (at your option) any later version.
11
12     This program is distributed in the hope that it will be useful,
13     but WITHOUT ANY WARRANTY; without even the implied warranty of
14     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15     GNU General Public License for more details.
16
17     You should have received a copy of the GNU General Public License
18     along with this program; if not, write to the Free Software
19     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20  */
21
22 #include "dvb_frontend.h"
23 #include "ts2020.h"
24
25 #define TS2020_XTAL_FREQ   27000 /* in kHz */
26 #define FREQ_OFFSET_LOW_SYM_RATE 3000
27
28 struct ts2020_priv {
29         /* i2c details */
30         int i2c_address;
31         struct i2c_adapter *i2c;
32         u8 clk_out_div;
33         u32 frequency;
34 };
35
36 static int ts2020_release(struct dvb_frontend *fe)
37 {
38         kfree(fe->tuner_priv);
39         fe->tuner_priv = NULL;
40         return 0;
41 }
42
43 static int ts2020_writereg(struct dvb_frontend *fe, int reg, int data)
44 {
45         struct ts2020_priv *priv = fe->tuner_priv;
46         u8 buf[] = { reg, data };
47         struct i2c_msg msg[] = {
48                 {
49                         .addr = priv->i2c_address,
50                         .flags = 0,
51                         .buf = buf,
52                         .len = 2
53                 }
54         };
55         int err;
56
57         if (fe->ops.i2c_gate_ctrl)
58                 fe->ops.i2c_gate_ctrl(fe, 1);
59
60         err = i2c_transfer(priv->i2c, msg, 1);
61         if (err != 1) {
62                 printk(KERN_ERR
63                        "%s: writereg error(err == %i, reg == 0x%02x, value == 0x%02x)\n",
64                        __func__, err, reg, data);
65                 return -EREMOTEIO;
66         }
67
68         if (fe->ops.i2c_gate_ctrl)
69                 fe->ops.i2c_gate_ctrl(fe, 0);
70
71         return 0;
72 }
73
74 static int ts2020_readreg(struct dvb_frontend *fe, u8 reg)
75 {
76         struct ts2020_priv *priv = fe->tuner_priv;
77         int ret;
78         u8 b0[] = { reg };
79         u8 b1[] = { 0 };
80         struct i2c_msg msg[] = {
81                 {
82                         .addr = priv->i2c_address,
83                         .flags = 0,
84                         .buf = b0,
85                         .len = 1
86                 }, {
87                         .addr = priv->i2c_address,
88                         .flags = I2C_M_RD,
89                         .buf = b1,
90                         .len = 1
91                 }
92         };
93
94         if (fe->ops.i2c_gate_ctrl)
95                 fe->ops.i2c_gate_ctrl(fe, 1);
96
97         ret = i2c_transfer(priv->i2c, msg, 2);
98
99         if (ret != 2) {
100                 printk(KERN_ERR "%s: reg=0x%x(error=%d)\n",
101                        __func__, reg, ret);
102                 return ret;
103         }
104
105         if (fe->ops.i2c_gate_ctrl)
106                 fe->ops.i2c_gate_ctrl(fe, 0);
107
108         return b1[0];
109 }
110
111 static int ts2020_sleep(struct dvb_frontend *fe)
112 {
113         struct ts2020_priv *priv = fe->tuner_priv;
114         int ret;
115         u8 buf[] = { 10, 0 };
116         struct i2c_msg msg = {
117                 .addr = priv->i2c_address,
118                 .flags = 0,
119                 .buf = buf,
120                 .len = 2
121         };
122
123         if (fe->ops.i2c_gate_ctrl)
124                 fe->ops.i2c_gate_ctrl(fe, 1);
125
126         ret = i2c_transfer(priv->i2c, &msg, 1);
127         if (ret != 1)
128                 printk(KERN_ERR "%s: i2c error\n", __func__);
129
130         if (fe->ops.i2c_gate_ctrl)
131                 fe->ops.i2c_gate_ctrl(fe, 0);
132
133         return (ret == 1) ? 0 : ret;
134 }
135
136 static int ts2020_init(struct dvb_frontend *fe)
137 {
138         struct ts2020_priv *priv = fe->tuner_priv;
139
140         ts2020_writereg(fe, 0x42, 0x73);
141         ts2020_writereg(fe, 0x05, priv->clk_out_div);
142         ts2020_writereg(fe, 0x20, 0x27);
143         ts2020_writereg(fe, 0x07, 0x02);
144         ts2020_writereg(fe, 0x11, 0xff);
145         ts2020_writereg(fe, 0x60, 0xf9);
146         ts2020_writereg(fe, 0x08, 0x01);
147         ts2020_writereg(fe, 0x00, 0x41);
148
149         return 0;
150 }
151
152 static int ts2020_tuner_gate_ctrl(struct dvb_frontend *fe, u8 offset)
153 {
154         int ret;
155         ret = ts2020_writereg(fe, 0x51, 0x1f - offset);
156         ret |= ts2020_writereg(fe, 0x51, 0x1f);
157         ret |= ts2020_writereg(fe, 0x50, offset);
158         ret |= ts2020_writereg(fe, 0x50, 0x00);
159         msleep(20);
160         return ret;
161 }
162
163 static int ts2020_set_tuner_rf(struct dvb_frontend *fe)
164 {
165         int reg;
166
167         reg = ts2020_readreg(fe, 0x3d);
168         reg &= 0x7f;
169         if (reg < 0x16)
170                 reg = 0xa1;
171         else if (reg == 0x16)
172                 reg = 0x99;
173         else
174                 reg = 0xf9;
175
176         ts2020_writereg(fe, 0x60, reg);
177         reg = ts2020_tuner_gate_ctrl(fe, 0x08);
178
179         return reg;
180 }
181
182 static int ts2020_set_params(struct dvb_frontend *fe)
183 {
184         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
185         struct ts2020_priv *priv = fe->tuner_priv;
186         int ret;
187         u32 frequency = c->frequency;
188         s32 offset_khz;
189         u32 symbol_rate = (c->symbol_rate / 1000);
190         u32 f3db, gdiv28;
191         u16 value, ndiv, lpf_coeff;
192         u8 lpf_mxdiv, mlpf_max, mlpf_min, nlpf;
193         u8 lo = 0x01, div4 = 0x0;
194
195         /* Calculate frequency divider */
196         if (frequency < 1060000) {
197                 lo |= 0x10;
198                 div4 = 0x1;
199                 ndiv = (frequency * 14 * 4) / TS2020_XTAL_FREQ;
200         } else
201                 ndiv = (frequency * 14 * 2) / TS2020_XTAL_FREQ;
202         ndiv = ndiv + ndiv % 2;
203         ndiv = ndiv - 1024;
204
205         ret = ts2020_writereg(fe, 0x10, 0x80 | lo);
206
207         /* Set frequency divider */
208         ret |= ts2020_writereg(fe, 0x01, (ndiv >> 8) & 0xf);
209         ret |= ts2020_writereg(fe, 0x02, ndiv & 0xff);
210
211         ret |= ts2020_writereg(fe, 0x03, 0x06);
212         ret |= ts2020_tuner_gate_ctrl(fe, 0x10);
213         if (ret < 0)
214                 return -ENODEV;
215
216         /* Tuner Frequency Range */
217         ret = ts2020_writereg(fe, 0x10, lo);
218
219         ret |= ts2020_tuner_gate_ctrl(fe, 0x08);
220
221         /* Tuner RF */
222         ret |= ts2020_set_tuner_rf(fe);
223
224         gdiv28 = (TS2020_XTAL_FREQ / 1000 * 1694 + 500) / 1000;
225         ret |= ts2020_writereg(fe, 0x04, gdiv28 & 0xff);
226         ret |= ts2020_tuner_gate_ctrl(fe, 0x04);
227         if (ret < 0)
228                 return -ENODEV;
229
230         value = ts2020_readreg(fe, 0x26);
231
232         f3db = (symbol_rate * 135) / 200 + 2000;
233         f3db += FREQ_OFFSET_LOW_SYM_RATE;
234         if (f3db < 7000)
235                 f3db = 7000;
236         if (f3db > 40000)
237                 f3db = 40000;
238
239         gdiv28 = gdiv28 * 207 / (value * 2 + 151);
240         mlpf_max = gdiv28 * 135 / 100;
241         mlpf_min = gdiv28 * 78 / 100;
242         if (mlpf_max > 63)
243                 mlpf_max = 63;
244
245         lpf_coeff = 2766;
246
247         nlpf = (f3db * gdiv28 * 2 / lpf_coeff /
248                 (TS2020_XTAL_FREQ / 1000)  + 1) / 2;
249         if (nlpf > 23)
250                 nlpf = 23;
251         if (nlpf < 1)
252                 nlpf = 1;
253
254         lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000)
255                 * lpf_coeff * 2  / f3db + 1) / 2;
256
257         if (lpf_mxdiv < mlpf_min) {
258                 nlpf++;
259                 lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000)
260                         * lpf_coeff * 2  / f3db + 1) / 2;
261         }
262
263         if (lpf_mxdiv > mlpf_max)
264                 lpf_mxdiv = mlpf_max;
265
266         ret = ts2020_writereg(fe, 0x04, lpf_mxdiv);
267         ret |= ts2020_writereg(fe, 0x06, nlpf);
268
269         ret |= ts2020_tuner_gate_ctrl(fe, 0x04);
270
271         ret |= ts2020_tuner_gate_ctrl(fe, 0x01);
272
273         msleep(80);
274         /* calculate offset assuming 96000kHz*/
275         offset_khz = (ndiv - ndiv % 2 + 1024) * TS2020_XTAL_FREQ
276                 / (6 + 8) / (div4 + 1) / 2;
277
278         priv->frequency = offset_khz;
279
280         return (ret < 0) ? -EINVAL : 0;
281 }
282
283 static int ts2020_get_frequency(struct dvb_frontend *fe, u32 *frequency)
284 {
285         struct ts2020_priv *priv = fe->tuner_priv;
286         *frequency = priv->frequency;
287         return 0;
288 }
289
290 /* read TS2020 signal strength */
291 static int ts2020_read_signal_strength(struct dvb_frontend *fe,
292                                                 u16 *signal_strength)
293 {
294         u16 sig_reading, sig_strength;
295         u8 rfgain, bbgain;
296
297         rfgain = ts2020_readreg(fe, 0x3d) & 0x1f;
298         bbgain = ts2020_readreg(fe, 0x21) & 0x1f;
299
300         if (rfgain > 15)
301                 rfgain = 15;
302         if (bbgain > 13)
303                 bbgain = 13;
304
305         sig_reading = rfgain * 2 + bbgain * 3;
306
307         sig_strength = 40 + (64 - sig_reading) * 50 / 64 ;
308
309         /* cook the value to be suitable for szap-s2 human readable output */
310         *signal_strength = sig_strength * 1000;
311
312         return 0;
313 }
314
315 static struct dvb_tuner_ops ts2020_tuner_ops = {
316         .info = {
317                 .name = "TS2020",
318                 .frequency_min = 950000,
319                 .frequency_max = 2150000
320         },
321         .init = ts2020_init,
322         .release = ts2020_release,
323         .sleep = ts2020_sleep,
324         .set_params = ts2020_set_params,
325         .get_frequency = ts2020_get_frequency,
326         .get_rf_strength = ts2020_read_signal_strength,
327 };
328
329 struct dvb_frontend *ts2020_attach(struct dvb_frontend *fe,
330                                         const struct ts2020_config *config,
331                                         struct i2c_adapter *i2c)
332 {
333         struct ts2020_priv *priv = NULL;
334         u8 buf;
335
336         priv = kzalloc(sizeof(struct ts2020_priv), GFP_KERNEL);
337         if (priv == NULL)
338                 return NULL;
339
340         priv->i2c_address = config->tuner_address;
341         priv->i2c = i2c;
342         priv->clk_out_div = config->clk_out_div;
343         fe->tuner_priv = priv;
344
345         /* Wake Up the tuner */
346         if ((0x03 & ts2020_readreg(fe, 0x00)) == 0x00) {
347                 ts2020_writereg(fe, 0x00, 0x01);
348                 msleep(2);
349         }
350
351         ts2020_writereg(fe, 0x00, 0x03);
352         msleep(2);
353
354         /* Check the tuner version */
355         buf = ts2020_readreg(fe, 0x00);
356         if ((buf == 0x01) || (buf == 0x41) || (buf == 0x81))
357                 printk(KERN_INFO "%s: Find tuner TS2020!\n", __func__);
358         else {
359                 printk(KERN_ERR "%s: Read tuner reg[0] = %d\n", __func__, buf);
360                 kfree(priv);
361                 return NULL;
362         }
363
364         memcpy(&fe->ops.tuner_ops, &ts2020_tuner_ops,
365                                 sizeof(struct dvb_tuner_ops));
366
367         return fe;
368 }
369 EXPORT_SYMBOL(ts2020_attach);
370
371 MODULE_AUTHOR("Konstantin Dimitrov <kosio.dimitrov@gmail.com>");
372 MODULE_DESCRIPTION("Montage Technology TS2020 - Silicon tuner driver module");
373 MODULE_LICENSE("GPL");