drivers/media/dvb-frontends/nxt200x.c

   1 /*
   2  *    Support for NXT2002 and NXT2004 - VSB/QAM
   3  *
   4  *    Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com>
   5  *    Copyright (C) 2006 Michael Krufky <mkrufky@m1k.net>
   6  *    based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
   7  *    and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
   8  *
   9  *    This program is free software; you can redistribute it and/or modify
  10  *    it under the terms of the GNU General Public License as published by
  11  *    the Free Software Foundation; either version 2 of the License, or
  12  *    (at your option) any later version.
  13  *
  14  *    This program is distributed in the hope that it will be useful,
  15  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *    GNU General Public License for more details.
  18  *
  19  *    You should have received a copy of the GNU General Public License
  20  *    along with this program; if not, write to the Free Software
  21  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23 */
  24
  25 /*
  26  *                      NOTES ABOUT THIS DRIVER
  27  *
  28  * This Linux driver supports:
  29  *   B2C2/BBTI Technisat Air2PC - ATSC (NXT2002)
  30  *   AverTVHD MCE A180 (NXT2004)
  31  *   ATI HDTV Wonder (NXT2004)
  32  *
  33  * This driver needs external firmware. Please use the command
  34  * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" or
  35  * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2004" to
  36  * download/extract the appropriate firmware, and then copy it to
  37  * /usr/lib/hotplug/firmware/ or /lib/firmware/
  38  * (depending on configuration of firmware hotplug).
  39  */
  40 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  41
  42 #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
  43 #define NXT2004_DEFAULT_FIRMWARE "dvb-fe-nxt2004.fw"
  44 #define CRC_CCIT_MASK 0x1021
  45
  46 #include <linux/kernel.h>
  47 #include <linux/init.h>
  48 #include <linux/module.h>
  49 #include <linux/slab.h>
  50 #include <linux/string.h>
  51
  52 #include "dvb_frontend.h"
  53 #include "nxt200x.h"
  54
  55 struct nxt200x_state {
  56
  57         struct i2c_adapter* i2c;
  58         const struct nxt200x_config* config;
  59         struct dvb_frontend frontend;
  60
  61         /* demodulator private data */
  62         nxt_chip_type demod_chip;
  63         u8 initialised:1;
  64 };
  65
  66 static int debug;
  67 #define dprintk(args...)        do { if (debug) pr_debug(args); } while (0)
  68
  69 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
  70 {
  71         int err;
  72         struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
  73
  74         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  75                 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
  76                         __func__, addr, err);
  77                 return -EREMOTEIO;
  78         }
  79         return 0;
  80 }
  81
  82 static int i2c_readbytes(struct nxt200x_state *state, u8 addr, u8 *buf, u8 len)
  83 {
  84         int err;
  85         struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
  86
  87         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  88                 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
  89                         __func__, addr, err);
  90                 return -EREMOTEIO;
  91         }
  92         return 0;
  93 }
  94
  95 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg,
  96                                const u8 *buf, u8 len)
  97 {
  98         u8 buf2 [len+1];
  99         int err;
 100         struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
 101
 102         buf2[0] = reg;
 103         memcpy(&buf2[1], buf, len);
 104
 105         if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
 106                 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
 107                         __func__, state->config->demod_address, err);
 108                 return -EREMOTEIO;
 109         }
 110         return 0;
 111 }
 112
 113 static int nxt200x_readbytes(struct nxt200x_state *state, u8 reg, u8 *buf, u8 len)
 114 {
 115         u8 reg2 [] = { reg };
 116
 117         struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
 118                         { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
 119
 120         int err;
 121
 122         if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
 123                 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
 124                         __func__, state->config->demod_address, err);
 125                 return -EREMOTEIO;
 126         }
 127         return 0;
 128 }
 129
 130 static u16 nxt200x_crc(u16 crc, u8 c)
 131 {
 132         u8 i;
 133         u16 input = (u16) c & 0xFF;
 134
 135         input<<=8;
 136         for(i=0; i<8; i++) {
 137                 if((crc^input) & 0x8000)
 138                         crc=(crc<<1)^CRC_CCIT_MASK;
 139                 else
 140                         crc<<=1;
 141                 input<<=1;
 142         }
 143         return crc;
 144 }
 145
 146 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 147 {
 148         u8 attr, len2, buf;
 149         dprintk("%s\n", __func__);
 150
 151         /* set mutli register register */
 152         nxt200x_writebytes(state, 0x35, &reg, 1);
 153
 154         /* send the actual data */
 155         nxt200x_writebytes(state, 0x36, data, len);
 156
 157         switch (state->demod_chip) {
 158                 case NXT2002:
 159                         len2 = len;
 160                         buf = 0x02;
 161                         break;
 162                 case NXT2004:
 163                         /* probably not right, but gives correct values */
 164                         attr = 0x02;
 165                         if (reg & 0x80) {
 166                                 attr = attr << 1;
 167                                 if (reg & 0x04)
 168                                         attr = attr >> 1;
 169                         }
 170                         /* set write bit */
 171                         len2 = ((attr << 4) | 0x10) | len;
 172                         buf = 0x80;
 173                         break;
 174                 default:
 175                         return -EINVAL;
 176                         break;
 177         }
 178
 179         /* set multi register length */
 180         nxt200x_writebytes(state, 0x34, &len2, 1);
 181
 182         /* toggle the multireg write bit */
 183         nxt200x_writebytes(state, 0x21, &buf, 1);
 184
 185         nxt200x_readbytes(state, 0x21, &buf, 1);
 186
 187         switch (state->demod_chip) {
 188                 case NXT2002:
 189                         if ((buf & 0x02) == 0)
 190                                 return 0;
 191                         break;
 192                 case NXT2004:
 193                         if (buf == 0)
 194                                 return 0;
 195                         break;
 196                 default:
 197                         return -EINVAL;
 198                         break;
 199         }
 200
 201         pr_warn("Error writing multireg register 0x%02X\n", reg);
 202
 203         return 0;
 204 }
 205
 206 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
 207 {
 208         int i;
 209         u8 buf, len2, attr;
 210         dprintk("%s\n", __func__);
 211
 212         /* set mutli register register */
 213         nxt200x_writebytes(state, 0x35, &reg, 1);
 214
 215         switch (state->demod_chip) {
 216                 case NXT2002:
 217                         /* set multi register length */
 218                         len2 = len & 0x80;
 219                         nxt200x_writebytes(state, 0x34, &len2, 1);
 220
 221                         /* read the actual data */
 222                         nxt200x_readbytes(state, reg, data, len);
 223                         return 0;
 224                         break;
 225                 case NXT2004:
 226                         /* probably not right, but gives correct values */
 227                         attr = 0x02;
 228                         if (reg & 0x80) {
 229                                 attr = attr << 1;
 230                                 if (reg & 0x04)
 231                                         attr = attr >> 1;
 232                         }
 233
 234                         /* set multi register length */
 235                         len2 = (attr << 4) | len;
 236                         nxt200x_writebytes(state, 0x34, &len2, 1);
 237
 238                         /* toggle the multireg bit*/
 239                         buf = 0x80;
 240                         nxt200x_writebytes(state, 0x21, &buf, 1);
 241
 242                         /* read the actual data */
 243                         for(i = 0; i < len; i++) {
 244                                 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
 245                         }
 246                         return 0;
 247                         break;
 248                 default:
 249                         return -EINVAL;
 250                         break;
 251         }
 252 }
 253
 254 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
 255 {
 256         u8 buf, stopval, counter = 0;
 257         dprintk("%s\n", __func__);
 258
 259         /* set correct stop value */
 260         switch (state->demod_chip) {
 261                 case NXT2002:
 262                         stopval = 0x40;
 263                         break;
 264                 case NXT2004:
 265                         stopval = 0x10;
 266                         break;
 267                 default:
 268                         stopval = 0;
 269                         break;
 270         }
 271
 272         buf = 0x80;
 273         nxt200x_writebytes(state, 0x22, &buf, 1);
 274
 275         while (counter < 20) {
 276                 nxt200x_readbytes(state, 0x31, &buf, 1);
 277                 if (buf & stopval)
 278                         return;
 279                 msleep(10);
 280                 counter++;
 281         }
 282
 283         pr_warn("Timeout waiting for nxt200x to stop. This is ok after "
 284                 "firmware upload.\n");
 285         return;
 286 }
 287
 288 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
 289 {
 290         u8 buf;
 291         dprintk("%s\n", __func__);
 292
 293         buf = 0x00;
 294         nxt200x_writebytes(state, 0x22, &buf, 1);
 295 }
 296
 297 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
 298 {
 299         u8 buf[9];
 300         u8 counter = 0;
 301         dprintk("%s\n", __func__);
 302
 303         buf[0] = 0x00;
 304         nxt200x_writebytes(state, 0x2b, buf, 1);
 305         buf[0] = 0x70;
 306         nxt200x_writebytes(state, 0x34, buf, 1);
 307         buf[0] = 0x04;
 308         nxt200x_writebytes(state, 0x35, buf, 1);
 309         buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
 310         buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
 311         nxt200x_writebytes(state, 0x36, buf, 9);
 312         buf[0] = 0x80;
 313         nxt200x_writebytes(state, 0x21, buf, 1);
 314
 315         while (counter < 20) {
 316                 nxt200x_readbytes(state, 0x21, buf, 1);
 317                 if (buf[0] == 0)
 318                         return;
 319                 msleep(10);
 320                 counter++;
 321         }
 322
 323         pr_warn("Timeout waiting for nxt2004 to init.\n");
 324
 325         return;
 326 }
 327
 328 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
 329 {
 330         u8 buf, count = 0;
 331
 332         dprintk("%s\n", __func__);
 333
 334         dprintk("Tuner Bytes: %*ph\n", 4, data + 1);
 335
 336         /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
 337          * direct write is required for Philips TUV1236D and ALPS TDHU2 */
 338         switch (state->demod_chip) {
 339                 case NXT2004:
 340                         if (i2c_writebytes(state, data[0], data+1, 4))
 341                                 pr_warn("error writing to tuner\n");
 342                         /* wait until we have a lock */
 343                         while (count < 20) {
 344                                 i2c_readbytes(state, data[0], &buf, 1);
 345                                 if (buf & 0x40)
 346                                         return 0;
 347                                 msleep(100);
 348                                 count++;
 349                         }
 350                         pr_warn("timeout waiting for tuner lock\n");
 351                         break;
 352                 case NXT2002:
 353                         /* set the i2c transfer speed to the tuner */
 354                         buf = 0x03;
 355                         nxt200x_writebytes(state, 0x20, &buf, 1);
 356
 357                         /* setup to transfer 4 bytes via i2c */
 358                         buf = 0x04;
 359                         nxt200x_writebytes(state, 0x34, &buf, 1);
 360
 361                         /* write actual tuner bytes */
 362                         nxt200x_writebytes(state, 0x36, data+1, 4);
 363
 364                         /* set tuner i2c address */
 365                         buf = data[0] << 1;
 366                         nxt200x_writebytes(state, 0x35, &buf, 1);
 367
 368                         /* write UC Opmode to begin transfer */
 369                         buf = 0x80;
 370                         nxt200x_writebytes(state, 0x21, &buf, 1);
 371
 372                         while (count < 20) {
 373                                 nxt200x_readbytes(state, 0x21, &buf, 1);
 374                                 if ((buf & 0x80)== 0x00)
 375                                         return 0;
 376                                 msleep(100);
 377                                 count++;
 378                         }
 379                         pr_warn("timeout error writing to tuner\n");
 380                         break;
 381                 default:
 382                         return -EINVAL;
 383                         break;
 384         }
 385         return 0;
 386 }
 387
 388 static void nxt200x_agc_reset(struct nxt200x_state* state)
 389 {
 390         u8 buf;
 391         dprintk("%s\n", __func__);
 392
 393         switch (state->demod_chip) {
 394                 case NXT2002:
 395                         buf = 0x08;
 396                         nxt200x_writebytes(state, 0x08, &buf, 1);
 397                         buf = 0x00;
 398                         nxt200x_writebytes(state, 0x08, &buf, 1);
 399                         break;
 400                 case NXT2004:
 401                         nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
 402                         buf = 0x08;
 403                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 404                         buf = 0x00;
 405                         nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
 406                         break;
 407                 default:
 408                         break;
 409         }
 410         return;
 411 }
 412
 413 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 414 {
 415
 416         struct nxt200x_state* state = fe->demodulator_priv;
 417         u8 buf[3], written = 0, chunkpos = 0;
 418         u16 rambase, position, crc = 0;
 419
 420         dprintk("%s\n", __func__);
 421         dprintk("Firmware is %zu bytes\n", fw->size);
 422
 423         /* Get the RAM base for this nxt2002 */
 424         nxt200x_readbytes(state, 0x10, buf, 1);
 425
 426         if (buf[0] & 0x10)
 427                 rambase = 0x1000;
 428         else
 429                 rambase = 0x0000;
 430
 431         dprintk("rambase on this nxt2002 is %04X\n", rambase);
 432
 433         /* Hold the micro in reset while loading firmware */
 434         buf[0] = 0x80;
 435         nxt200x_writebytes(state, 0x2B, buf, 1);
 436
 437         for (position = 0; position < fw->size; position++) {
 438                 if (written == 0) {
 439                         crc = 0;
 440                         chunkpos = 0x28;
 441                         buf[0] = ((rambase + position) >> 8);
 442                         buf[1] = (rambase + position) & 0xFF;
 443                         buf[2] = 0x81;
 444                         /* write starting address */
 445                         nxt200x_writebytes(state, 0x29, buf, 3);
 446                 }
 447                 written++;
 448                 chunkpos++;
 449
 450                 if ((written % 4) == 0)
 451                         nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
 452
 453                 crc = nxt200x_crc(crc, fw->data[position]);
 454
 455                 if ((written == 255) || (position+1 == fw->size)) {
 456                         /* write remaining bytes of firmware */
 457                         nxt200x_writebytes(state, chunkpos+4-(written %4),
 458                                 &fw->data[position-(written %4) + 1],
 459                                 written %4);
 460                         buf[0] = crc << 8;
 461                         buf[1] = crc & 0xFF;
 462
 463                         /* write crc */
 464                         nxt200x_writebytes(state, 0x2C, buf, 2);
 465
 466                         /* do a read to stop things */
 467                         nxt200x_readbytes(state, 0x2A, buf, 1);
 468
 469                         /* set transfer mode to complete */
 470                         buf[0] = 0x80;
 471                         nxt200x_writebytes(state, 0x2B, buf, 1);
 472
 473                         written = 0;
 474                 }
 475         }
 476
 477         return 0;
 478 };
 479
 480 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
 481 {
 482
 483         struct nxt200x_state* state = fe->demodulator_priv;
 484         u8 buf[3];
 485         u16 rambase, position, crc=0;
 486
 487         dprintk("%s\n", __func__);
 488         dprintk("Firmware is %zu bytes\n", fw->size);
 489
 490         /* set rambase */
 491         rambase = 0x1000;
 492
 493         /* hold the micro in reset while loading firmware */
 494         buf[0] = 0x80;
 495         nxt200x_writebytes(state, 0x2B, buf,1);
 496
 497         /* calculate firmware CRC */
 498         for (position = 0; position < fw->size; position++) {
 499                 crc = nxt200x_crc(crc, fw->data[position]);
 500         }
 501
 502         buf[0] = rambase >> 8;
 503         buf[1] = rambase & 0xFF;
 504         buf[2] = 0x81;
 505         /* write starting address */
 506         nxt200x_writebytes(state,0x29,buf,3);
 507
 508         for (position = 0; position < fw->size;) {
 509                 nxt200x_writebytes(state, 0x2C, &fw->data[position],
 510                         fw->size-position > 255 ? 255 : fw->size-position);
 511                 position += (fw->size-position > 255 ? 255 : fw->size-position);
 512         }
 513         buf[0] = crc >> 8;
 514         buf[1] = crc & 0xFF;
 515
 516         dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
 517
 518         /* write crc */
 519         nxt200x_writebytes(state, 0x2C, buf,2);
 520
 521         /* do a read to stop things */
 522         nxt200x_readbytes(state, 0x2C, buf, 1);
 523
 524         /* set transfer mode to complete */
 525         buf[0] = 0x80;
 526         nxt200x_writebytes(state, 0x2B, buf,1);
 527
 528         return 0;
 529 };
 530
 531 static int nxt200x_setup_frontend_parameters(struct dvb_frontend *fe)
 532 {
 533         struct dtv_frontend_properties *p = &fe->dtv_property_cache;
 534         struct nxt200x_state* state = fe->demodulator_priv;
 535         u8 buf[5];
 536
 537         /* stop the micro first */
 538         nxt200x_microcontroller_stop(state);
 539
 540         if (state->demod_chip == NXT2004) {
 541                 /* make sure demod is set to digital */
 542                 buf[0] = 0x04;
 543                 nxt200x_writebytes(state, 0x14, buf, 1);
 544                 buf[0] = 0x00;
 545                 nxt200x_writebytes(state, 0x17, buf, 1);
 546         }
 547
 548         /* set additional params */
 549         switch (p->modulation) {
 550                 case QAM_64:
 551                 case QAM_256:
 552                         /* Set punctured clock for QAM */
 553                         /* This is just a guess since I am unable to test it */
 554                         if (state->config->set_ts_params)
 555                                 state->config->set_ts_params(fe, 1);
 556                         break;
 557                 case VSB_8:
 558                         /* Set non-punctured clock for VSB */
 559                         if (state->config->set_ts_params)
 560                                 state->config->set_ts_params(fe, 0);
 561                         break;
 562                 default:
 563                         return -EINVAL;
 564                         break;
 565         }
 566
 567         if (fe->ops.tuner_ops.calc_regs) {
 568                 /* get tuning information */
 569                 fe->ops.tuner_ops.calc_regs(fe, buf, 5);
 570
 571                 /* write frequency information */
 572                 nxt200x_writetuner(state, buf);
 573         }
 574
 575         /* reset the agc now that tuning has been completed */
 576         nxt200x_agc_reset(state);
 577
 578         /* set target power level */
 579         switch (p->modulation) {
 580                 case QAM_64:
 581                 case QAM_256:
 582                         buf[0] = 0x74;
 583                         break;
 584                 case VSB_8:
 585                         buf[0] = 0x70;
 586                         break;
 587                 default:
 588                         return -EINVAL;
 589                         break;
 590         }
 591         nxt200x_writebytes(state, 0x42, buf, 1);
 592
 593         /* configure sdm */
 594         switch (state->demod_chip) {
 595                 case NXT2002:
 596                         buf[0] = 0x87;
 597                         break;
 598                 case NXT2004:
 599                         buf[0] = 0x07;
 600                         break;
 601                 default:
 602                         return -EINVAL;
 603                         break;
 604         }
 605         nxt200x_writebytes(state, 0x57, buf, 1);
 606
 607         /* write sdm1 input */
 608         buf[0] = 0x10;
 609         buf[1] = 0x00;
 610         switch (state->demod_chip) {
 611                 case NXT2002:
 612                         nxt200x_writereg_multibyte(state, 0x58, buf, 2);
 613                         break;
 614                 case NXT2004:
 615                         nxt200x_writebytes(state, 0x58, buf, 2);
 616                         break;
 617                 default:
 618                         return -EINVAL;
 619                         break;
 620         }
 621
 622         /* write sdmx input */
 623         switch (p->modulation) {
 624                 case QAM_64:
 625                                 buf[0] = 0x68;
 626                                 break;
 627                 case QAM_256:
 628                                 buf[0] = 0x64;
 629                                 break;
 630                 case VSB_8:
 631                                 buf[0] = 0x60;
 632                                 break;
 633                 default:
 634                                 return -EINVAL;
 635                                 break;
 636         }
 637         buf[1] = 0x00;
 638         switch (state->demod_chip) {
 639                 case NXT2002:
 640                         nxt200x_writereg_multibyte(state, 0x5C, buf, 2);
 641                         break;
 642                 case NXT2004:
 643                         nxt200x_writebytes(state, 0x5C, buf, 2);
 644                         break;
 645                 default:
 646                         return -EINVAL;
 647                         break;
 648         }
 649
 650         /* write adc power lpf fc */
 651         buf[0] = 0x05;
 652         nxt200x_writebytes(state, 0x43, buf, 1);
 653
 654         if (state->demod_chip == NXT2004) {
 655                 /* write ??? */
 656                 buf[0] = 0x00;
 657                 buf[1] = 0x00;
 658                 nxt200x_writebytes(state, 0x46, buf, 2);
 659         }
 660
 661         /* write accumulator2 input */
 662         buf[0] = 0x80;
 663         buf[1] = 0x00;
 664         switch (state->demod_chip) {
 665                 case NXT2002:
 666                         nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
 667                         break;
 668                 case NXT2004:
 669                         nxt200x_writebytes(state, 0x4B, buf, 2);
 670                         break;
 671                 default:
 672                         return -EINVAL;
 673                         break;
 674         }
 675
 676         /* write kg1 */
 677         buf[0] = 0x00;
 678         nxt200x_writebytes(state, 0x4D, buf, 1);
 679
 680         /* write sdm12 lpf fc */
 681         buf[0] = 0x44;
 682         nxt200x_writebytes(state, 0x55, buf, 1);
 683
 684         /* write agc control reg */
 685         buf[0] = 0x04;
 686         nxt200x_writebytes(state, 0x41, buf, 1);
 687
 688         if (state->demod_chip == NXT2004) {
 689                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 690                 buf[0] = 0x24;
 691                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 692
 693                 /* soft reset? */
 694                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 695                 buf[0] = 0x10;
 696                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 697                 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
 698                 buf[0] = 0x00;
 699                 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 700
 701                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 702                 buf[0] = 0x04;
 703                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 704                 buf[0] = 0x00;
 705                 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
 706                 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
 707                 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
 708                 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
 709                 buf[0] = 0x11;
 710                 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
 711                 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
 712                 buf[0] = 0x44;
 713                 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
 714         }
 715
 716         /* write agc ucgp0 */
 717         switch (p->modulation) {
 718                 case QAM_64:
 719                                 buf[0] = 0x02;
 720                                 break;
 721                 case QAM_256:
 722                                 buf[0] = 0x03;
 723                                 break;
 724                 case VSB_8:
 725                                 buf[0] = 0x00;
 726                                 break;
 727                 default:
 728                                 return -EINVAL;
 729                                 break;
 730         }
 731         nxt200x_writebytes(state, 0x30, buf, 1);
 732
 733         /* write agc control reg */
 734         buf[0] = 0x00;
 735         nxt200x_writebytes(state, 0x41, buf, 1);
 736
 737         /* write accumulator2 input */
 738         buf[0] = 0x80;
 739         buf[1] = 0x00;
 740         switch (state->demod_chip) {
 741                 case NXT2002:
 742                         nxt200x_writereg_multibyte(state, 0x49, buf, 2);
 743                         nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
 744                         break;
 745                 case NXT2004:
 746                         nxt200x_writebytes(state, 0x49, buf, 2);
 747                         nxt200x_writebytes(state, 0x4B, buf, 2);
 748                         break;
 749                 default:
 750                         return -EINVAL;
 751                         break;
 752         }
 753
 754         /* write agc control reg */
 755         buf[0] = 0x04;
 756         nxt200x_writebytes(state, 0x41, buf, 1);
 757
 758         nxt200x_microcontroller_start(state);
 759
 760         if (state->demod_chip == NXT2004) {
 761                 nxt2004_microcontroller_init(state);
 762
 763                 /* ???? */
 764                 buf[0] = 0xF0;
 765                 buf[1] = 0x00;
 766                 nxt200x_writebytes(state, 0x5C, buf, 2);
 767         }
 768
 769         /* adjacent channel detection should be done here, but I don't
 770         have any stations with this need so I cannot test it */
 771
 772         return 0;
 773 }
 774
 775 static int nxt200x_read_status(struct dvb_frontend* fe, fe_status_t* status)
 776 {
 777         struct nxt200x_state* state = fe->demodulator_priv;
 778         u8 lock;
 779         nxt200x_readbytes(state, 0x31, &lock, 1);
 780
 781         *status = 0;
 782         if (lock & 0x20) {
 783                 *status |= FE_HAS_SIGNAL;
 784                 *status |= FE_HAS_CARRIER;
 785                 *status |= FE_HAS_VITERBI;
 786                 *status |= FE_HAS_SYNC;
 787                 *status |= FE_HAS_LOCK;
 788         }
 789         return 0;
 790 }
 791
 792 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
 793 {
 794         struct nxt200x_state* state = fe->demodulator_priv;
 795         u8 b[3];
 796
 797         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 798
 799         *ber = ((b[0] << 8) + b[1]) * 8;
 800
 801         return 0;
 802 }
 803
 804 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
 805 {
 806         struct nxt200x_state* state = fe->demodulator_priv;
 807         u8 b[2];
 808         u16 temp = 0;
 809
 810         /* setup to read cluster variance */
 811         b[0] = 0x00;
 812         nxt200x_writebytes(state, 0xA1, b, 1);
 813
 814         /* get multreg val */
 815         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 816
 817         temp = (b[0] << 8) | b[1];
 818         *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
 819
 820         return 0;
 821 }
 822
 823 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
 824 {
 825
 826         struct nxt200x_state* state = fe->demodulator_priv;
 827         u8 b[2];
 828         u16 temp = 0, temp2;
 829         u32 snrdb = 0;
 830
 831         /* setup to read cluster variance */
 832         b[0] = 0x00;
 833         nxt200x_writebytes(state, 0xA1, b, 1);
 834
 835         /* get multreg val from 0xA6 */
 836         nxt200x_readreg_multibyte(state, 0xA6, b, 2);
 837
 838         temp = (b[0] << 8) | b[1];
 839         temp2 = 0x7FFF - temp;
 840
 841         /* snr will be in db */
 842         if (temp2 > 0x7F00)
 843                 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
 844         else if (temp2 > 0x7EC0)
 845                 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
 846         else if (temp2 > 0x7C00)
 847                 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
 848         else
 849                 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
 850
 851         /* the value reported back from the frontend will be FFFF=32db 0000=0db */
 852         *snr = snrdb * (0xFFFF/32000);
 853
 854         return 0;
 855 }
 856
 857 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
 858 {
 859         struct nxt200x_state* state = fe->demodulator_priv;
 860         u8 b[3];
 861
 862         nxt200x_readreg_multibyte(state, 0xE6, b, 3);
 863         *ucblocks = b[2];
 864
 865         return 0;
 866 }
 867
 868 static int nxt200x_sleep(struct dvb_frontend* fe)
 869 {
 870         return 0;
 871 }
 872
 873 static int nxt2002_init(struct dvb_frontend* fe)
 874 {
 875         struct nxt200x_state* state = fe->demodulator_priv;
 876         const struct firmware *fw;
 877         int ret;
 878         u8 buf[2];
 879
 880         /* request the firmware, this will block until someone uploads it */
 881         pr_debug("%s: Waiting for firmware upload (%s)...\n",
 882                  __func__, NXT2002_DEFAULT_FIRMWARE);
 883         ret = request_firmware(&fw, NXT2002_DEFAULT_FIRMWARE,
 884                                state->i2c->dev.parent);
 885         pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
 886         if (ret) {
 887                 pr_err("%s: No firmware uploaded (timeout or file not found?)"
 888                        "\n", __func__);
 889                 return ret;
 890         }
 891
 892         ret = nxt2002_load_firmware(fe, fw);
 893         release_firmware(fw);
 894         if (ret) {
 895                 pr_err("%s: Writing firmware to device failed\n", __func__);
 896                 return ret;
 897         }
 898         pr_info("%s: Firmware upload complete\n", __func__);
 899
 900         /* Put the micro into reset */
 901         nxt200x_microcontroller_stop(state);
 902
 903         /* ensure transfer is complete */
 904         buf[0]=0x00;
 905         nxt200x_writebytes(state, 0x2B, buf, 1);
 906
 907         /* Put the micro into reset for real this time */
 908         nxt200x_microcontroller_stop(state);
 909
 910         /* soft reset everything (agc,frontend,eq,fec)*/
 911         buf[0] = 0x0F;
 912         nxt200x_writebytes(state, 0x08, buf, 1);
 913         buf[0] = 0x00;
 914         nxt200x_writebytes(state, 0x08, buf, 1);
 915
 916         /* write agc sdm configure */
 917         buf[0] = 0xF1;
 918         nxt200x_writebytes(state, 0x57, buf, 1);
 919
 920         /* write mod output format */
 921         buf[0] = 0x20;
 922         nxt200x_writebytes(state, 0x09, buf, 1);
 923
 924         /* write fec mpeg mode */
 925         buf[0] = 0x7E;
 926         buf[1] = 0x00;
 927         nxt200x_writebytes(state, 0xE9, buf, 2);
 928
 929         /* write mux selection */
 930         buf[0] = 0x00;
 931         nxt200x_writebytes(state, 0xCC, buf, 1);
 932
 933         return 0;
 934 }
 935
 936 static int nxt2004_init(struct dvb_frontend* fe)
 937 {
 938         struct nxt200x_state* state = fe->demodulator_priv;
 939         const struct firmware *fw;
 940         int ret;
 941         u8 buf[3];
 942
 943         /* ??? */
 944         buf[0]=0x00;
 945         nxt200x_writebytes(state, 0x1E, buf, 1);
 946
 947         /* request the firmware, this will block until someone uploads it */
 948         pr_debug("%s: Waiting for firmware upload (%s)...\n",
 949                  __func__, NXT2004_DEFAULT_FIRMWARE);
 950         ret = request_firmware(&fw, NXT2004_DEFAULT_FIRMWARE,
 951                                state->i2c->dev.parent);
 952         pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
 953         if (ret) {
 954                 pr_err("%s: No firmware uploaded (timeout or file not found?)"
 955                        "\n", __func__);
 956                 return ret;
 957         }
 958
 959         ret = nxt2004_load_firmware(fe, fw);
 960         release_firmware(fw);
 961         if (ret) {
 962                 pr_err("%s: Writing firmware to device failed\n", __func__);
 963                 return ret;
 964         }
 965         pr_info("%s: Firmware upload complete\n", __func__);
 966
 967         /* ensure transfer is complete */
 968         buf[0] = 0x01;
 969         nxt200x_writebytes(state, 0x19, buf, 1);
 970
 971         nxt2004_microcontroller_init(state);
 972         nxt200x_microcontroller_stop(state);
 973         nxt200x_microcontroller_stop(state);
 974         nxt2004_microcontroller_init(state);
 975         nxt200x_microcontroller_stop(state);
 976
 977         /* soft reset everything (agc,frontend,eq,fec)*/
 978         buf[0] = 0xFF;
 979         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 980         buf[0] = 0x00;
 981         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
 982
 983         /* write agc sdm configure */
 984         buf[0] = 0xD7;
 985         nxt200x_writebytes(state, 0x57, buf, 1);
 986
 987         /* ???*/
 988         buf[0] = 0x07;
 989         buf[1] = 0xfe;
 990         nxt200x_writebytes(state, 0x35, buf, 2);
 991         buf[0] = 0x12;
 992         nxt200x_writebytes(state, 0x34, buf, 1);
 993         buf[0] = 0x80;
 994         nxt200x_writebytes(state, 0x21, buf, 1);
 995
 996         /* ???*/
 997         buf[0] = 0x21;
 998         nxt200x_writebytes(state, 0x0A, buf, 1);
 999
1000         /* ???*/
1001         buf[0] = 0x01;
1002         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1003
1004         /* write fec mpeg mode */
1005         buf[0] = 0x7E;
1006         buf[1] = 0x00;
1007         nxt200x_writebytes(state, 0xE9, buf, 2);
1008
1009         /* write mux selection */
1010         buf[0] = 0x00;
1011         nxt200x_writebytes(state, 0xCC, buf, 1);
1012
1013         /* ???*/
1014         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1015         buf[0] = 0x00;
1016         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1017
1018         /* soft reset? */
1019         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1020         buf[0] = 0x10;
1021         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1022         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1023         buf[0] = 0x00;
1024         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1025
1026         /* ???*/
1027         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1028         buf[0] = 0x01;
1029         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1030         buf[0] = 0x70;
1031         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1032         buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
1033         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1034
1035         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1036         buf[0] = 0x11;
1037         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1038         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1039         buf[0] = 0x40;
1040         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1041
1042         nxt200x_readbytes(state, 0x10, buf, 1);
1043         buf[0] = 0x10;
1044         nxt200x_writebytes(state, 0x10, buf, 1);
1045         nxt200x_readbytes(state, 0x0A, buf, 1);
1046         buf[0] = 0x21;
1047         nxt200x_writebytes(state, 0x0A, buf, 1);
1048
1049         nxt2004_microcontroller_init(state);
1050
1051         buf[0] = 0x21;
1052         nxt200x_writebytes(state, 0x0A, buf, 1);
1053         buf[0] = 0x7E;
1054         nxt200x_writebytes(state, 0xE9, buf, 1);
1055         buf[0] = 0x00;
1056         nxt200x_writebytes(state, 0xEA, buf, 1);
1057
1058         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1059         buf[0] = 0x00;
1060         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1061         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1062         buf[0] = 0x00;
1063         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1064
1065         /* soft reset? */
1066         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1067         buf[0] = 0x10;
1068         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1069         nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1070         buf[0] = 0x00;
1071         nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1072
1073         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1074         buf[0] = 0x04;
1075         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1076         buf[0] = 0x00;
1077         nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1078         buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1079         nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1080
1081         nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1082         buf[0] = 0x11;
1083         nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1084
1085         nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1086         buf[0] = 0x44;
1087         nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1088
1089         /* initialize tuner */
1090         nxt200x_readbytes(state, 0x10, buf, 1);
1091         buf[0] = 0x12;
1092         nxt200x_writebytes(state, 0x10, buf, 1);
1093         buf[0] = 0x04;
1094         nxt200x_writebytes(state, 0x13, buf, 1);
1095         buf[0] = 0x00;
1096         nxt200x_writebytes(state, 0x16, buf, 1);
1097         buf[0] = 0x04;
1098         nxt200x_writebytes(state, 0x14, buf, 1);
1099         buf[0] = 0x00;
1100         nxt200x_writebytes(state, 0x14, buf, 1);
1101         nxt200x_writebytes(state, 0x17, buf, 1);
1102         nxt200x_writebytes(state, 0x14, buf, 1);
1103         nxt200x_writebytes(state, 0x17, buf, 1);
1104
1105         return 0;
1106 }
1107
1108 static int nxt200x_init(struct dvb_frontend* fe)
1109 {
1110         struct nxt200x_state* state = fe->demodulator_priv;
1111         int ret = 0;
1112
1113         if (!state->initialised) {
1114                 switch (state->demod_chip) {
1115                         case NXT2002:
1116                                 ret = nxt2002_init(fe);
1117                                 break;
1118                         case NXT2004:
1119                                 ret = nxt2004_init(fe);
1120                                 break;
1121                         default:
1122                                 return -EINVAL;
1123                                 break;
1124                 }
1125                 state->initialised = 1;
1126         }
1127         return ret;
1128 }
1129
1130 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1131 {
1132         fesettings->min_delay_ms = 500;
1133         fesettings->step_size = 0;
1134         fesettings->max_drift = 0;
1135         return 0;
1136 }
1137
1138 static void nxt200x_release(struct dvb_frontend* fe)
1139 {
1140         struct nxt200x_state* state = fe->demodulator_priv;
1141         kfree(state);
1142 }
1143
1144 static struct dvb_frontend_ops nxt200x_ops;
1145
1146 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1147                                    struct i2c_adapter* i2c)
1148 {
1149         struct nxt200x_state* state = NULL;
1150         u8 buf [] = {0,0,0,0,0};
1151
1152         /* allocate memory for the internal state */
1153         state = kzalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1154         if (state == NULL)
1155                 goto error;
1156
1157         /* setup the state */
1158         state->config = config;
1159         state->i2c = i2c;
1160         state->initialised = 0;
1161
1162         /* read card id */
1163         nxt200x_readbytes(state, 0x00, buf, 5);
1164         dprintk("NXT info: %*ph\n", 5, buf);
1165
1166         /* set demod chip */
1167         switch (buf[0]) {
1168                 case 0x04:
1169                         state->demod_chip = NXT2002;
1170                         pr_info("NXT2002 Detected\n");
1171                         break;
1172                 case 0x05:
1173                         state->demod_chip = NXT2004;
1174                         pr_info("NXT2004 Detected\n");
1175                         break;
1176                 default:
1177                         goto error;
1178         }
1179
1180         /* make sure demod chip is supported */
1181         switch (state->demod_chip) {
1182                 case NXT2002:
1183                         if (buf[0] != 0x04) goto error;         /* device id */
1184                         if (buf[1] != 0x02) goto error;         /* fab id */
1185                         if (buf[2] != 0x11) goto error;         /* month */
1186                         if (buf[3] != 0x20) goto error;         /* year msb */
1187                         if (buf[4] != 0x00) goto error;         /* year lsb */
1188                         break;
1189                 case NXT2004:
1190                         if (buf[0] != 0x05) goto error;         /* device id */
1191                         break;
1192                 default:
1193                         goto error;
1194         }
1195
1196         /* create dvb_frontend */
1197         memcpy(&state->frontend.ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1198         state->frontend.demodulator_priv = state;
1199         return &state->frontend;
1200
1201 error:
1202         kfree(state);
1203         pr_err("Unknown/Unsupported NXT chip: %*ph\n", 5, buf);
1204         return NULL;
1205 }
1206
1207 static struct dvb_frontend_ops nxt200x_ops = {
1208         .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
1209         .info = {
1210                 .name = "Nextwave NXT200X VSB/QAM frontend",
1211                 .frequency_min =  54000000,
1212                 .frequency_max = 860000000,
1213                 .frequency_stepsize = 166666,   /* stepsize is just a guess */
1214                 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1215                         FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1216                         FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1217         },
1218
1219         .release = nxt200x_release,
1220
1221         .init = nxt200x_init,
1222         .sleep = nxt200x_sleep,
1223
1224         .set_frontend = nxt200x_setup_frontend_parameters,
1225         .get_tune_settings = nxt200x_get_tune_settings,
1226
1227         .read_status = nxt200x_read_status,
1228         .read_ber = nxt200x_read_ber,
1229         .read_signal_strength = nxt200x_read_signal_strength,
1230         .read_snr = nxt200x_read_snr,
1231         .read_ucblocks = nxt200x_read_ucblocks,
1232 };
1233
1234 module_param(debug, int, 0644);
1235 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1236
1237 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1238 MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob");
1239 MODULE_LICENSE("GPL");
1240
1241 EXPORT_SYMBOL(nxt200x_attach);
1242