2 w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
4 Copyright (c) 1998 - 2001 Frodo Looijaard <frodol@dds.nl>,
5 Philip Edelbrock <phil@netroedge.com>,
6 and Mark Studebaker <mdsxyz123@yahoo.com>
7 Copyright (c) 2007 Jean Delvare <khali@linux-fr.org>
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 Supports following chips:
27 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
28 as99127f 7 3 0 3 0x31 0x12c3 yes no
29 as99127f rev.2 (type_name = as99127f) 0x31 0x5ca3 yes no
30 w83781d 7 3 0 3 0x10-1 0x5ca3 yes yes
31 w83627hf 9 3 2 3 0x21 0x5ca3 yes yes(LPC)
32 w83782d 9 3 2-4 3 0x30 0x5ca3 yes yes
33 w83783s 5-6 3 2 1-2 0x40 0x5ca3 yes no
37 #include <linux/module.h>
38 #include <linux/init.h>
39 #include <linux/slab.h>
40 #include <linux/jiffies.h>
41 #include <linux/i2c.h>
42 #include <linux/platform_device.h>
43 #include <linux/ioport.h>
44 #include <linux/hwmon.h>
45 #include <linux/hwmon-vid.h>
46 #include <linux/sysfs.h>
47 #include <linux/err.h>
48 #include <linux/mutex.h>
52 /* ISA device, if found */
53 static struct platform_device *pdev;
55 /* Addresses to scan */
56 static unsigned short normal_i2c[] = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25,
57 0x26, 0x27, 0x28, 0x29, 0x2a, 0x2b,
58 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
59 static unsigned short isa_address = 0x290;
61 /* Insmod parameters */
62 I2C_CLIENT_INSMOD_5(w83781d, w83782d, w83783s, w83627hf, as99127f);
63 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
64 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
67 module_param(reset, bool, 0);
68 MODULE_PARM_DESC(reset, "Set to one to reset chip on load");
71 module_param(init, bool, 0);
72 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
74 /* Constants specified below */
76 /* Length of ISA address segment */
77 #define W83781D_EXTENT 8
79 /* Where are the ISA address/data registers relative to the base address */
80 #define W83781D_ADDR_REG_OFFSET 5
81 #define W83781D_DATA_REG_OFFSET 6
83 /* The W83781D registers */
84 /* The W83782D registers for nr=7,8 are in bank 5 */
85 #define W83781D_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
86 (0x554 + (((nr) - 7) * 2)))
87 #define W83781D_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
88 (0x555 + (((nr) - 7) * 2)))
89 #define W83781D_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
92 #define W83781D_REG_FAN_MIN(nr) (0x3a + (nr))
93 #define W83781D_REG_FAN(nr) (0x27 + (nr))
95 #define W83781D_REG_BANK 0x4E
96 #define W83781D_REG_TEMP2_CONFIG 0x152
97 #define W83781D_REG_TEMP3_CONFIG 0x252
98 #define W83781D_REG_TEMP(nr) ((nr == 3) ? (0x0250) : \
99 ((nr == 2) ? (0x0150) : \
101 #define W83781D_REG_TEMP_HYST(nr) ((nr == 3) ? (0x253) : \
102 ((nr == 2) ? (0x153) : \
104 #define W83781D_REG_TEMP_OVER(nr) ((nr == 3) ? (0x255) : \
105 ((nr == 2) ? (0x155) : \
108 #define W83781D_REG_CONFIG 0x40
110 /* Interrupt status (W83781D, AS99127F) */
111 #define W83781D_REG_ALARM1 0x41
112 #define W83781D_REG_ALARM2 0x42
114 /* Real-time status (W83782D, W83783S, W83627HF) */
115 #define W83782D_REG_ALARM1 0x459
116 #define W83782D_REG_ALARM2 0x45A
117 #define W83782D_REG_ALARM3 0x45B
119 #define W83781D_REG_BEEP_CONFIG 0x4D
120 #define W83781D_REG_BEEP_INTS1 0x56
121 #define W83781D_REG_BEEP_INTS2 0x57
122 #define W83781D_REG_BEEP_INTS3 0x453 /* not on W83781D */
124 #define W83781D_REG_VID_FANDIV 0x47
126 #define W83781D_REG_CHIPID 0x49
127 #define W83781D_REG_WCHIPID 0x58
128 #define W83781D_REG_CHIPMAN 0x4F
129 #define W83781D_REG_PIN 0x4B
132 #define W83781D_REG_VBAT 0x5D
134 /* PWM 782D (1-4) and 783S (1-2) only */
135 #define W83781D_REG_PWM1 0x5B /* 782d and 783s/627hf datasheets disagree */
136 /* on which is which; */
137 #define W83781D_REG_PWM2 0x5A /* We follow the 782d convention here, */
138 /* However 782d is probably wrong. */
139 #define W83781D_REG_PWM3 0x5E
140 #define W83781D_REG_PWM4 0x5F
141 #define W83781D_REG_PWMCLK12 0x5C
142 #define W83781D_REG_PWMCLK34 0x45C
143 static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
144 W83781D_REG_PWM3, W83781D_REG_PWM4
147 #define W83781D_REG_PWM(nr) (regpwm[(nr) - 1])
149 #define W83781D_REG_I2C_ADDR 0x48
150 #define W83781D_REG_I2C_SUBADDR 0x4A
152 /* The following are undocumented in the data sheets however we
153 received the information in an email from Winbond tech support */
154 /* Sensor selection - not on 781d */
155 #define W83781D_REG_SCFG1 0x5D
156 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
158 #define W83781D_REG_SCFG2 0x59
159 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
161 #define W83781D_DEFAULT_BETA 3435
163 /* RT Table registers */
164 #define W83781D_REG_RT_IDX 0x50
165 #define W83781D_REG_RT_VAL 0x51
168 #define IN_TO_REG(val) SENSORS_LIMIT(((val) + 8) / 16, 0, 255)
169 #define IN_FROM_REG(val) ((val) * 16)
172 FAN_TO_REG(long rpm, int div)
176 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
177 return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
181 FAN_FROM_REG(u8 val, int div)
187 return 1350000 / (val * div);
190 #define TEMP_TO_REG(val) SENSORS_LIMIT((val) / 1000, -127, 128)
191 #define TEMP_FROM_REG(val) ((val) * 1000)
193 #define BEEP_MASK_FROM_REG(val,type) ((type) == as99127f ? \
194 (val) ^ 0x7fff : (val))
195 #define BEEP_MASK_TO_REG(val,type) ((type) == as99127f ? \
196 (~(val)) & 0x7fff : (val) & 0xffffff)
198 #define DIV_FROM_REG(val) (1 << (val))
201 DIV_TO_REG(long val, enum chips type)
204 val = SENSORS_LIMIT(val, 1,
206 || type == as99127f) ? 8 : 128)) >> 1;
207 for (i = 0; i < 7; i++) {
215 /* There are some complications in a module like this. First off, W83781D chips
216 may be both present on the SMBus and the ISA bus, and we have to handle
217 those cases separately at some places. Second, there might be several
218 W83781D chips available (well, actually, that is probably never done; but
219 it is a clean illustration of how to handle a case like that). Finally,
220 a specific chip may be attached to *both* ISA and SMBus, and we would
221 not like to detect it double. Fortunately, in the case of the W83781D at
222 least, a register tells us what SMBus address we are on, so that helps
223 a bit - except if there could be more than one SMBus. Groan. No solution
226 /* For ISA chips, we abuse the i2c_client addr and name fields. We also use
227 the driver field to differentiate between I2C and ISA chips. */
228 struct w83781d_data {
229 struct i2c_client client;
230 struct class_device *class_dev;
234 struct mutex update_lock;
235 char valid; /* !=0 if following fields are valid */
236 unsigned long last_updated; /* In jiffies */
238 struct i2c_client *lm75[2]; /* for secondary I2C addresses */
239 /* array of 2 pointers to subclients */
241 u8 in[9]; /* Register value - 8 & 9 for 782D only */
242 u8 in_max[9]; /* Register value - 8 & 9 for 782D only */
243 u8 in_min[9]; /* Register value - 8 & 9 for 782D only */
244 u8 fan[3]; /* Register value */
245 u8 fan_min[3]; /* Register value */
246 s8 temp; /* Register value */
247 s8 temp_max; /* Register value */
248 s8 temp_max_hyst; /* Register value */
249 u16 temp_add[2]; /* Register value */
250 u16 temp_max_add[2]; /* Register value */
251 u16 temp_max_hyst_add[2]; /* Register value */
252 u8 fan_div[3]; /* Register encoding, shifted right */
253 u8 vid; /* Register encoding, combined */
254 u32 alarms; /* Register encoding, combined */
255 u32 beep_mask; /* Register encoding, combined */
256 u8 beep_enable; /* Boolean */
257 u8 pwm[4]; /* Register value */
258 u8 pwmenable[4]; /* Boolean */
259 u16 sens[3]; /* 782D/783S only.
260 1 = pentium diode; 2 = 3904 diode;
261 3000-5000 = thermistor beta.
263 Other Betas unimplemented */
267 static int w83781d_attach_adapter(struct i2c_adapter *adapter);
268 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
269 static int w83781d_detach_client(struct i2c_client *client);
271 static int __devinit w83781d_isa_probe(struct platform_device *pdev);
272 static int __devexit w83781d_isa_remove(struct platform_device *pdev);
274 static int w83781d_read_value(struct w83781d_data *data, u16 reg);
275 static int w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value);
276 static struct w83781d_data *w83781d_update_device(struct device *dev);
277 static void w83781d_init_device(struct device *dev);
279 static struct i2c_driver w83781d_driver = {
283 .id = I2C_DRIVERID_W83781D,
284 .attach_adapter = w83781d_attach_adapter,
285 .detach_client = w83781d_detach_client,
288 static struct platform_driver w83781d_isa_driver = {
290 .owner = THIS_MODULE,
293 .probe = w83781d_isa_probe,
294 .remove = w83781d_isa_remove,
298 /* following are the sysfs callback functions */
299 #define show_in_reg(reg) \
300 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
302 struct w83781d_data *data = w83781d_update_device(dev); \
303 return sprintf(buf, "%ld\n", (long)IN_FROM_REG(data->reg[nr])); \
309 #define store_in_reg(REG, reg) \
310 static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
312 struct w83781d_data *data = dev_get_drvdata(dev); \
315 val = simple_strtoul(buf, NULL, 10); \
317 mutex_lock(&data->update_lock); \
318 data->in_##reg[nr] = IN_TO_REG(val); \
319 w83781d_write_value(data, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
321 mutex_unlock(&data->update_lock); \
324 store_in_reg(MIN, min);
325 store_in_reg(MAX, max);
327 #define sysfs_in_offset(offset) \
329 show_regs_in_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
331 return show_in(dev, buf, offset); \
333 static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_regs_in_##offset, NULL);
335 #define sysfs_in_reg_offset(reg, offset) \
336 static ssize_t show_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
338 return show_in_##reg (dev, buf, offset); \
340 static ssize_t store_regs_in_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
342 return store_in_##reg (dev, buf, count, offset); \
344 static DEVICE_ATTR(in##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset);
346 #define sysfs_in_offsets(offset) \
347 sysfs_in_offset(offset); \
348 sysfs_in_reg_offset(min, offset); \
349 sysfs_in_reg_offset(max, offset);
361 #define show_fan_reg(reg) \
362 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
364 struct w83781d_data *data = w83781d_update_device(dev); \
365 return sprintf(buf,"%ld\n", \
366 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
369 show_fan_reg(fan_min);
372 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
374 struct w83781d_data *data = dev_get_drvdata(dev);
377 val = simple_strtoul(buf, NULL, 10);
379 mutex_lock(&data->update_lock);
380 data->fan_min[nr - 1] =
381 FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
382 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr),
383 data->fan_min[nr - 1]);
385 mutex_unlock(&data->update_lock);
389 #define sysfs_fan_offset(offset) \
390 static ssize_t show_regs_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
392 return show_fan(dev, buf, offset); \
394 static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_regs_fan_##offset, NULL);
396 #define sysfs_fan_min_offset(offset) \
397 static ssize_t show_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, char *buf) \
399 return show_fan_min(dev, buf, offset); \
401 static ssize_t store_regs_fan_min##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
403 return store_fan_min(dev, buf, count, offset); \
405 static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset);
408 sysfs_fan_min_offset(1);
410 sysfs_fan_min_offset(2);
412 sysfs_fan_min_offset(3);
414 #define show_temp_reg(reg) \
415 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
417 struct w83781d_data *data = w83781d_update_device(dev); \
418 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
419 return sprintf(buf,"%d\n", \
420 LM75_TEMP_FROM_REG(data->reg##_add[nr-2])); \
421 } else { /* TEMP1 */ \
422 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
426 show_temp_reg(temp_max);
427 show_temp_reg(temp_max_hyst);
429 #define store_temp_reg(REG, reg) \
430 static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
432 struct w83781d_data *data = dev_get_drvdata(dev); \
435 val = simple_strtol(buf, NULL, 10); \
437 mutex_lock(&data->update_lock); \
439 if (nr >= 2) { /* TEMP2 and TEMP3 */ \
440 data->temp_##reg##_add[nr-2] = LM75_TEMP_TO_REG(val); \
441 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
442 data->temp_##reg##_add[nr-2]); \
443 } else { /* TEMP1 */ \
444 data->temp_##reg = TEMP_TO_REG(val); \
445 w83781d_write_value(data, W83781D_REG_TEMP_##REG(nr), \
449 mutex_unlock(&data->update_lock); \
452 store_temp_reg(OVER, max);
453 store_temp_reg(HYST, max_hyst);
455 #define sysfs_temp_offset(offset) \
457 show_regs_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
459 return show_temp(dev, buf, offset); \
461 static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_regs_temp_##offset, NULL);
463 #define sysfs_temp_reg_offset(reg, offset) \
464 static ssize_t show_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, char *buf) \
466 return show_temp_##reg (dev, buf, offset); \
468 static ssize_t store_regs_temp_##reg##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
470 return store_temp_##reg (dev, buf, count, offset); \
472 static DEVICE_ATTR(temp##offset##_##reg, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset);
474 #define sysfs_temp_offsets(offset) \
475 sysfs_temp_offset(offset); \
476 sysfs_temp_reg_offset(max, offset); \
477 sysfs_temp_reg_offset(max_hyst, offset);
479 sysfs_temp_offsets(1);
480 sysfs_temp_offsets(2);
481 sysfs_temp_offsets(3);
484 show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
486 struct w83781d_data *data = w83781d_update_device(dev);
487 return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
490 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
493 show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
495 struct w83781d_data *data = w83781d_update_device(dev);
496 return sprintf(buf, "%ld\n", (long) data->vrm);
500 store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
502 struct w83781d_data *data = dev_get_drvdata(dev);
505 val = simple_strtoul(buf, NULL, 10);
511 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg);
514 show_alarms_reg(struct device *dev, struct device_attribute *attr, char *buf)
516 struct w83781d_data *data = w83781d_update_device(dev);
517 return sprintf(buf, "%u\n", data->alarms);
520 static DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL);
522 static ssize_t show_beep_mask (struct device *dev, struct device_attribute *attr, char *buf)
524 struct w83781d_data *data = w83781d_update_device(dev);
525 return sprintf(buf, "%ld\n",
526 (long)BEEP_MASK_FROM_REG(data->beep_mask, data->type));
528 static ssize_t show_beep_enable (struct device *dev, struct device_attribute *attr, char *buf)
530 struct w83781d_data *data = w83781d_update_device(dev);
531 return sprintf(buf, "%ld\n", (long)data->beep_enable);
534 #define BEEP_ENABLE 0 /* Store beep_enable */
535 #define BEEP_MASK 1 /* Store beep_mask */
538 store_beep_reg(struct device *dev, const char *buf, size_t count,
541 struct w83781d_data *data = dev_get_drvdata(dev);
544 val = simple_strtoul(buf, NULL, 10);
546 mutex_lock(&data->update_lock);
548 if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
549 data->beep_mask = BEEP_MASK_TO_REG(val, data->type);
550 w83781d_write_value(data, W83781D_REG_BEEP_INTS1,
551 data->beep_mask & 0xff);
553 if ((data->type != w83781d) && (data->type != as99127f)) {
554 w83781d_write_value(data, W83781D_REG_BEEP_INTS3,
555 ((data->beep_mask) >> 16) & 0xff);
558 val2 = (data->beep_mask >> 8) & 0x7f;
559 } else { /* We are storing beep_enable */
560 val2 = w83781d_read_value(data, W83781D_REG_BEEP_INTS2) & 0x7f;
561 data->beep_enable = !!val;
564 w83781d_write_value(data, W83781D_REG_BEEP_INTS2,
565 val2 | data->beep_enable << 7);
567 mutex_unlock(&data->update_lock);
571 #define sysfs_beep(REG, reg) \
572 static ssize_t show_regs_beep_##reg (struct device *dev, struct device_attribute *attr, char *buf) \
574 return show_beep_##reg(dev, attr, buf); \
576 static ssize_t store_regs_beep_##reg (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
578 return store_beep_reg(dev, buf, count, BEEP_##REG); \
580 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg);
582 sysfs_beep(ENABLE, enable);
583 sysfs_beep(MASK, mask);
586 show_fan_div_reg(struct device *dev, char *buf, int nr)
588 struct w83781d_data *data = w83781d_update_device(dev);
589 return sprintf(buf, "%ld\n",
590 (long) DIV_FROM_REG(data->fan_div[nr - 1]));
593 /* Note: we save and restore the fan minimum here, because its value is
594 determined in part by the fan divisor. This follows the principle of
595 least surprise; the user doesn't expect the fan minimum to change just
596 because the divisor changed. */
598 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
600 struct w83781d_data *data = dev_get_drvdata(dev);
603 unsigned long val = simple_strtoul(buf, NULL, 10);
605 mutex_lock(&data->update_lock);
608 min = FAN_FROM_REG(data->fan_min[nr],
609 DIV_FROM_REG(data->fan_div[nr]));
611 data->fan_div[nr] = DIV_TO_REG(val, data->type);
613 reg = (w83781d_read_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV)
614 & (nr==0 ? 0xcf : 0x3f))
615 | ((data->fan_div[nr] & 0x03) << (nr==0 ? 4 : 6));
616 w83781d_write_value(data, nr==2 ? W83781D_REG_PIN : W83781D_REG_VID_FANDIV, reg);
618 /* w83781d and as99127f don't have extended divisor bits */
619 if (data->type != w83781d && data->type != as99127f) {
620 reg = (w83781d_read_value(data, W83781D_REG_VBAT)
622 | ((data->fan_div[nr] & 0x04) << (3 + nr));
623 w83781d_write_value(data, W83781D_REG_VBAT, reg);
626 /* Restore fan_min */
627 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
628 w83781d_write_value(data, W83781D_REG_FAN_MIN(nr+1), data->fan_min[nr]);
630 mutex_unlock(&data->update_lock);
634 #define sysfs_fan_div(offset) \
635 static ssize_t show_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
637 return show_fan_div_reg(dev, buf, offset); \
639 static ssize_t store_regs_fan_div_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
641 return store_fan_div_reg(dev, buf, count, offset - 1); \
643 static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset);
650 show_pwm_reg(struct device *dev, char *buf, int nr)
652 struct w83781d_data *data = w83781d_update_device(dev);
653 return sprintf(buf, "%ld\n", (long)data->pwm[nr - 1]);
657 show_pwmenable_reg(struct device *dev, char *buf, int nr)
659 struct w83781d_data *data = w83781d_update_device(dev);
660 return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
664 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
666 struct w83781d_data *data = dev_get_drvdata(dev);
669 val = simple_strtoul(buf, NULL, 10);
671 mutex_lock(&data->update_lock);
672 data->pwm[nr - 1] = SENSORS_LIMIT(val, 0, 255);
673 w83781d_write_value(data, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
674 mutex_unlock(&data->update_lock);
679 store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
681 struct w83781d_data *data = dev_get_drvdata(dev);
684 val = simple_strtoul(buf, NULL, 10);
686 mutex_lock(&data->update_lock);
691 reg = w83781d_read_value(data, W83781D_REG_PWMCLK12);
692 w83781d_write_value(data, W83781D_REG_PWMCLK12,
693 (reg & 0xf7) | (val << 3));
695 reg = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
696 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG,
697 (reg & 0xef) | (!val << 4));
699 data->pwmenable[nr - 1] = val;
703 mutex_unlock(&data->update_lock);
707 mutex_unlock(&data->update_lock);
711 #define sysfs_pwm(offset) \
712 static ssize_t show_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
714 return show_pwm_reg(dev, buf, offset); \
716 static ssize_t store_regs_pwm_##offset (struct device *dev, struct device_attribute *attr, \
717 const char *buf, size_t count) \
719 return store_pwm_reg(dev, buf, count, offset); \
721 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, \
722 show_regs_pwm_##offset, store_regs_pwm_##offset);
724 #define sysfs_pwmenable(offset) \
725 static ssize_t show_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
727 return show_pwmenable_reg(dev, buf, offset); \
729 static ssize_t store_regs_pwmenable_##offset (struct device *dev, struct device_attribute *attr, \
730 const char *buf, size_t count) \
732 return store_pwmenable_reg(dev, buf, count, offset); \
734 static DEVICE_ATTR(pwm##offset##_enable, S_IRUGO | S_IWUSR, \
735 show_regs_pwmenable_##offset, store_regs_pwmenable_##offset);
739 sysfs_pwmenable(2); /* only PWM2 can be enabled/disabled */
744 show_sensor_reg(struct device *dev, char *buf, int nr)
746 struct w83781d_data *data = w83781d_update_device(dev);
747 return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
751 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
753 struct w83781d_data *data = dev_get_drvdata(dev);
756 val = simple_strtoul(buf, NULL, 10);
758 mutex_lock(&data->update_lock);
761 case 1: /* PII/Celeron diode */
762 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
763 w83781d_write_value(data, W83781D_REG_SCFG1,
764 tmp | BIT_SCFG1[nr - 1]);
765 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
766 w83781d_write_value(data, W83781D_REG_SCFG2,
767 tmp | BIT_SCFG2[nr - 1]);
768 data->sens[nr - 1] = val;
771 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
772 w83781d_write_value(data, W83781D_REG_SCFG1,
773 tmp | BIT_SCFG1[nr - 1]);
774 tmp = w83781d_read_value(data, W83781D_REG_SCFG2);
775 w83781d_write_value(data, W83781D_REG_SCFG2,
776 tmp & ~BIT_SCFG2[nr - 1]);
777 data->sens[nr - 1] = val;
779 case W83781D_DEFAULT_BETA: /* thermistor */
780 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
781 w83781d_write_value(data, W83781D_REG_SCFG1,
782 tmp & ~BIT_SCFG1[nr - 1]);
783 data->sens[nr - 1] = val;
786 dev_err(dev, "Invalid sensor type %ld; must be 1, 2, or %d\n",
787 (long) val, W83781D_DEFAULT_BETA);
791 mutex_unlock(&data->update_lock);
795 #define sysfs_sensor(offset) \
796 static ssize_t show_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, char *buf) \
798 return show_sensor_reg(dev, buf, offset); \
800 static ssize_t store_regs_sensor_##offset (struct device *dev, struct device_attribute *attr, const char *buf, size_t count) \
802 return store_sensor_reg(dev, buf, count, offset); \
804 static DEVICE_ATTR(temp##offset##_type, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset);
810 /* I2C devices get this name attribute automatically, but for ISA devices
811 we must create it by ourselves. */
813 show_name(struct device *dev, struct device_attribute *devattr, char *buf)
815 struct w83781d_data *data = dev_get_drvdata(dev);
816 return sprintf(buf, "%s\n", data->client.name);
818 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
820 /* This function is called when:
821 * w83781d_driver is inserted (when this module is loaded), for each
823 * when a new adapter is inserted (and w83781d_driver is still present) */
825 w83781d_attach_adapter(struct i2c_adapter *adapter)
827 if (!(adapter->class & I2C_CLASS_HWMON))
829 return i2c_probe(adapter, &addr_data, w83781d_detect);
832 /* Assumes that adapter is of I2C, not ISA variety.
833 * OTHERWISE DON'T CALL THIS
836 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
837 struct i2c_client *new_client)
841 const char *client_name = "";
842 struct w83781d_data *data = i2c_get_clientdata(new_client);
844 data->lm75[0] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
845 if (!(data->lm75[0])) {
850 id = i2c_adapter_id(adapter);
852 if (force_subclients[0] == id && force_subclients[1] == address) {
853 for (i = 2; i <= 3; i++) {
854 if (force_subclients[i] < 0x48 ||
855 force_subclients[i] > 0x4f) {
856 dev_err(&new_client->dev, "Invalid subclient "
857 "address %d; must be 0x48-0x4f\n",
858 force_subclients[i]);
863 w83781d_write_value(data, W83781D_REG_I2C_SUBADDR,
864 (force_subclients[2] & 0x07) |
865 ((force_subclients[3] & 0x07) << 4));
866 data->lm75[0]->addr = force_subclients[2];
868 val1 = w83781d_read_value(data, W83781D_REG_I2C_SUBADDR);
869 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
872 if (kind != w83783s) {
873 data->lm75[1] = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
874 if (!(data->lm75[1])) {
879 if (force_subclients[0] == id &&
880 force_subclients[1] == address) {
881 data->lm75[1]->addr = force_subclients[3];
883 data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
885 if (data->lm75[0]->addr == data->lm75[1]->addr) {
886 dev_err(&new_client->dev,
887 "Duplicate addresses 0x%x for subclients.\n",
888 data->lm75[0]->addr);
895 client_name = "w83781d subclient";
896 else if (kind == w83782d)
897 client_name = "w83782d subclient";
898 else if (kind == w83783s)
899 client_name = "w83783s subclient";
900 else if (kind == w83627hf)
901 client_name = "w83627hf subclient";
902 else if (kind == as99127f)
903 client_name = "as99127f subclient";
905 for (i = 0; i <= 1; i++) {
906 /* store all data in w83781d */
907 i2c_set_clientdata(data->lm75[i], NULL);
908 data->lm75[i]->adapter = adapter;
909 data->lm75[i]->driver = &w83781d_driver;
910 data->lm75[i]->flags = 0;
911 strlcpy(data->lm75[i]->name, client_name,
913 if ((err = i2c_attach_client(data->lm75[i]))) {
914 dev_err(&new_client->dev, "Subclient %d "
915 "registration at address 0x%x "
916 "failed.\n", i, data->lm75[i]->addr);
927 /* Undo inits in case of errors */
929 i2c_detach_client(data->lm75[0]);
931 kfree(data->lm75[1]);
933 kfree(data->lm75[0]);
938 #define IN_UNIT_ATTRS(X) \
939 &dev_attr_in##X##_input.attr, \
940 &dev_attr_in##X##_min.attr, \
941 &dev_attr_in##X##_max.attr
943 #define FAN_UNIT_ATTRS(X) \
944 &dev_attr_fan##X##_input.attr, \
945 &dev_attr_fan##X##_min.attr, \
946 &dev_attr_fan##X##_div.attr
948 #define TEMP_UNIT_ATTRS(X) \
949 &dev_attr_temp##X##_input.attr, \
950 &dev_attr_temp##X##_max.attr, \
951 &dev_attr_temp##X##_max_hyst.attr
953 static struct attribute* w83781d_attributes[] = {
965 &dev_attr_cpu0_vid.attr,
967 &dev_attr_alarms.attr,
968 &dev_attr_beep_mask.attr,
969 &dev_attr_beep_enable.attr,
972 static const struct attribute_group w83781d_group = {
973 .attrs = w83781d_attributes,
976 static struct attribute *w83781d_attributes_opt[] = {
983 &dev_attr_pwm2_enable.attr,
986 &dev_attr_temp1_type.attr,
987 &dev_attr_temp2_type.attr,
988 &dev_attr_temp3_type.attr,
991 static const struct attribute_group w83781d_group_opt = {
992 .attrs = w83781d_attributes_opt,
995 /* No clean up is done on error, it's up to the caller */
997 w83781d_create_files(struct device *dev, int kind, int is_isa)
1001 if ((err = sysfs_create_group(&dev->kobj, &w83781d_group)))
1004 if (kind != w83783s) {
1005 if ((err = device_create_file(dev, &dev_attr_in1_input))
1006 || (err = device_create_file(dev, &dev_attr_in1_min))
1007 || (err = device_create_file(dev, &dev_attr_in1_max)))
1010 if (kind != as99127f && kind != w83781d && kind != w83783s) {
1011 if ((err = device_create_file(dev, &dev_attr_in7_input))
1012 || (err = device_create_file(dev, &dev_attr_in7_min))
1013 || (err = device_create_file(dev, &dev_attr_in7_max))
1014 || (err = device_create_file(dev, &dev_attr_in8_input))
1015 || (err = device_create_file(dev, &dev_attr_in8_min))
1016 || (err = device_create_file(dev, &dev_attr_in8_max)))
1019 if (kind != w83783s) {
1020 if ((err = device_create_file(dev, &dev_attr_temp3_input))
1021 || (err = device_create_file(dev, &dev_attr_temp3_max))
1022 || (err = device_create_file(dev,
1023 &dev_attr_temp3_max_hyst)))
1027 if (kind != w83781d && kind != as99127f) {
1028 if ((err = device_create_file(dev, &dev_attr_pwm1))
1029 || (err = device_create_file(dev, &dev_attr_pwm2))
1030 || (err = device_create_file(dev, &dev_attr_pwm2_enable)))
1033 if (kind == w83782d && !is_isa) {
1034 if ((err = device_create_file(dev, &dev_attr_pwm3))
1035 || (err = device_create_file(dev, &dev_attr_pwm4)))
1039 if (kind != as99127f && kind != w83781d) {
1040 if ((err = device_create_file(dev, &dev_attr_temp1_type))
1041 || (err = device_create_file(dev,
1042 &dev_attr_temp2_type)))
1044 if (kind != w83783s) {
1045 if ((err = device_create_file(dev,
1046 &dev_attr_temp3_type)))
1052 err = device_create_file(&pdev->dev, &dev_attr_name);
1061 w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
1064 struct i2c_client *client;
1066 struct w83781d_data *data;
1068 const char *client_name = "";
1069 enum vendor { winbond, asus } vendid;
1071 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1076 /* OK. For now, we presume we have a valid client. We now create the
1077 client structure, even though we cannot fill it completely yet.
1078 But it allows us to access w83781d_{read,write}_value. */
1080 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1085 client = &data->client;
1086 i2c_set_clientdata(client, data);
1087 client->addr = address;
1088 mutex_init(&data->lock);
1089 client->adapter = adapter;
1090 client->driver = &w83781d_driver;
1093 /* Now, we do the remaining detection. */
1095 /* The w8378?d may be stuck in some other bank than bank 0. This may
1096 make reading other information impossible. Specify a force=... or
1097 force_*=... parameter, and the Winbond will be reset to the right
1100 if (w83781d_read_value(data, W83781D_REG_CONFIG) & 0x80) {
1101 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1102 "failed at step 3\n");
1106 val1 = w83781d_read_value(data, W83781D_REG_BANK);
1107 val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN);
1108 /* Check for Winbond or Asus ID if in bank 0 */
1109 if ((!(val1 & 0x07)) &&
1110 (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3))
1111 || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)))) {
1112 dev_dbg(&adapter->dev, "Detection of w83781d chip "
1113 "failed at step 4\n");
1117 /* If Winbond SMBus, check address at 0x48.
1118 Asus doesn't support, except for as99127f rev.2 */
1119 if ((!(val1 & 0x80) && (val2 == 0xa3)) ||
1120 ((val1 & 0x80) && (val2 == 0x5c))) {
1121 if (w83781d_read_value
1122 (data, W83781D_REG_I2C_ADDR) != address) {
1123 dev_dbg(&adapter->dev, "Detection of w83781d "
1124 "chip failed at step 5\n");
1131 /* We have either had a force parameter, or we have already detected the
1132 Winbond. Put it now into bank 0 and Vendor ID High Byte */
1133 w83781d_write_value(data, W83781D_REG_BANK,
1134 (w83781d_read_value(data, W83781D_REG_BANK)
1137 /* Determine the chip type. */
1140 val2 = w83781d_read_value(data, W83781D_REG_CHIPMAN);
1143 else if (val2 == 0x12)
1146 dev_dbg(&adapter->dev, "w83781d chip vendor is "
1147 "neither Winbond nor Asus\n");
1152 val1 = w83781d_read_value(data, W83781D_REG_WCHIPID);
1153 if ((val1 == 0x10 || val1 == 0x11) && vendid == winbond)
1155 else if (val1 == 0x30 && vendid == winbond)
1157 else if (val1 == 0x40 && vendid == winbond && address == 0x2d)
1159 else if (val1 == 0x21 && vendid == winbond)
1161 else if (val1 == 0x31 && address >= 0x28)
1165 dev_warn(&adapter->dev, "Ignoring 'force' "
1166 "parameter for unknown chip at "
1167 "address 0x%02x\n", address);
1173 if (kind == w83781d) {
1174 client_name = "w83781d";
1175 } else if (kind == w83782d) {
1176 client_name = "w83782d";
1177 } else if (kind == w83783s) {
1178 client_name = "w83783s";
1179 } else if (kind == w83627hf) {
1180 client_name = "w83627hf";
1181 } else if (kind == as99127f) {
1182 client_name = "as99127f";
1185 /* Fill in the remaining client fields and put into the global list */
1186 strlcpy(client->name, client_name, I2C_NAME_SIZE);
1189 /* Tell the I2C layer a new client has arrived */
1190 if ((err = i2c_attach_client(client)))
1193 /* attach secondary i2c lm75-like clients */
1194 if ((err = w83781d_detect_subclients(adapter, address,
1198 /* Initialize the chip */
1199 w83781d_init_device(dev);
1201 /* Register sysfs hooks */
1202 err = w83781d_create_files(dev, kind, 0);
1206 data->class_dev = hwmon_device_register(dev);
1207 if (IS_ERR(data->class_dev)) {
1208 err = PTR_ERR(data->class_dev);
1215 sysfs_remove_group(&dev->kobj, &w83781d_group);
1216 sysfs_remove_group(&dev->kobj, &w83781d_group_opt);
1218 if (data->lm75[1]) {
1219 i2c_detach_client(data->lm75[1]);
1220 kfree(data->lm75[1]);
1222 if (data->lm75[0]) {
1223 i2c_detach_client(data->lm75[0]);
1224 kfree(data->lm75[0]);
1227 i2c_detach_client(client);
1235 w83781d_detach_client(struct i2c_client *client)
1237 struct w83781d_data *data = i2c_get_clientdata(client);
1242 hwmon_device_unregister(data->class_dev);
1243 sysfs_remove_group(&client->dev.kobj, &w83781d_group);
1244 sysfs_remove_group(&client->dev.kobj, &w83781d_group_opt);
1247 if ((err = i2c_detach_client(client)))
1261 static int __devinit
1262 w83781d_isa_probe(struct platform_device *pdev)
1265 struct w83781d_data *data;
1266 struct resource *res;
1269 /* Reserve the ISA region */
1270 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1271 if (!request_region(res->start, W83781D_EXTENT, "w83781d")) {
1276 if (!(data = kzalloc(sizeof(struct w83781d_data), GFP_KERNEL))) {
1278 goto exit_release_region;
1280 mutex_init(&data->lock);
1281 data->client.addr = res->start;
1282 i2c_set_clientdata(&data->client, data);
1283 platform_set_drvdata(pdev, data);
1285 reg = w83781d_read_value(data, W83781D_REG_WCHIPID);
1288 data->type = w83627hf;
1292 data->type = w83782d;
1296 data->type = w83781d;
1299 strlcpy(data->client.name, name, I2C_NAME_SIZE);
1301 /* Initialize the W83781D chip */
1302 w83781d_init_device(&pdev->dev);
1304 /* Register sysfs hooks */
1305 err = w83781d_create_files(&pdev->dev, data->type, 1);
1307 goto exit_remove_files;
1309 data->class_dev = hwmon_device_register(&pdev->dev);
1310 if (IS_ERR(data->class_dev)) {
1311 err = PTR_ERR(data->class_dev);
1312 goto exit_remove_files;
1318 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1319 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1320 device_remove_file(&pdev->dev, &dev_attr_name);
1322 exit_release_region:
1323 release_region(res->start, W83781D_EXTENT);
1328 static int __devexit
1329 w83781d_isa_remove(struct platform_device *pdev)
1331 struct w83781d_data *data = platform_get_drvdata(pdev);
1333 hwmon_device_unregister(data->class_dev);
1334 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group);
1335 sysfs_remove_group(&pdev->dev.kobj, &w83781d_group_opt);
1336 device_remove_file(&pdev->dev, &dev_attr_name);
1337 release_region(data->client.addr, W83781D_EXTENT);
1343 /* The SMBus locks itself, usually, but nothing may access the Winbond between
1344 bank switches. ISA access must always be locked explicitly!
1345 We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1346 would slow down the W83781D access and should not be necessary.
1347 There are some ugly typecasts here, but the good news is - they should
1348 nowhere else be necessary! */
1350 w83781d_read_value(struct w83781d_data *data, u16 reg)
1352 struct i2c_client *client = &data->client;
1353 int res, word_sized, bank;
1354 struct i2c_client *cl;
1356 mutex_lock(&data->lock);
1357 if (!client->driver) { /* ISA device */
1358 word_sized = (((reg & 0xff00) == 0x100)
1359 || ((reg & 0xff00) == 0x200))
1360 && (((reg & 0x00ff) == 0x50)
1361 || ((reg & 0x00ff) == 0x53)
1362 || ((reg & 0x00ff) == 0x55));
1364 outb_p(W83781D_REG_BANK,
1365 client->addr + W83781D_ADDR_REG_OFFSET);
1367 client->addr + W83781D_DATA_REG_OFFSET);
1369 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1370 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1372 outb_p((reg & 0xff) + 1,
1373 client->addr + W83781D_ADDR_REG_OFFSET);
1375 (res << 8) + inb_p(client->addr +
1376 W83781D_DATA_REG_OFFSET);
1379 outb_p(W83781D_REG_BANK,
1380 client->addr + W83781D_ADDR_REG_OFFSET);
1381 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1384 bank = (reg >> 8) & 0x0f;
1387 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1389 if (bank == 0 || bank > 2) {
1390 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1392 /* switch to subclient */
1393 cl = data->lm75[bank - 1];
1394 /* convert from ISA to LM75 I2C addresses */
1395 switch (reg & 0xff) {
1396 case 0x50: /* TEMP */
1397 res = swab16(i2c_smbus_read_word_data(cl, 0));
1399 case 0x52: /* CONFIG */
1400 res = i2c_smbus_read_byte_data(cl, 1);
1402 case 0x53: /* HYST */
1403 res = swab16(i2c_smbus_read_word_data(cl, 2));
1405 case 0x55: /* OVER */
1407 res = swab16(i2c_smbus_read_word_data(cl, 3));
1412 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1414 mutex_unlock(&data->lock);
1419 w83781d_write_value(struct w83781d_data *data, u16 reg, u16 value)
1421 struct i2c_client *client = &data->client;
1422 int word_sized, bank;
1423 struct i2c_client *cl;
1425 mutex_lock(&data->lock);
1426 if (!client->driver) { /* ISA device */
1427 word_sized = (((reg & 0xff00) == 0x100)
1428 || ((reg & 0xff00) == 0x200))
1429 && (((reg & 0x00ff) == 0x53)
1430 || ((reg & 0x00ff) == 0x55));
1432 outb_p(W83781D_REG_BANK,
1433 client->addr + W83781D_ADDR_REG_OFFSET);
1435 client->addr + W83781D_DATA_REG_OFFSET);
1437 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1440 client->addr + W83781D_DATA_REG_OFFSET);
1441 outb_p((reg & 0xff) + 1,
1442 client->addr + W83781D_ADDR_REG_OFFSET);
1444 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1446 outb_p(W83781D_REG_BANK,
1447 client->addr + W83781D_ADDR_REG_OFFSET);
1448 outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1451 bank = (reg >> 8) & 0x0f;
1454 i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1456 if (bank == 0 || bank > 2) {
1457 i2c_smbus_write_byte_data(client, reg & 0xff,
1460 /* switch to subclient */
1461 cl = data->lm75[bank - 1];
1462 /* convert from ISA to LM75 I2C addresses */
1463 switch (reg & 0xff) {
1464 case 0x52: /* CONFIG */
1465 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1467 case 0x53: /* HYST */
1468 i2c_smbus_write_word_data(cl, 2, swab16(value));
1470 case 0x55: /* OVER */
1471 i2c_smbus_write_word_data(cl, 3, swab16(value));
1476 i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1478 mutex_unlock(&data->lock);
1483 w83781d_init_device(struct device *dev)
1485 struct w83781d_data *data = dev_get_drvdata(dev);
1487 int type = data->type;
1490 if (reset && type != as99127f) { /* this resets registers we don't have
1491 documentation for on the as99127f */
1492 /* Resetting the chip has been the default for a long time,
1493 but it causes the BIOS initializations (fan clock dividers,
1494 thermal sensor types...) to be lost, so it is now optional.
1495 It might even go away if nobody reports it as being useful,
1496 as I see very little reason why this would be needed at
1498 dev_info(dev, "If reset=1 solved a problem you were "
1499 "having, please report!\n");
1501 /* save these registers */
1502 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1503 p = w83781d_read_value(data, W83781D_REG_PWMCLK12);
1504 /* Reset all except Watchdog values and last conversion values
1505 This sets fan-divs to 2, among others */
1506 w83781d_write_value(data, W83781D_REG_CONFIG, 0x80);
1507 /* Restore the registers and disable power-on abnormal beep.
1508 This saves FAN 1/2/3 input/output values set by BIOS. */
1509 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1510 w83781d_write_value(data, W83781D_REG_PWMCLK12, p);
1511 /* Disable master beep-enable (reset turns it on).
1512 Individual beep_mask should be reset to off but for some reason
1513 disabling this bit helps some people not get beeped */
1514 w83781d_write_value(data, W83781D_REG_BEEP_INTS2, 0);
1517 /* Disable power-on abnormal beep, as advised by the datasheet.
1518 Already done if reset=1. */
1519 if (init && !reset && type != as99127f) {
1520 i = w83781d_read_value(data, W83781D_REG_BEEP_CONFIG);
1521 w83781d_write_value(data, W83781D_REG_BEEP_CONFIG, i | 0x80);
1524 data->vrm = vid_which_vrm();
1526 if ((type != w83781d) && (type != as99127f)) {
1527 tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
1528 for (i = 1; i <= 3; i++) {
1529 if (!(tmp & BIT_SCFG1[i - 1])) {
1530 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1532 if (w83781d_read_value
1534 W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1535 data->sens[i - 1] = 1;
1537 data->sens[i - 1] = 2;
1539 if (type == w83783s && i == 2)
1544 if (init && type != as99127f) {
1546 tmp = w83781d_read_value(data, W83781D_REG_TEMP2_CONFIG);
1548 dev_warn(dev, "Enabling temp2, readings "
1549 "might not make sense\n");
1550 w83781d_write_value(data, W83781D_REG_TEMP2_CONFIG,
1555 if (type != w83783s) {
1556 tmp = w83781d_read_value(data,
1557 W83781D_REG_TEMP3_CONFIG);
1559 dev_warn(dev, "Enabling temp3, "
1560 "readings might not make sense\n");
1561 w83781d_write_value(data,
1562 W83781D_REG_TEMP3_CONFIG, tmp & 0xfe);
1567 /* Start monitoring */
1568 w83781d_write_value(data, W83781D_REG_CONFIG,
1569 (w83781d_read_value(data,
1570 W83781D_REG_CONFIG) & 0xf7)
1573 /* A few vars need to be filled upon startup */
1574 for (i = 1; i <= 3; i++) {
1575 data->fan_min[i - 1] = w83781d_read_value(data,
1576 W83781D_REG_FAN_MIN(i));
1578 if (type != w83781d && type != as99127f)
1579 for (i = 0; i < 4; i++)
1580 data->pwmenable[i] = 1;
1582 mutex_init(&data->update_lock);
1585 static struct w83781d_data *w83781d_update_device(struct device *dev)
1587 struct w83781d_data *data = dev_get_drvdata(dev);
1588 struct i2c_client *client = &data->client;
1591 mutex_lock(&data->update_lock);
1593 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
1595 dev_dbg(dev, "Starting device update\n");
1597 for (i = 0; i <= 8; i++) {
1598 if (data->type == w83783s && i == 1)
1599 continue; /* 783S has no in1 */
1601 w83781d_read_value(data, W83781D_REG_IN(i));
1603 w83781d_read_value(data, W83781D_REG_IN_MIN(i));
1605 w83781d_read_value(data, W83781D_REG_IN_MAX(i));
1606 if ((data->type != w83782d)
1607 && (data->type != w83627hf) && (i == 6))
1610 for (i = 1; i <= 3; i++) {
1612 w83781d_read_value(data, W83781D_REG_FAN(i));
1613 data->fan_min[i - 1] =
1614 w83781d_read_value(data, W83781D_REG_FAN_MIN(i));
1616 if (data->type != w83781d && data->type != as99127f) {
1617 for (i = 1; i <= 4; i++) {
1619 w83781d_read_value(data,
1620 W83781D_REG_PWM(i));
1621 if ((data->type != w83782d || !client->driver)
1625 /* Only PWM2 can be disabled */
1626 data->pwmenable[1] = (w83781d_read_value(data,
1627 W83781D_REG_PWMCLK12) & 0x08) >> 3;
1630 data->temp = w83781d_read_value(data, W83781D_REG_TEMP(1));
1632 w83781d_read_value(data, W83781D_REG_TEMP_OVER(1));
1633 data->temp_max_hyst =
1634 w83781d_read_value(data, W83781D_REG_TEMP_HYST(1));
1636 w83781d_read_value(data, W83781D_REG_TEMP(2));
1637 data->temp_max_add[0] =
1638 w83781d_read_value(data, W83781D_REG_TEMP_OVER(2));
1639 data->temp_max_hyst_add[0] =
1640 w83781d_read_value(data, W83781D_REG_TEMP_HYST(2));
1641 if (data->type != w83783s) {
1643 w83781d_read_value(data, W83781D_REG_TEMP(3));
1644 data->temp_max_add[1] =
1645 w83781d_read_value(data,
1646 W83781D_REG_TEMP_OVER(3));
1647 data->temp_max_hyst_add[1] =
1648 w83781d_read_value(data,
1649 W83781D_REG_TEMP_HYST(3));
1651 i = w83781d_read_value(data, W83781D_REG_VID_FANDIV);
1652 data->vid = i & 0x0f;
1653 data->vid |= (w83781d_read_value(data,
1654 W83781D_REG_CHIPID) & 0x01) << 4;
1655 data->fan_div[0] = (i >> 4) & 0x03;
1656 data->fan_div[1] = (i >> 6) & 0x03;
1657 data->fan_div[2] = (w83781d_read_value(data,
1658 W83781D_REG_PIN) >> 6) & 0x03;
1659 if ((data->type != w83781d) && (data->type != as99127f)) {
1660 i = w83781d_read_value(data, W83781D_REG_VBAT);
1661 data->fan_div[0] |= (i >> 3) & 0x04;
1662 data->fan_div[1] |= (i >> 4) & 0x04;
1663 data->fan_div[2] |= (i >> 5) & 0x04;
1665 if ((data->type == w83782d) || (data->type == w83627hf)) {
1666 data->alarms = w83781d_read_value(data,
1668 | (w83781d_read_value(data,
1669 W83782D_REG_ALARM2) << 8)
1670 | (w83781d_read_value(data,
1671 W83782D_REG_ALARM3) << 16);
1672 } else if (data->type == w83783s) {
1673 data->alarms = w83781d_read_value(data,
1675 | (w83781d_read_value(data,
1676 W83782D_REG_ALARM2) << 8);
1678 /* No real-time status registers, fall back to
1679 interrupt status registers */
1680 data->alarms = w83781d_read_value(data,
1682 | (w83781d_read_value(data,
1683 W83781D_REG_ALARM2) << 8);
1685 i = w83781d_read_value(data, W83781D_REG_BEEP_INTS2);
1686 data->beep_enable = i >> 7;
1687 data->beep_mask = ((i & 0x7f) << 8) +
1688 w83781d_read_value(data, W83781D_REG_BEEP_INTS1);
1689 if ((data->type != w83781d) && (data->type != as99127f)) {
1691 w83781d_read_value(data,
1692 W83781D_REG_BEEP_INTS3) << 16;
1694 data->last_updated = jiffies;
1698 mutex_unlock(&data->update_lock);
1703 /* return 1 if a supported chip is found, 0 otherwise */
1705 w83781d_isa_found(unsigned short address)
1707 int val, save, found = 0;
1709 if (!request_region(address, W83781D_EXTENT, "w83781d"))
1712 #define REALLY_SLOW_IO
1713 /* We need the timeouts for at least some W83781D-like
1714 chips. But only if we read 'undefined' registers. */
1715 val = inb_p(address + 1);
1716 if (inb_p(address + 2) != val
1717 || inb_p(address + 3) != val
1718 || inb_p(address + 7) != val) {
1719 pr_debug("w83781d: Detection failed at step 1\n");
1722 #undef REALLY_SLOW_IO
1724 /* We should be able to change the 7 LSB of the address port. The
1725 MSB (busy flag) should be clear initially, set after the write. */
1726 save = inb_p(address + W83781D_ADDR_REG_OFFSET);
1728 pr_debug("w83781d: Detection failed at step 2\n");
1732 outb_p(val, address + W83781D_ADDR_REG_OFFSET);
1733 if (inb_p(address + W83781D_ADDR_REG_OFFSET) != (val | 0x80)) {
1734 outb_p(save, address + W83781D_ADDR_REG_OFFSET);
1735 pr_debug("w83781d: Detection failed at step 3\n");
1739 /* We found a device, now see if it could be a W83781D */
1740 outb_p(W83781D_REG_CONFIG, address + W83781D_ADDR_REG_OFFSET);
1741 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1743 pr_debug("w83781d: Detection failed at step 4\n");
1746 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1747 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1748 outb_p(W83781D_REG_CHIPMAN, address + W83781D_ADDR_REG_OFFSET);
1749 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1750 if ((!(save & 0x80) && (val != 0xa3))
1751 || ((save & 0x80) && (val != 0x5c))) {
1752 pr_debug("w83781d: Detection failed at step 5\n");
1755 outb_p(W83781D_REG_I2C_ADDR, address + W83781D_ADDR_REG_OFFSET);
1756 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1757 if (val < 0x03 || val > 0x77) { /* Not a valid I2C address */
1758 pr_debug("w83781d: Detection failed at step 6\n");
1762 /* The busy flag should be clear again */
1763 if (inb_p(address + W83781D_ADDR_REG_OFFSET) & 0x80) {
1764 pr_debug("w83781d: Detection failed at step 7\n");
1768 /* Determine the chip type */
1769 outb_p(W83781D_REG_BANK, address + W83781D_ADDR_REG_OFFSET);
1770 save = inb_p(address + W83781D_DATA_REG_OFFSET);
1771 outb_p(save & 0xf8, address + W83781D_DATA_REG_OFFSET);
1772 outb_p(W83781D_REG_WCHIPID, address + W83781D_ADDR_REG_OFFSET);
1773 val = inb_p(address + W83781D_DATA_REG_OFFSET);
1774 if ((val & 0xfe) == 0x10 /* W83781D */
1775 || val == 0x30 /* W83782D */
1776 || val == 0x21) /* W83627HF */
1780 pr_info("w83781d: Found a %s chip at %#x\n",
1781 val == 0x21 ? "W83627HF" :
1782 val == 0x30 ? "W83782D" : "W83781D", (int)address);
1785 release_region(address, W83781D_EXTENT);
1790 w83781d_isa_device_add(unsigned short address)
1792 struct resource res = {
1794 .end = address + W83781D_EXTENT,
1796 .flags = IORESOURCE_IO,
1800 pdev = platform_device_alloc("w83781d", address);
1803 printk(KERN_ERR "w83781d: Device allocation failed\n");
1807 err = platform_device_add_resources(pdev, &res, 1);
1809 printk(KERN_ERR "w83781d: Device resource addition failed "
1811 goto exit_device_put;
1814 err = platform_device_add(pdev);
1816 printk(KERN_ERR "w83781d: Device addition failed (%d)\n",
1818 goto exit_device_put;
1824 platform_device_put(pdev);
1831 sensors_w83781d_init(void)
1835 res = i2c_add_driver(&w83781d_driver);
1839 if (w83781d_isa_found(isa_address)) {
1840 res = platform_driver_register(&w83781d_isa_driver);
1842 goto exit_unreg_i2c_driver;
1844 /* Sets global pdev as a side effect */
1845 res = w83781d_isa_device_add(isa_address);
1847 goto exit_unreg_isa_driver;
1852 exit_unreg_isa_driver:
1853 platform_driver_unregister(&w83781d_isa_driver);
1854 exit_unreg_i2c_driver:
1855 i2c_del_driver(&w83781d_driver);
1861 sensors_w83781d_exit(void)
1864 platform_device_unregister(pdev);
1865 platform_driver_unregister(&w83781d_isa_driver);
1867 i2c_del_driver(&w83781d_driver);
1870 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1871 "Philip Edelbrock <phil@netroedge.com>, "
1872 "and Mark Studebaker <mdsxyz123@yahoo.com>");
1873 MODULE_DESCRIPTION("W83781D driver");
1874 MODULE_LICENSE("GPL");
1876 module_init(sensors_w83781d_init);
1877 module_exit(sensors_w83781d_exit);