arch/x86/include/asm/qspinlock_paravirt.h

   1 #ifndef __ASM_QSPINLOCK_PARAVIRT_H
   2 #define __ASM_QSPINLOCK_PARAVIRT_H
   3
   4 /*
   5  * For x86-64, PV_CALLEE_SAVE_REGS_THUNK() saves and restores 8 64-bit
   6  * registers. For i386, however, only 1 32-bit register needs to be saved
   7  * and restored. So an optimized version of __pv_queued_spin_unlock() is
   8  * hand-coded for 64-bit, but it isn't worthwhile to do it for 32-bit.
   9  */
  10 #ifdef CONFIG_64BIT
  11
  12 PV_CALLEE_SAVE_REGS_THUNK(__pv_queued_spin_unlock_slowpath);
  13 #define __pv_queued_spin_unlock __pv_queued_spin_unlock
  14 #define PV_UNLOCK               "__raw_callee_save___pv_queued_spin_unlock"
  15 #define PV_UNLOCK_SLOWPATH      "__raw_callee_save___pv_queued_spin_unlock_slowpath"
  16
  17 /*
  18  * Optimized assembly version of __raw_callee_save___pv_queued_spin_unlock
  19  * which combines the registers saving trunk and the body of the following
  20  * C code:
  21  *
  22  * void __pv_queued_spin_unlock(struct qspinlock *lock)
  23  * {
  24  *      struct __qspinlock *l = (void *)lock;
  25  *      u8 lockval = cmpxchg(&l->locked, _Q_LOCKED_VAL, 0);
  26  *
  27  *      if (likely(lockval == _Q_LOCKED_VAL))
  28  *              return;
  29  *      pv_queued_spin_unlock_slowpath(lock, lockval);
  30  * }
  31  *
  32  * For x86-64,
  33  *   rdi = lock              (first argument)
  34  *   rsi = lockval           (second argument)
  35  *   rdx = internal variable (set to 0)
  36  */
  37 asm    (".pushsection .text;"
  38         ".globl " PV_UNLOCK ";"
  39         ".align 4,0x90;"
  40         PV_UNLOCK ": "
  41         "push  %rdx;"
  42         "mov   $0x1,%eax;"
  43         "xor   %edx,%edx;"
  44         "lock cmpxchg %dl,(%rdi);"
  45         "cmp   $0x1,%al;"
  46         "jne   .slowpath;"
  47         "pop   %rdx;"
  48         "ret;"
  49         ".slowpath: "
  50         "push   %rsi;"
  51         "movzbl %al,%esi;"
  52         "call " PV_UNLOCK_SLOWPATH ";"
  53         "pop    %rsi;"
  54         "pop    %rdx;"
  55         "ret;"
  56         ".size " PV_UNLOCK ", .-" PV_UNLOCK ";"
  57         ".popsection");
  58
  59 #else /* CONFIG_64BIT */
  60
  61 extern void __pv_queued_spin_unlock(struct qspinlock *lock);
  62 PV_CALLEE_SAVE_REGS_THUNK(__pv_queued_spin_unlock);
  63
  64 #endif /* CONFIG_64BIT */
  65 #endif