arch/arm/boot/dts/omap3.dtsi

   1 /*
   2  * Device Tree Source for OMAP3 SoC
   3  *
   4  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include <dt-bindings/interrupt-controller/irq.h>
  13 #include <dt-bindings/pinctrl/omap.h>
  14
  15 #include "skeleton.dtsi"
  16
  17 / {
  18         compatible = "ti,omap3430", "ti,omap3";
  19         interrupt-parent = <&intc>;
  20
  21         aliases {
  22                 i2c0 = &i2c1;
  23                 i2c1 = &i2c2;
  24                 i2c2 = &i2c3;
  25                 serial0 = &uart1;
  26                 serial1 = &uart2;
  27                 serial2 = &uart3;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 cpu@0 {
  35                         compatible = "arm,cortex-a8";
  36                         device_type = "cpu";
  37                         reg = <0x0>;
  38
  39                         clocks = <&dpll1_ck>;
  40                         clock-names = "cpu";
  41
  42                         clock-latency = <300000>; /* From omap-cpufreq driver */
  43                 };
  44         };
  45
  46         pmu {
  47                 compatible = "arm,cortex-a8-pmu";
  48                 reg = <0x54000000 0x800000>;
  49                 interrupts = <3>;
  50                 ti,hwmods = "debugss";
  51         };
  52
  53         /*
  54          * The soc node represents the soc top level view. It is used for IPs
  55          * that are not memory mapped in the MPU view or for the MPU itself.
  56          */
  57         soc {
  58                 compatible = "ti,omap-infra";
  59                 mpu {
  60                         compatible = "ti,omap3-mpu";
  61                         ti,hwmods = "mpu";
  62                 };
  63
  64                 iva {
  65                         compatible = "ti,iva2.2";
  66                         ti,hwmods = "iva";
  67
  68                         dsp {
  69                                 compatible = "ti,omap3-c64";
  70                         };
  71                 };
  72         };
  73
  74         /*
  75          * XXX: Use a flat representation of the OMAP3 interconnect.
  76          * The real OMAP interconnect network is quite complex.
  77          * Since that will not bring real advantage to represent that in DT for
  78          * the moment, just use a fake OCP bus entry to represent the whole bus
  79          * hierarchy.
  80          */
  81         ocp {
  82                 compatible = "simple-bus";
  83                 reg = <0x68000000 0x10000>;
  84                 interrupts = <9 10>;
  85                 #address-cells = <1>;
  86                 #size-cells = <1>;
  87                 ranges;
  88                 ti,hwmods = "l3_main";
  89
  90                 aes: aes@480c5000 {
  91                         compatible = "ti,omap3-aes";
  92                         ti,hwmods = "aes";
  93                         reg = <0x480c5000 0x50>;
  94                         interrupts = <0>;
  95                 };
  96
  97                 prm: prm@48306000 {
  98                         compatible = "ti,omap3-prm";
  99                         reg = <0x48306000 0x4000>;
 100
 101                         prm_clocks: clocks {
 102                                 #address-cells = <1>;
 103                                 #size-cells = <0>;
 104                         };
 105
 106                         prm_clockdomains: clockdomains {
 107                         };
 108                 };
 109
 110                 cm: cm@48004000 {
 111                         compatible = "ti,omap3-cm";
 112                         reg = <0x48004000 0x4000>;
 113
 114                         cm_clocks: clocks {
 115                                 #address-cells = <1>;
 116                                 #size-cells = <0>;
 117                         };
 118
 119                         cm_clockdomains: clockdomains {
 120                         };
 121                 };
 122
 123                 scrm: scrm@48002000 {
 124                         compatible = "ti,omap3-scrm";
 125                         reg = <0x48002000 0x2000>;
 126
 127                         scrm_clocks: clocks {
 128                                 #address-cells = <1>;
 129                                 #size-cells = <0>;
 130                         };
 131
 132                         scrm_clockdomains: clockdomains {
 133                         };
 134                 };
 135
 136                 counter32k: counter@48320000 {
 137                         compatible = "ti,omap-counter32k";
 138                         reg = <0x48320000 0x20>;
 139                         ti,hwmods = "counter_32k";
 140                 };
 141
 142                 intc: interrupt-controller@48200000 {
 143                         compatible = "ti,omap2-intc";
 144                         interrupt-controller;
 145                         #interrupt-cells = <1>;
 146                         ti,intc-size = <96>;
 147                         reg = <0x48200000 0x1000>;
 148                 };
 149
 150                 sdma: dma-controller@48056000 {
 151                         compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
 152                         reg = <0x48056000 0x1000>;
 153                         interrupts = <12>,
 154                                      <13>,
 155                                      <14>,
 156                                      <15>;
 157                         #dma-cells = <1>;
 158                         #dma-channels = <32>;
 159                         #dma-requests = <96>;
 160                 };
 161
 162                 omap3_pmx_core: pinmux@48002030 {
 163                         compatible = "ti,omap3-padconf", "pinctrl-single";
 164                         reg = <0x48002030 0x0238>;
 165                         #address-cells = <1>;
 166                         #size-cells = <0>;
 167                         #interrupt-cells = <1>;
 168                         interrupt-controller;
 169                         pinctrl-single,register-width = <16>;
 170                         pinctrl-single,function-mask = <0xff1f>;
 171                 };
 172
 173                 omap3_pmx_wkup: pinmux@48002a00 {
 174                         compatible = "ti,omap3-padconf", "pinctrl-single";
 175                         reg = <0x48002a00 0x5c>;
 176                         #address-cells = <1>;
 177                         #size-cells = <0>;
 178                         #interrupt-cells = <1>;
 179                         interrupt-controller;
 180                         pinctrl-single,register-width = <16>;
 181                         pinctrl-single,function-mask = <0xff1f>;
 182                 };
 183
 184                 gpio1: gpio@48310000 {
 185                         compatible = "ti,omap3-gpio";
 186                         reg = <0x48310000 0x200>;
 187                         interrupts = <29>;
 188                         ti,hwmods = "gpio1";
 189                         ti,gpio-always-on;
 190                         gpio-controller;
 191                         #gpio-cells = <2>;
 192                         interrupt-controller;
 193                         #interrupt-cells = <2>;
 194                 };
 195
 196                 gpio2: gpio@49050000 {
 197                         compatible = "ti,omap3-gpio";
 198                         reg = <0x49050000 0x200>;
 199                         interrupts = <30>;
 200                         ti,hwmods = "gpio2";
 201                         gpio-controller;
 202                         #gpio-cells = <2>;
 203                         interrupt-controller;
 204                         #interrupt-cells = <2>;
 205                 };
 206
 207                 gpio3: gpio@49052000 {
 208                         compatible = "ti,omap3-gpio";
 209                         reg = <0x49052000 0x200>;
 210                         interrupts = <31>;
 211                         ti,hwmods = "gpio3";
 212                         gpio-controller;
 213                         #gpio-cells = <2>;
 214                         interrupt-controller;
 215                         #interrupt-cells = <2>;
 216                 };
 217
 218                 gpio4: gpio@49054000 {
 219                         compatible = "ti,omap3-gpio";
 220                         reg = <0x49054000 0x200>;
 221                         interrupts = <32>;
 222                         ti,hwmods = "gpio4";
 223                         gpio-controller;
 224                         #gpio-cells = <2>;
 225                         interrupt-controller;
 226                         #interrupt-cells = <2>;
 227                 };
 228
 229                 gpio5: gpio@49056000 {
 230                         compatible = "ti,omap3-gpio";
 231                         reg = <0x49056000 0x200>;
 232                         interrupts = <33>;
 233                         ti,hwmods = "gpio5";
 234                         gpio-controller;
 235                         #gpio-cells = <2>;
 236                         interrupt-controller;
 237                         #interrupt-cells = <2>;
 238                 };
 239
 240                 gpio6: gpio@49058000 {
 241                         compatible = "ti,omap3-gpio";
 242                         reg = <0x49058000 0x200>;
 243                         interrupts = <34>;
 244                         ti,hwmods = "gpio6";
 245                         gpio-controller;
 246                         #gpio-cells = <2>;
 247                         interrupt-controller;
 248                         #interrupt-cells = <2>;
 249                 };
 250
 251                 uart1: serial@4806a000 {
 252                         compatible = "ti,omap3-uart";
 253                         reg = <0x4806a000 0x2000>;
 254                         interrupts = <72>;
 255                         dmas = <&sdma 49 &sdma 50>;
 256                         dma-names = "tx", "rx";
 257                         ti,hwmods = "uart1";
 258                         clock-frequency = <48000000>;
 259                 };
 260
 261                 uart2: serial@4806c000 {
 262                         compatible = "ti,omap3-uart";
 263                         reg = <0x4806c000 0x400>;
 264                         interrupts = <73>;
 265                         dmas = <&sdma 51 &sdma 52>;
 266                         dma-names = "tx", "rx";
 267                         ti,hwmods = "uart2";
 268                         clock-frequency = <48000000>;
 269                 };
 270
 271                 uart3: serial@49020000 {
 272                         compatible = "ti,omap3-uart";
 273                         reg = <0x49020000 0x400>;
 274                         interrupts = <74>;
 275                         dmas = <&sdma 53 &sdma 54>;
 276                         dma-names = "tx", "rx";
 277                         ti,hwmods = "uart3";
 278                         clock-frequency = <48000000>;
 279                 };
 280
 281                 i2c1: i2c@48070000 {
 282                         compatible = "ti,omap3-i2c";
 283                         reg = <0x48070000 0x80>;
 284                         interrupts = <56>;
 285                         dmas = <&sdma 27 &sdma 28>;
 286                         dma-names = "tx", "rx";
 287                         #address-cells = <1>;
 288                         #size-cells = <0>;
 289                         ti,hwmods = "i2c1";
 290                 };
 291
 292                 i2c2: i2c@48072000 {
 293                         compatible = "ti,omap3-i2c";
 294                         reg = <0x48072000 0x80>;
 295                         interrupts = <57>;
 296                         dmas = <&sdma 29 &sdma 30>;
 297                         dma-names = "tx", "rx";
 298                         #address-cells = <1>;
 299                         #size-cells = <0>;
 300                         ti,hwmods = "i2c2";
 301                 };
 302
 303                 i2c3: i2c@48060000 {
 304                         compatible = "ti,omap3-i2c";
 305                         reg = <0x48060000 0x80>;
 306                         interrupts = <61>;
 307                         dmas = <&sdma 25 &sdma 26>;
 308                         dma-names = "tx", "rx";
 309                         #address-cells = <1>;
 310                         #size-cells = <0>;
 311                         ti,hwmods = "i2c3";
 312                 };
 313
 314                 mailbox: mailbox@48094000 {
 315                         compatible = "ti,omap3-mailbox";
 316                         ti,hwmods = "mailbox";
 317                         reg = <0x48094000 0x200>;
 318                         interrupts = <26>;
 319                 };
 320
 321                 mcspi1: spi@48098000 {
 322                         compatible = "ti,omap2-mcspi";
 323                         reg = <0x48098000 0x100>;
 324                         interrupts = <65>;
 325                         #address-cells = <1>;
 326                         #size-cells = <0>;
 327                         ti,hwmods = "mcspi1";
 328                         ti,spi-num-cs = <4>;
 329                         dmas = <&sdma 35>,
 330                                <&sdma 36>,
 331                                <&sdma 37>,
 332                                <&sdma 38>,
 333                                <&sdma 39>,
 334                                <&sdma 40>,
 335                                <&sdma 41>,
 336                                <&sdma 42>;
 337                         dma-names = "tx0", "rx0", "tx1", "rx1",
 338                                     "tx2", "rx2", "tx3", "rx3";
 339                 };
 340
 341                 mcspi2: spi@4809a000 {
 342                         compatible = "ti,omap2-mcspi";
 343                         reg = <0x4809a000 0x100>;
 344                         interrupts = <66>;
 345                         #address-cells = <1>;
 346                         #size-cells = <0>;
 347                         ti,hwmods = "mcspi2";
 348                         ti,spi-num-cs = <2>;
 349                         dmas = <&sdma 43>,
 350                                <&sdma 44>,
 351                                <&sdma 45>,
 352                                <&sdma 46>;
 353                         dma-names = "tx0", "rx0", "tx1", "rx1";
 354                 };
 355
 356                 mcspi3: spi@480b8000 {
 357                         compatible = "ti,omap2-mcspi";
 358                         reg = <0x480b8000 0x100>;
 359                         interrupts = <91>;
 360                         #address-cells = <1>;
 361                         #size-cells = <0>;
 362                         ti,hwmods = "mcspi3";
 363                         ti,spi-num-cs = <2>;
 364                         dmas = <&sdma 15>,
 365                                <&sdma 16>,
 366                                <&sdma 23>,
 367                                <&sdma 24>;
 368                         dma-names = "tx0", "rx0", "tx1", "rx1";
 369                 };
 370
 371                 mcspi4: spi@480ba000 {
 372                         compatible = "ti,omap2-mcspi";
 373                         reg = <0x480ba000 0x100>;
 374                         interrupts = <48>;
 375                         #address-cells = <1>;
 376                         #size-cells = <0>;
 377                         ti,hwmods = "mcspi4";
 378                         ti,spi-num-cs = <1>;
 379                         dmas = <&sdma 70>, <&sdma 71>;
 380                         dma-names = "tx0", "rx0";
 381                 };
 382
 383                 hdqw1w: 1w@480b2000 {
 384                         compatible = "ti,omap3-1w";
 385                         reg = <0x480b2000 0x1000>;
 386                         interrupts = <58>;
 387                         ti,hwmods = "hdq1w";
 388                 };
 389
 390                 mmc1: mmc@4809c000 {
 391                         compatible = "ti,omap3-hsmmc";
 392                         reg = <0x4809c000 0x200>;
 393                         interrupts = <83>;
 394                         ti,hwmods = "mmc1";
 395                         ti,dual-volt;
 396                         dmas = <&sdma 61>, <&sdma 62>;
 397                         dma-names = "tx", "rx";
 398                 };
 399
 400                 mmc2: mmc@480b4000 {
 401                         compatible = "ti,omap3-hsmmc";
 402                         reg = <0x480b4000 0x200>;
 403                         interrupts = <86>;
 404                         ti,hwmods = "mmc2";
 405                         dmas = <&sdma 47>, <&sdma 48>;
 406                         dma-names = "tx", "rx";
 407                 };
 408
 409                 mmc3: mmc@480ad000 {
 410                         compatible = "ti,omap3-hsmmc";
 411                         reg = <0x480ad000 0x200>;
 412                         interrupts = <94>;
 413                         ti,hwmods = "mmc3";
 414                         dmas = <&sdma 77>, <&sdma 78>;
 415                         dma-names = "tx", "rx";
 416                 };
 417
 418                 mmu_isp: mmu@480bd400 {
 419                         compatible = "ti,omap2-iommu";
 420                         reg = <0x480bd400 0x80>;
 421                         interrupts = <24>;
 422                         ti,hwmods = "mmu_isp";
 423                         ti,#tlb-entries = <8>;
 424                 };
 425
 426                 mmu_iva: mmu@5d000000 {
 427                         compatible = "ti,omap2-iommu";
 428                         reg = <0x5d000000 0x80>;
 429                         interrupts = <28>;
 430                         ti,hwmods = "mmu_iva";
 431                         status = "disabled";
 432                 };
 433
 434                 wdt2: wdt@48314000 {
 435                         compatible = "ti,omap3-wdt";
 436                         reg = <0x48314000 0x80>;
 437                         ti,hwmods = "wd_timer2";
 438                 };
 439
 440                 mcbsp1: mcbsp@48074000 {
 441                         compatible = "ti,omap3-mcbsp";
 442                         reg = <0x48074000 0xff>;
 443                         reg-names = "mpu";
 444                         interrupts = <16>, /* OCP compliant interrupt */
 445                                      <59>, /* TX interrupt */
 446                                      <60>; /* RX interrupt */
 447                         interrupt-names = "common", "tx", "rx";
 448                         ti,buffer-size = <128>;
 449                         ti,hwmods = "mcbsp1";
 450                         dmas = <&sdma 31>,
 451                                <&sdma 32>;
 452                         dma-names = "tx", "rx";
 453                         status = "disabled";
 454                 };
 455
 456                 mcbsp2: mcbsp@49022000 {
 457                         compatible = "ti,omap3-mcbsp";
 458                         reg = <0x49022000 0xff>,
 459                               <0x49028000 0xff>;
 460                         reg-names = "mpu", "sidetone";
 461                         interrupts = <17>, /* OCP compliant interrupt */
 462                                      <62>, /* TX interrupt */
 463                                      <63>, /* RX interrupt */
 464                                      <4>;  /* Sidetone */
 465                         interrupt-names = "common", "tx", "rx", "sidetone";
 466                         ti,buffer-size = <1280>;
 467                         ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
 468                         dmas = <&sdma 33>,
 469                                <&sdma 34>;
 470                         dma-names = "tx", "rx";
 471                         status = "disabled";
 472                 };
 473
 474                 mcbsp3: mcbsp@49024000 {
 475                         compatible = "ti,omap3-mcbsp";
 476                         reg = <0x49024000 0xff>,
 477                               <0x4902a000 0xff>;
 478                         reg-names = "mpu", "sidetone";
 479                         interrupts = <22>, /* OCP compliant interrupt */
 480                                      <89>, /* TX interrupt */
 481                                      <90>, /* RX interrupt */
 482                                      <5>;  /* Sidetone */
 483                         interrupt-names = "common", "tx", "rx", "sidetone";
 484                         ti,buffer-size = <128>;
 485                         ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
 486                         dmas = <&sdma 17>,
 487                                <&sdma 18>;
 488                         dma-names = "tx", "rx";
 489                         status = "disabled";
 490                 };
 491
 492                 mcbsp4: mcbsp@49026000 {
 493                         compatible = "ti,omap3-mcbsp";
 494                         reg = <0x49026000 0xff>;
 495                         reg-names = "mpu";
 496                         interrupts = <23>, /* OCP compliant interrupt */
 497                                      <54>, /* TX interrupt */
 498                                      <55>; /* RX interrupt */
 499                         interrupt-names = "common", "tx", "rx";
 500                         ti,buffer-size = <128>;
 501                         ti,hwmods = "mcbsp4";
 502                         dmas = <&sdma 19>,
 503                                <&sdma 20>;
 504                         dma-names = "tx", "rx";
 505                         status = "disabled";
 506                 };
 507
 508                 mcbsp5: mcbsp@48096000 {
 509                         compatible = "ti,omap3-mcbsp";
 510                         reg = <0x48096000 0xff>;
 511                         reg-names = "mpu";
 512                         interrupts = <27>, /* OCP compliant interrupt */
 513                                      <81>, /* TX interrupt */
 514                                      <82>; /* RX interrupt */
 515                         interrupt-names = "common", "tx", "rx";
 516                         ti,buffer-size = <128>;
 517                         ti,hwmods = "mcbsp5";
 518                         dmas = <&sdma 21>,
 519                                <&sdma 22>;
 520                         dma-names = "tx", "rx";
 521                         status = "disabled";
 522                 };
 523
 524                 sham: sham@480c3000 {
 525                         compatible = "ti,omap3-sham";
 526                         ti,hwmods = "sham";
 527                         reg = <0x480c3000 0x64>;
 528                         interrupts = <49>;
 529                 };
 530
 531                 smartreflex_core: smartreflex@480cb000 {
 532                         compatible = "ti,omap3-smartreflex-core";
 533                         ti,hwmods = "smartreflex_core";
 534                         reg = <0x480cb000 0x400>;
 535                         interrupts = <19>;
 536                 };
 537
 538                 smartreflex_mpu_iva: smartreflex@480c9000 {
 539                         compatible = "ti,omap3-smartreflex-iva";
 540                         ti,hwmods = "smartreflex_mpu_iva";
 541                         reg = <0x480c9000 0x400>;
 542                         interrupts = <18>;
 543                 };
 544
 545                 timer1: timer@48318000 {
 546                         compatible = "ti,omap3430-timer";
 547                         reg = <0x48318000 0x400>;
 548                         interrupts = <37>;
 549                         ti,hwmods = "timer1";
 550                         ti,timer-alwon;
 551                 };
 552
 553                 timer2: timer@49032000 {
 554                         compatible = "ti,omap3430-timer";
 555                         reg = <0x49032000 0x400>;
 556                         interrupts = <38>;
 557                         ti,hwmods = "timer2";
 558                 };
 559
 560                 timer3: timer@49034000 {
 561                         compatible = "ti,omap3430-timer";
 562                         reg = <0x49034000 0x400>;
 563                         interrupts = <39>;
 564                         ti,hwmods = "timer3";
 565                 };
 566
 567                 timer4: timer@49036000 {
 568                         compatible = "ti,omap3430-timer";
 569                         reg = <0x49036000 0x400>;
 570                         interrupts = <40>;
 571                         ti,hwmods = "timer4";
 572                 };
 573
 574                 timer5: timer@49038000 {
 575                         compatible = "ti,omap3430-timer";
 576                         reg = <0x49038000 0x400>;
 577                         interrupts = <41>;
 578                         ti,hwmods = "timer5";
 579                         ti,timer-dsp;
 580                 };
 581
 582                 timer6: timer@4903a000 {
 583                         compatible = "ti,omap3430-timer";
 584                         reg = <0x4903a000 0x400>;
 585                         interrupts = <42>;
 586                         ti,hwmods = "timer6";
 587                         ti,timer-dsp;
 588                 };
 589
 590                 timer7: timer@4903c000 {
 591                         compatible = "ti,omap3430-timer";
 592                         reg = <0x4903c000 0x400>;
 593                         interrupts = <43>;
 594                         ti,hwmods = "timer7";
 595                         ti,timer-dsp;
 596                 };
 597
 598                 timer8: timer@4903e000 {
 599                         compatible = "ti,omap3430-timer";
 600                         reg = <0x4903e000 0x400>;
 601                         interrupts = <44>;
 602                         ti,hwmods = "timer8";
 603                         ti,timer-pwm;
 604                         ti,timer-dsp;
 605                 };
 606
 607                 timer9: timer@49040000 {
 608                         compatible = "ti,omap3430-timer";
 609                         reg = <0x49040000 0x400>;
 610                         interrupts = <45>;
 611                         ti,hwmods = "timer9";
 612                         ti,timer-pwm;
 613                 };
 614
 615                 timer10: timer@48086000 {
 616                         compatible = "ti,omap3430-timer";
 617                         reg = <0x48086000 0x400>;
 618                         interrupts = <46>;
 619                         ti,hwmods = "timer10";
 620                         ti,timer-pwm;
 621                 };
 622
 623                 timer11: timer@48088000 {
 624                         compatible = "ti,omap3430-timer";
 625                         reg = <0x48088000 0x400>;
 626                         interrupts = <47>;
 627                         ti,hwmods = "timer11";
 628                         ti,timer-pwm;
 629                 };
 630
 631                 timer12: timer@48304000 {
 632                         compatible = "ti,omap3430-timer";
 633                         reg = <0x48304000 0x400>;
 634                         interrupts = <95>;
 635                         ti,hwmods = "timer12";
 636                         ti,timer-alwon;
 637                         ti,timer-secure;
 638                 };
 639
 640                 usbhstll: usbhstll@48062000 {
 641                         compatible = "ti,usbhs-tll";
 642                         reg = <0x48062000 0x1000>;
 643                         interrupts = <78>;
 644                         ti,hwmods = "usb_tll_hs";
 645                 };
 646
 647                 usbhshost: usbhshost@48064000 {
 648                         compatible = "ti,usbhs-host";
 649                         reg = <0x48064000 0x400>;
 650                         ti,hwmods = "usb_host_hs";
 651                         #address-cells = <1>;
 652                         #size-cells = <1>;
 653                         ranges;
 654
 655                         usbhsohci: ohci@48064400 {
 656                                 compatible = "ti,ohci-omap3";
 657                                 reg = <0x48064400 0x400>;
 658                                 interrupt-parent = <&intc>;
 659                                 interrupts = <76>;
 660                         };
 661
 662                         usbhsehci: ehci@48064800 {
 663                                 compatible = "ti,ehci-omap";
 664                                 reg = <0x48064800 0x400>;
 665                                 interrupt-parent = <&intc>;
 666                                 interrupts = <77>;
 667                         };
 668                 };
 669
 670                 gpmc: gpmc@6e000000 {
 671                         compatible = "ti,omap3430-gpmc";
 672                         ti,hwmods = "gpmc";
 673                         reg = <0x6e000000 0x02d0>;
 674                         interrupts = <20>;
 675                         gpmc,num-cs = <8>;
 676                         gpmc,num-waitpins = <4>;
 677                         #address-cells = <2>;
 678                         #size-cells = <1>;
 679                 };
 680
 681                 usb_otg_hs: usb_otg_hs@480ab000 {
 682                         compatible = "ti,omap3-musb";
 683                         reg = <0x480ab000 0x1000>;
 684                         interrupts = <92>, <93>;
 685                         interrupt-names = "mc", "dma";
 686                         ti,hwmods = "usb_otg_hs";
 687                         multipoint = <1>;
 688                         num-eps = <16>;
 689                         ram-bits = <12>;
 690                 };
 691
 692                 dss: dss@48050000 {
 693                         compatible = "ti,omap3-dss";
 694                         reg = <0x48050000 0x200>;
 695                         status = "disabled";
 696                         ti,hwmods = "dss_core";
 697                         clocks = <&dss1_alwon_fck>;
 698                         clock-names = "fck";
 699                         #address-cells = <1>;
 700                         #size-cells = <1>;
 701                         ranges;
 702
 703                         dispc@48050400 {
 704                                 compatible = "ti,omap3-dispc";
 705                                 reg = <0x48050400 0x400>;
 706                                 interrupts = <25>;
 707                                 ti,hwmods = "dss_dispc";
 708                                 clocks = <&dss1_alwon_fck>;
 709                                 clock-names = "fck";
 710                         };
 711
 712                         dsi: encoder@4804fc00 {
 713                                 compatible = "ti,omap3-dsi";
 714                                 reg = <0x4804fc00 0x200>,
 715                                       <0x4804fe00 0x40>,
 716                                       <0x4804ff00 0x20>;
 717                                 reg-names = "proto", "phy", "pll";
 718                                 interrupts = <25>;
 719                                 status = "disabled";
 720                                 ti,hwmods = "dss_dsi1";
 721                                 clocks = <&dss1_alwon_fck>, <&dss2_alwon_fck>;
 722                                 clock-names = "fck", "sys_clk";
 723                         };
 724
 725                         rfbi: encoder@48050800 {
 726                                 compatible = "ti,omap3-rfbi";
 727                                 reg = <0x48050800 0x100>;
 728                                 status = "disabled";
 729                                 ti,hwmods = "dss_rfbi";
 730                                 clocks = <&dss1_alwon_fck>, <&dss_ick>;
 731                                 clock-names = "fck", "ick";
 732                         };
 733
 734                         venc: encoder@48050c00 {
 735                                 compatible = "ti,omap3-venc";
 736                                 reg = <0x48050c00 0x100>;
 737                                 status = "disabled";
 738                                 ti,hwmods = "dss_venc";
 739                                 clocks = <&dss_tv_fck>;
 740                                 clock-names = "fck";
 741                         };
 742                 };
 743         };
 744 };
 745
 746 /include/ "omap3xxx-clocks.dtsi"