Merge tag 'armsoc/for-3.15/dt-2' of git://github.com/broadcom/mach-bcm into next/dt
[linux.git] / arch / arm / boot / dts / imx6qdl-nitrogen6x.dtsi
1 /*
2  * Copyright 2013 Boundary Devices, Inc.
3  * Copyright 2011 Freescale Semiconductor, Inc.
4  * Copyright 2011 Linaro Ltd.
5  *
6  * The code contained herein is licensed under the GNU General Public
7  * License. You may obtain a copy of the GNU General Public License
8  * Version 2 or later at the following locations:
9  *
10  * http://www.opensource.org/licenses/gpl-license.html
11  * http://www.gnu.org/copyleft/gpl.html
12  */
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15
16 / {
17         memory {
18                 reg = <0x10000000 0x40000000>;
19         };
20
21         regulators {
22                 compatible = "simple-bus";
23                 #address-cells = <1>;
24                 #size-cells = <0>;
25
26                 reg_2p5v: regulator@0 {
27                         compatible = "regulator-fixed";
28                         reg = <0>;
29                         regulator-name = "2P5V";
30                         regulator-min-microvolt = <2500000>;
31                         regulator-max-microvolt = <2500000>;
32                         regulator-always-on;
33                 };
34
35                 reg_3p3v: regulator@1 {
36                         compatible = "regulator-fixed";
37                         reg = <1>;
38                         regulator-name = "3P3V";
39                         regulator-min-microvolt = <3300000>;
40                         regulator-max-microvolt = <3300000>;
41                         regulator-always-on;
42                 };
43
44                 reg_usb_otg_vbus: regulator@2 {
45                         compatible = "regulator-fixed";
46                         reg = <2>;
47                         regulator-name = "usb_otg_vbus";
48                         regulator-min-microvolt = <5000000>;
49                         regulator-max-microvolt = <5000000>;
50                         gpio = <&gpio3 22 0>;
51                         enable-active-high;
52                 };
53         };
54
55         gpio-keys {
56                 compatible = "gpio-keys";
57                 pinctrl-names = "default";
58                 pinctrl-0 = <&pinctrl_gpio_keys>;
59
60                 power {
61                         label = "Power Button";
62                         gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
63                         linux,code = <KEY_POWER>;
64                         gpio-key,wakeup;
65                 };
66
67                 menu {
68                         label = "Menu";
69                         gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
70                         linux,code = <KEY_MENU>;
71                 };
72
73                 home {
74                         label = "Home";
75                         gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
76                         linux,code = <KEY_HOME>;
77                 };
78
79                 back {
80                         label = "Back";
81                         gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
82                         linux,code = <KEY_BACK>;
83                 };
84
85                 volume-up {
86                         label = "Volume Up";
87                         gpios = <&gpio7 13 GPIO_ACTIVE_LOW>;
88                         linux,code = <KEY_VOLUMEUP>;
89                 };
90
91                 volume-down {
92                         label = "Volume Down";
93                         gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
94                         linux,code = <KEY_VOLUMEDOWN>;
95                 };
96         };
97
98         sound {
99                 compatible = "fsl,imx6q-nitrogen6x-sgtl5000",
100                              "fsl,imx-audio-sgtl5000";
101                 model = "imx6q-nitrogen6x-sgtl5000";
102                 ssi-controller = <&ssi1>;
103                 audio-codec = <&codec>;
104                 audio-routing =
105                         "MIC_IN", "Mic Jack",
106                         "Mic Jack", "Mic Bias",
107                         "Headphone Jack", "HP_OUT";
108                 mux-int-port = <1>;
109                 mux-ext-port = <3>;
110         };
111
112         backlight_lcd {
113                 compatible = "pwm-backlight";
114                 pwms = <&pwm1 0 5000000>;
115                 brightness-levels = <0 4 8 16 32 64 128 255>;
116                 default-brightness-level = <7>;
117                 power-supply = <&reg_3p3v>;
118                 status = "okay";
119         };
120
121         backlight_lvds {
122                 compatible = "pwm-backlight";
123                 pwms = <&pwm4 0 5000000>;
124                 brightness-levels = <0 4 8 16 32 64 128 255>;
125                 default-brightness-level = <7>;
126                 power-supply = <&reg_3p3v>;
127                 status = "okay";
128         };
129 };
130
131 &audmux {
132         pinctrl-names = "default";
133         pinctrl-0 = <&pinctrl_audmux>;
134         status = "okay";
135 };
136
137 &ecspi1 {
138         fsl,spi-num-chipselects = <1>;
139         cs-gpios = <&gpio3 19 0>;
140         pinctrl-names = "default";
141         pinctrl-0 = <&pinctrl_ecspi1>;
142         status = "okay";
143
144         flash: m25p80@0 {
145                 compatible = "sst,sst25vf016b";
146                 spi-max-frequency = <20000000>;
147                 reg = <0>;
148         };
149 };
150
151 &fec {
152         pinctrl-names = "default";
153         pinctrl-0 = <&pinctrl_enet>;
154         phy-mode = "rgmii";
155         phy-reset-gpios = <&gpio1 27 0>;
156         txen-skew-ps = <0>;
157         txc-skew-ps = <3000>;
158         rxdv-skew-ps = <0>;
159         rxc-skew-ps = <3000>;
160         rxd0-skew-ps = <0>;
161         rxd1-skew-ps = <0>;
162         rxd2-skew-ps = <0>;
163         rxd3-skew-ps = <0>;
164         txd0-skew-ps = <0>;
165         txd1-skew-ps = <0>;
166         txd2-skew-ps = <0>;
167         txd3-skew-ps = <0>;
168         interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
169                               <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
170         status = "okay";
171 };
172
173 &i2c1 {
174         clock-frequency = <100000>;
175         pinctrl-names = "default";
176         pinctrl-0 = <&pinctrl_i2c1>;
177         status = "okay";
178
179         codec: sgtl5000@0a {
180                 compatible = "fsl,sgtl5000";
181                 reg = <0x0a>;
182                 clocks = <&clks 201>;
183                 VDDA-supply = <&reg_2p5v>;
184                 VDDIO-supply = <&reg_3p3v>;
185         };
186 };
187
188 &iomuxc {
189         pinctrl-names = "default";
190         pinctrl-0 = <&pinctrl_hog>;
191
192         imx6q-nitrogen6x {
193                 pinctrl_hog: hoggrp {
194                         fsl,pins = <
195                                 /* SGTL5000 sys_mclk */
196                                 MX6QDL_PAD_GPIO_0__CCM_CLKO1    0x030b0
197                         >;
198                 };
199
200                 pinctrl_audmux: audmuxgrp {
201                         fsl,pins = <
202                                 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD          0x130b0
203                                 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC          0x130b0
204                                 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD          0x110b0
205                                 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS         0x130b0
206                         >;
207                 };
208
209                 pinctrl_ecspi1: ecspi1grp {
210                         fsl,pins = <
211                                 MX6QDL_PAD_EIM_D17__ECSPI1_MISO         0x100b1
212                                 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI         0x100b1
213                                 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK         0x100b1
214                                 MX6QDL_PAD_EIM_D19__GPIO3_IO19  0x000b1 /* CS */
215                         >;
216                 };
217
218                 pinctrl_enet: enetgrp {
219                         fsl,pins = <
220                                 MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
221                                 MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
222                                 MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
223                                 MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
224                                 MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
225                                 MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
226                                 MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
227                                 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
228                                 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
229                                 MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
230                                 MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
231                                 MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
232                                 MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
233                                 MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
234                                 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
235                                 /* Phy reset */
236                                 MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x000b0
237                                 MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
238                         >;
239                 };
240
241                 pinctrl_gpio_keys: gpio_keysgrp {
242                         fsl,pins = <
243                                 /* Power Button */
244                                 MX6QDL_PAD_NANDF_D3__GPIO2_IO03         0x1b0b0
245                                 /* Menu Button */
246                                 MX6QDL_PAD_NANDF_D1__GPIO2_IO01         0x1b0b0
247                                 /* Home Button */
248                                 MX6QDL_PAD_NANDF_D4__GPIO2_IO04         0x1b0b0
249                                 /* Back Button */
250                                 MX6QDL_PAD_NANDF_D2__GPIO2_IO02         0x1b0b0
251                                 /* Volume Up Button */
252                                 MX6QDL_PAD_GPIO_18__GPIO7_IO13          0x1b0b0
253                                 /* Volume Down Button */
254                                 MX6QDL_PAD_GPIO_19__GPIO4_IO05          0x1b0b0
255                         >;
256                 };
257
258                 pinctrl_i2c1: i2c1grp {
259                         fsl,pins = <
260                                 MX6QDL_PAD_EIM_D21__I2C1_SCL            0x4001b8b1
261                                 MX6QDL_PAD_EIM_D28__I2C1_SDA            0x4001b8b1
262                         >;
263                 };
264
265                 pinctrl_pwm1: pwm1grp {
266                         fsl,pins = <
267                                 MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
268                         >;
269                 };
270
271                 pinctrl_pwm3: pwm3grp {
272                         fsl,pins = <
273                                 MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
274                         >;
275                 };
276
277                 pinctrl_pwm4: pwm4grp {
278                         fsl,pins = <
279                                 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
280                         >;
281                 };
282
283                 pinctrl_uart1: uart1grp {
284                         fsl,pins = <
285                                 MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA      0x1b0b1
286                                 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA      0x1b0b1
287                         >;
288                 };
289
290                 pinctrl_uart2: uart2grp {
291                         fsl,pins = <
292                                 MX6QDL_PAD_EIM_D26__UART2_TX_DATA       0x1b0b1
293                                 MX6QDL_PAD_EIM_D27__UART2_RX_DATA       0x1b0b1
294                         >;
295                 };
296
297                 pinctrl_usbotg: usbotggrp {
298                         fsl,pins = <
299                                 MX6QDL_PAD_GPIO_1__USB_OTG_ID   0x17059
300                                 MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b0
301                                 /* power enable, high active */
302                                 MX6QDL_PAD_EIM_D22__GPIO3_IO22  0x000b0
303                         >;
304                 };
305
306                 pinctrl_usdhc3: usdhc3grp {
307                         fsl,pins = <
308                                 MX6QDL_PAD_SD3_CMD__SD3_CMD             0x17059
309                                 MX6QDL_PAD_SD3_CLK__SD3_CLK             0x10059
310                                 MX6QDL_PAD_SD3_DAT0__SD3_DATA0          0x17059
311                                 MX6QDL_PAD_SD3_DAT1__SD3_DATA1          0x17059
312                                 MX6QDL_PAD_SD3_DAT2__SD3_DATA2          0x17059
313                                 MX6QDL_PAD_SD3_DAT3__SD3_DATA3          0x17059
314                                 MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
315                         >;
316                 };
317
318                 pinctrl_usdhc4: usdhc4grp {
319                         fsl,pins = <
320                                 MX6QDL_PAD_SD4_CMD__SD4_CMD             0x17059
321                                 MX6QDL_PAD_SD4_CLK__SD4_CLK             0x10059
322                                 MX6QDL_PAD_SD4_DAT0__SD4_DATA0          0x17059
323                                 MX6QDL_PAD_SD4_DAT1__SD4_DATA1          0x17059
324                                 MX6QDL_PAD_SD4_DAT2__SD4_DATA2          0x17059
325                                 MX6QDL_PAD_SD4_DAT3__SD4_DATA3          0x17059
326                                 MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0 /* CD */
327                         >;
328                 };
329         };
330 };
331
332 &ldb {
333         status = "okay";
334
335         lvds-channel@0 {
336                 fsl,data-mapping = "spwg";
337                 fsl,data-width = <18>;
338                 status = "okay";
339
340                 display-timings {
341                         native-mode = <&timing0>;
342                         timing0: hsd100pxn1 {
343                                 clock-frequency = <65000000>;
344                                 hactive = <1024>;
345                                 vactive = <768>;
346                                 hback-porch = <220>;
347                                 hfront-porch = <40>;
348                                 vback-porch = <21>;
349                                 vfront-porch = <7>;
350                                 hsync-len = <60>;
351                                 vsync-len = <10>;
352                         };
353                 };
354         };
355 };
356
357 &pcie {
358         status = "okay";
359 };
360
361 &pwm1 {
362         pinctrl-names = "default";
363         pinctrl-0 = <&pinctrl_pwm1>;
364         status = "okay";
365 };
366
367 &pwm3 {
368         pinctrl-names = "default";
369         pinctrl-0 = <&pinctrl_pwm3>;
370         status = "okay";
371 };
372
373 &pwm4 {
374         pinctrl-names = "default";
375         pinctrl-0 = <&pinctrl_pwm4>;
376         status = "okay";
377 };
378
379 &ssi1 {
380         fsl,mode = "i2s-slave";
381         status = "okay";
382 };
383
384 &uart1 {
385         pinctrl-names = "default";
386         pinctrl-0 = <&pinctrl_uart1>;
387         status = "okay";
388 };
389
390 &uart2 {
391         pinctrl-names = "default";
392         pinctrl-0 = <&pinctrl_uart2>;
393         status = "okay";
394 };
395
396 &usbh1 {
397         status = "okay";
398 };
399
400 &usbotg {
401         vbus-supply = <&reg_usb_otg_vbus>;
402         pinctrl-names = "default";
403         pinctrl-0 = <&pinctrl_usbotg>;
404         disable-over-current;
405         status = "okay";
406 };
407
408 &usdhc3 {
409         pinctrl-names = "default";
410         pinctrl-0 = <&pinctrl_usdhc3>;
411         cd-gpios = <&gpio7 0 0>;
412         vmmc-supply = <&reg_3p3v>;
413         status = "okay";
414 };
415
416 &usdhc4 {
417         pinctrl-names = "default";
418         pinctrl-0 = <&pinctrl_usdhc4>;
419         cd-gpios = <&gpio2 6 0>;
420         vmmc-supply = <&reg_3p3v>;
421         status = "okay";
422 };