arch/arm/boot/dts/exynos4.dtsi

   1 /*
   2  * Samsung's Exynos4 SoC series common device tree source
   3  *
   4  * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  * Copyright (c) 2010-2011 Linaro Ltd.
   7  *              www.linaro.org
   8  *
   9  * Samsung's Exynos4 SoC series device nodes are listed in this file.  Particular
  10  * SoCs from Exynos4 series can include this file and provide values for SoCs
  11  * specfic bindings.
  12  *
  13  * Note: This file does not include device nodes for all the controllers in
  14  * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
  15  * nodes can be added to this file.
  16  *
  17  * This program is free software; you can redistribute it and/or modify
  18  * it under the terms of the GNU General Public License version 2 as
  19  * published by the Free Software Foundation.
  20  */
  21
  22 #include <dt-bindings/clock/exynos4.h>
  23 #include "skeleton.dtsi"
  24
  25 / {
  26         interrupt-parent = <&gic>;
  27
  28         aliases {
  29                 spi0 = &spi_0;
  30                 spi1 = &spi_1;
  31                 spi2 = &spi_2;
  32                 i2c0 = &i2c_0;
  33                 i2c1 = &i2c_1;
  34                 i2c2 = &i2c_2;
  35                 i2c3 = &i2c_3;
  36                 i2c4 = &i2c_4;
  37                 i2c5 = &i2c_5;
  38                 i2c6 = &i2c_6;
  39                 i2c7 = &i2c_7;
  40                 csis0 = &csis_0;
  41                 csis1 = &csis_1;
  42                 fimc0 = &fimc_0;
  43                 fimc1 = &fimc_1;
  44                 fimc2 = &fimc_2;
  45                 fimc3 = &fimc_3;
  46         };
  47
  48         chipid@10000000 {
  49                 compatible = "samsung,exynos4210-chipid";
  50                 reg = <0x10000000 0x100>;
  51         };
  52
  53         mipi_phy: video-phy@10020710 {
  54                 compatible = "samsung,s5pv210-mipi-video-phy";
  55                 reg = <0x10020710 8>;
  56                 #phy-cells = <1>;
  57         };
  58
  59         pd_mfc: mfc-power-domain@10023C40 {
  60                 compatible = "samsung,exynos4210-pd";
  61                 reg = <0x10023C40 0x20>;
  62         };
  63
  64         pd_g3d: g3d-power-domain@10023C60 {
  65                 compatible = "samsung,exynos4210-pd";
  66                 reg = <0x10023C60 0x20>;
  67         };
  68
  69         pd_lcd0: lcd0-power-domain@10023C80 {
  70                 compatible = "samsung,exynos4210-pd";
  71                 reg = <0x10023C80 0x20>;
  72         };
  73
  74         pd_tv: tv-power-domain@10023C20 {
  75                 compatible = "samsung,exynos4210-pd";
  76                 reg = <0x10023C20 0x20>;
  77         };
  78
  79         pd_cam: cam-power-domain@10023C00 {
  80                 compatible = "samsung,exynos4210-pd";
  81                 reg = <0x10023C00 0x20>;
  82         };
  83
  84         pd_gps: gps-power-domain@10023CE0 {
  85                 compatible = "samsung,exynos4210-pd";
  86                 reg = <0x10023CE0 0x20>;
  87         };
  88
  89         gic: interrupt-controller@10490000 {
  90                 compatible = "arm,cortex-a9-gic";
  91                 #interrupt-cells = <3>;
  92                 interrupt-controller;
  93                 reg = <0x10490000 0x1000>, <0x10480000 0x100>;
  94         };
  95
  96         combiner: interrupt-controller@10440000 {
  97                 compatible = "samsung,exynos4210-combiner";
  98                 #interrupt-cells = <2>;
  99                 interrupt-controller;
 100                 reg = <0x10440000 0x1000>;
 101         };
 102
 103         sys_reg: syscon@10010000 {
 104                 compatible = "samsung,exynos4-sysreg", "syscon";
 105                 reg = <0x10010000 0x400>;
 106         };
 107
 108         camera {
 109                 compatible = "samsung,fimc", "simple-bus";
 110                 status = "disabled";
 111                 #address-cells = <1>;
 112                 #size-cells = <1>;
 113                 ranges;
 114
 115                 clock_cam: clock-controller {
 116                          #clock-cells = <1>;
 117                 };
 118
 119                 fimc_0: fimc@11800000 {
 120                         compatible = "samsung,exynos4210-fimc";
 121                         reg = <0x11800000 0x1000>;
 122                         interrupts = <0 84 0>;
 123                         clocks = <&clock CLK_FIMC0>, <&clock CLK_SCLK_FIMC0>;
 124                         clock-names = "fimc", "sclk_fimc";
 125                         samsung,power-domain = <&pd_cam>;
 126                         samsung,sysreg = <&sys_reg>;
 127                         status = "disabled";
 128                 };
 129
 130                 fimc_1: fimc@11810000 {
 131                         compatible = "samsung,exynos4210-fimc";
 132                         reg = <0x11810000 0x1000>;
 133                         interrupts = <0 85 0>;
 134                         clocks = <&clock CLK_FIMC1>, <&clock CLK_SCLK_FIMC1>;
 135                         clock-names = "fimc", "sclk_fimc";
 136                         samsung,power-domain = <&pd_cam>;
 137                         samsung,sysreg = <&sys_reg>;
 138                         status = "disabled";
 139                 };
 140
 141                 fimc_2: fimc@11820000 {
 142                         compatible = "samsung,exynos4210-fimc";
 143                         reg = <0x11820000 0x1000>;
 144                         interrupts = <0 86 0>;
 145                         clocks = <&clock CLK_FIMC2>, <&clock CLK_SCLK_FIMC2>;
 146                         clock-names = "fimc", "sclk_fimc";
 147                         samsung,power-domain = <&pd_cam>;
 148                         samsung,sysreg = <&sys_reg>;
 149                         status = "disabled";
 150                 };
 151
 152                 fimc_3: fimc@11830000 {
 153                         compatible = "samsung,exynos4210-fimc";
 154                         reg = <0x11830000 0x1000>;
 155                         interrupts = <0 87 0>;
 156                         clocks = <&clock CLK_FIMC3>, <&clock CLK_SCLK_FIMC3>;
 157                         clock-names = "fimc", "sclk_fimc";
 158                         samsung,power-domain = <&pd_cam>;
 159                         samsung,sysreg = <&sys_reg>;
 160                         status = "disabled";
 161                 };
 162
 163                 csis_0: csis@11880000 {
 164                         compatible = "samsung,exynos4210-csis";
 165                         reg = <0x11880000 0x4000>;
 166                         interrupts = <0 78 0>;
 167                         clocks = <&clock CLK_CSIS0>, <&clock CLK_SCLK_CSIS0>;
 168                         clock-names = "csis", "sclk_csis";
 169                         bus-width = <4>;
 170                         samsung,power-domain = <&pd_cam>;
 171                         phys = <&mipi_phy 0>;
 172                         phy-names = "csis";
 173                         status = "disabled";
 174                         #address-cells = <1>;
 175                         #size-cells = <0>;
 176                 };
 177
 178                 csis_1: csis@11890000 {
 179                         compatible = "samsung,exynos4210-csis";
 180                         reg = <0x11890000 0x4000>;
 181                         interrupts = <0 80 0>;
 182                         clocks = <&clock CLK_CSIS1>, <&clock CLK_SCLK_CSIS1>;
 183                         clock-names = "csis", "sclk_csis";
 184                         bus-width = <2>;
 185                         samsung,power-domain = <&pd_cam>;
 186                         phys = <&mipi_phy 2>;
 187                         phy-names = "csis";
 188                         status = "disabled";
 189                         #address-cells = <1>;
 190                         #size-cells = <0>;
 191                 };
 192         };
 193
 194         watchdog@10060000 {
 195                 compatible = "samsung,s3c2410-wdt";
 196                 reg = <0x10060000 0x100>;
 197                 interrupts = <0 43 0>;
 198                 clocks = <&clock CLK_WDT>;
 199                 clock-names = "watchdog";
 200                 status = "disabled";
 201         };
 202
 203         rtc@10070000 {
 204                 compatible = "samsung,s3c6410-rtc";
 205                 reg = <0x10070000 0x100>;
 206                 interrupts = <0 44 0>, <0 45 0>;
 207                 clocks = <&clock CLK_RTC>;
 208                 clock-names = "rtc";
 209                 status = "disabled";
 210         };
 211
 212         keypad@100A0000 {
 213                 compatible = "samsung,s5pv210-keypad";
 214                 reg = <0x100A0000 0x100>;
 215                 interrupts = <0 109 0>;
 216                 clocks = <&clock CLK_KEYIF>;
 217                 clock-names = "keypad";
 218                 status = "disabled";
 219         };
 220
 221         sdhci@12510000 {
 222                 compatible = "samsung,exynos4210-sdhci";
 223                 reg = <0x12510000 0x100>;
 224                 interrupts = <0 73 0>;
 225                 clocks = <&clock CLK_SDMMC0>, <&clock CLK_SCLK_MMC0>;
 226                 clock-names = "hsmmc", "mmc_busclk.2";
 227                 status = "disabled";
 228         };
 229
 230         sdhci@12520000 {
 231                 compatible = "samsung,exynos4210-sdhci";
 232                 reg = <0x12520000 0x100>;
 233                 interrupts = <0 74 0>;
 234                 clocks = <&clock CLK_SDMMC1>, <&clock CLK_SCLK_MMC1>;
 235                 clock-names = "hsmmc", "mmc_busclk.2";
 236                 status = "disabled";
 237         };
 238
 239         sdhci@12530000 {
 240                 compatible = "samsung,exynos4210-sdhci";
 241                 reg = <0x12530000 0x100>;
 242                 interrupts = <0 75 0>;
 243                 clocks = <&clock CLK_SDMMC2>, <&clock CLK_SCLK_MMC2>;
 244                 clock-names = "hsmmc", "mmc_busclk.2";
 245                 status = "disabled";
 246         };
 247
 248         sdhci@12540000 {
 249                 compatible = "samsung,exynos4210-sdhci";
 250                 reg = <0x12540000 0x100>;
 251                 interrupts = <0 76 0>;
 252                 clocks = <&clock CLK_SDMMC3>, <&clock CLK_SCLK_MMC3>;
 253                 clock-names = "hsmmc", "mmc_busclk.2";
 254                 status = "disabled";
 255         };
 256
 257         ehci@12580000 {
 258                 compatible = "samsung,exynos4210-ehci";
 259                 reg = <0x12580000 0x100>;
 260                 interrupts = <0 70 0>;
 261                 clocks = <&clock CLK_USB_HOST>;
 262                 clock-names = "usbhost";
 263                 status = "disabled";
 264         };
 265
 266         ohci@12590000 {
 267                 compatible = "samsung,exynos4210-ohci";
 268                 reg = <0x12590000 0x100>;
 269                 interrupts = <0 70 0>;
 270                 clocks = <&clock CLK_USB_HOST>;
 271                 clock-names = "usbhost";
 272                 status = "disabled";
 273         };
 274
 275         mfc: codec@13400000 {
 276                 compatible = "samsung,mfc-v5";
 277                 reg = <0x13400000 0x10000>;
 278                 interrupts = <0 94 0>;
 279                 samsung,power-domain = <&pd_mfc>;
 280                 clocks = <&clock CLK_MFC>;
 281                 clock-names = "mfc";
 282                 status = "disabled";
 283         };
 284
 285         serial@13800000 {
 286                 compatible = "samsung,exynos4210-uart";
 287                 reg = <0x13800000 0x100>;
 288                 interrupts = <0 52 0>;
 289                 clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>;
 290                 clock-names = "uart", "clk_uart_baud0";
 291                 status = "disabled";
 292         };
 293
 294         serial@13810000 {
 295                 compatible = "samsung,exynos4210-uart";
 296                 reg = <0x13810000 0x100>;
 297                 interrupts = <0 53 0>;
 298                 clocks = <&clock CLK_UART1>, <&clock CLK_SCLK_UART1>;
 299                 clock-names = "uart", "clk_uart_baud0";
 300                 status = "disabled";
 301         };
 302
 303         serial@13820000 {
 304                 compatible = "samsung,exynos4210-uart";
 305                 reg = <0x13820000 0x100>;
 306                 interrupts = <0 54 0>;
 307                 clocks = <&clock CLK_UART2>, <&clock CLK_SCLK_UART2>;
 308                 clock-names = "uart", "clk_uart_baud0";
 309                 status = "disabled";
 310         };
 311
 312         serial@13830000 {
 313                 compatible = "samsung,exynos4210-uart";
 314                 reg = <0x13830000 0x100>;
 315                 interrupts = <0 55 0>;
 316                 clocks = <&clock CLK_UART3>, <&clock CLK_SCLK_UART3>;
 317                 clock-names = "uart", "clk_uart_baud0";
 318                 status = "disabled";
 319         };
 320
 321         i2c_0: i2c@13860000 {
 322                 #address-cells = <1>;
 323                 #size-cells = <0>;
 324                 compatible = "samsung,s3c2440-i2c";
 325                 reg = <0x13860000 0x100>;
 326                 interrupts = <0 58 0>;
 327                 clocks = <&clock CLK_I2C0>;
 328                 clock-names = "i2c";
 329                 pinctrl-names = "default";
 330                 pinctrl-0 = <&i2c0_bus>;
 331                 status = "disabled";
 332         };
 333
 334         i2c_1: i2c@13870000 {
 335                 #address-cells = <1>;
 336                 #size-cells = <0>;
 337                 compatible = "samsung,s3c2440-i2c";
 338                 reg = <0x13870000 0x100>;
 339                 interrupts = <0 59 0>;
 340                 clocks = <&clock CLK_I2C1>;
 341                 clock-names = "i2c";
 342                 pinctrl-names = "default";
 343                 pinctrl-0 = <&i2c1_bus>;
 344                 status = "disabled";
 345         };
 346
 347         i2c_2: i2c@13880000 {
 348                 #address-cells = <1>;
 349                 #size-cells = <0>;
 350                 compatible = "samsung,s3c2440-i2c";
 351                 reg = <0x13880000 0x100>;
 352                 interrupts = <0 60 0>;
 353                 clocks = <&clock CLK_I2C2>;
 354                 clock-names = "i2c";
 355                 status = "disabled";
 356         };
 357
 358         i2c_3: i2c@13890000 {
 359                 #address-cells = <1>;
 360                 #size-cells = <0>;
 361                 compatible = "samsung,s3c2440-i2c";
 362                 reg = <0x13890000 0x100>;
 363                 interrupts = <0 61 0>;
 364                 clocks = <&clock CLK_I2C3>;
 365                 clock-names = "i2c";
 366                 status = "disabled";
 367         };
 368
 369         i2c_4: i2c@138A0000 {
 370                 #address-cells = <1>;
 371                 #size-cells = <0>;
 372                 compatible = "samsung,s3c2440-i2c";
 373                 reg = <0x138A0000 0x100>;
 374                 interrupts = <0 62 0>;
 375                 clocks = <&clock CLK_I2C4>;
 376                 clock-names = "i2c";
 377                 status = "disabled";
 378         };
 379
 380         i2c_5: i2c@138B0000 {
 381                 #address-cells = <1>;
 382                 #size-cells = <0>;
 383                 compatible = "samsung,s3c2440-i2c";
 384                 reg = <0x138B0000 0x100>;
 385                 interrupts = <0 63 0>;
 386                 clocks = <&clock CLK_I2C5>;
 387                 clock-names = "i2c";
 388                 status = "disabled";
 389         };
 390
 391         i2c_6: i2c@138C0000 {
 392                 #address-cells = <1>;
 393                 #size-cells = <0>;
 394                 compatible = "samsung,s3c2440-i2c";
 395                 reg = <0x138C0000 0x100>;
 396                 interrupts = <0 64 0>;
 397                 clocks = <&clock CLK_I2C6>;
 398                 clock-names = "i2c";
 399                 status = "disabled";
 400         };
 401
 402         i2c_7: i2c@138D0000 {
 403                 #address-cells = <1>;
 404                 #size-cells = <0>;
 405                 compatible = "samsung,s3c2440-i2c";
 406                 reg = <0x138D0000 0x100>;
 407                 interrupts = <0 65 0>;
 408                 clocks = <&clock CLK_I2C7>;
 409                 clock-names = "i2c";
 410                 status = "disabled";
 411         };
 412
 413         spi_0: spi@13920000 {
 414                 compatible = "samsung,exynos4210-spi";
 415                 reg = <0x13920000 0x100>;
 416                 interrupts = <0 66 0>;
 417                 dmas = <&pdma0 7>, <&pdma0 6>;
 418                 dma-names = "tx", "rx";
 419                 #address-cells = <1>;
 420                 #size-cells = <0>;
 421                 clocks = <&clock CLK_SPI0>, <&clock CLK_SCLK_SPI0>;
 422                 clock-names = "spi", "spi_busclk0";
 423                 pinctrl-names = "default";
 424                 pinctrl-0 = <&spi0_bus>;
 425                 status = "disabled";
 426         };
 427
 428         spi_1: spi@13930000 {
 429                 compatible = "samsung,exynos4210-spi";
 430                 reg = <0x13930000 0x100>;
 431                 interrupts = <0 67 0>;
 432                 dmas = <&pdma1 7>, <&pdma1 6>;
 433                 dma-names = "tx", "rx";
 434                 #address-cells = <1>;
 435                 #size-cells = <0>;
 436                 clocks = <&clock CLK_SPI1>, <&clock CLK_SCLK_SPI1>;
 437                 clock-names = "spi", "spi_busclk0";
 438                 pinctrl-names = "default";
 439                 pinctrl-0 = <&spi1_bus>;
 440                 status = "disabled";
 441         };
 442
 443         spi_2: spi@13940000 {
 444                 compatible = "samsung,exynos4210-spi";
 445                 reg = <0x13940000 0x100>;
 446                 interrupts = <0 68 0>;
 447                 dmas = <&pdma0 9>, <&pdma0 8>;
 448                 dma-names = "tx", "rx";
 449                 #address-cells = <1>;
 450                 #size-cells = <0>;
 451                 clocks = <&clock CLK_SPI2>, <&clock CLK_SCLK_SPI2>;
 452                 clock-names = "spi", "spi_busclk0";
 453                 pinctrl-names = "default";
 454                 pinctrl-0 = <&spi2_bus>;
 455                 status = "disabled";
 456         };
 457
 458         pwm@139D0000 {
 459                 compatible = "samsung,exynos4210-pwm";
 460                 reg = <0x139D0000 0x1000>;
 461                 interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
 462                 clocks = <&clock CLK_PWM>;
 463                 clock-names = "timers";
 464                 #pwm-cells = <2>;
 465                 status = "disabled";
 466         };
 467
 468         amba {
 469                 #address-cells = <1>;
 470                 #size-cells = <1>;
 471                 compatible = "arm,amba-bus";
 472                 interrupt-parent = <&gic>;
 473                 ranges;
 474
 475                 pdma0: pdma@12680000 {
 476                         compatible = "arm,pl330", "arm,primecell";
 477                         reg = <0x12680000 0x1000>;
 478                         interrupts = <0 35 0>;
 479                         clocks = <&clock CLK_PDMA0>;
 480                         clock-names = "apb_pclk";
 481                         #dma-cells = <1>;
 482                         #dma-channels = <8>;
 483                         #dma-requests = <32>;
 484                 };
 485
 486                 pdma1: pdma@12690000 {
 487                         compatible = "arm,pl330", "arm,primecell";
 488                         reg = <0x12690000 0x1000>;
 489                         interrupts = <0 36 0>;
 490                         clocks = <&clock CLK_PDMA1>;
 491                         clock-names = "apb_pclk";
 492                         #dma-cells = <1>;
 493                         #dma-channels = <8>;
 494                         #dma-requests = <32>;
 495                 };
 496
 497                 mdma1: mdma@12850000 {
 498                         compatible = "arm,pl330", "arm,primecell";
 499                         reg = <0x12850000 0x1000>;
 500                         interrupts = <0 34 0>;
 501                         clocks = <&clock CLK_MDMA>;
 502                         clock-names = "apb_pclk";
 503                         #dma-cells = <1>;
 504                         #dma-channels = <8>;
 505                         #dma-requests = <1>;
 506                 };
 507         };
 508
 509         fimd: fimd@11c00000 {
 510                 compatible = "samsung,exynos4210-fimd";
 511                 interrupt-parent = <&combiner>;
 512                 reg = <0x11c00000 0x20000>;
 513                 interrupt-names = "fifo", "vsync", "lcd_sys";
 514                 interrupts = <11 0>, <11 1>, <11 2>;
 515                 clocks = <&clock CLK_SCLK_FIMD0>, <&clock CLK_FIMD0>;
 516                 clock-names = "sclk_fimd", "fimd";
 517                 samsung,power-domain = <&pd_lcd0>;
 518                 status = "disabled";
 519         };
 520 };