arch/arc/boot/dts/abilis_tb10x.dtsi

   1 /*
   2  * Abilis Systems TB10X SOC device tree
   3  *
   4  * Copyright (C) Abilis Systems 2013
   5  *
   6  * Author: Christian Ruppert <christian.ruppert@abilis.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  20  */
  21
  22
  23 / {
  24         compatible              = "abilis,arc-tb10x";
  25         #address-cells          = <1>;
  26         #size-cells             = <1>;
  27
  28         cpus {
  29                 #address-cells = <1>;
  30                 #size-cells = <0>;
  31                 cpu@0 {
  32                         device_type = "cpu";
  33                         compatible = "snps,arc770d";
  34                         reg = <0>;
  35                 };
  36         };
  37
  38         soc100 {
  39                 #address-cells  = <1>;
  40                 #size-cells     = <1>;
  41                 device_type     = "soc";
  42                 ranges          = <0xfe000000 0xfe000000 0x02000000
  43                                 0x000F0000 0x000F0000 0x00010000>;
  44                 compatible      = "abilis,tb10x", "simple-bus";
  45
  46                 pll0: oscillator {
  47                         compatible = "fixed-clock";
  48                         #clock-cells = <0>;
  49                         clock-output-names = "pll0";
  50                 };
  51                 cpu_clk: clkdiv_cpu {
  52                         compatible = "fixed-factor-clock";
  53                         #clock-cells = <0>;
  54                         clocks = <&pll0>;
  55                         clock-output-names = "cpu_clk";
  56                 };
  57                 ahb_clk: clkdiv_ahb {
  58                         compatible = "fixed-factor-clock";
  59                         #clock-cells = <0>;
  60                         clocks = <&pll0>;
  61                         clock-output-names = "ahb_clk";
  62                 };
  63
  64                 iomux: iomux@FF10601c {
  65                         #address-cells = <1>;
  66                         #size-cells = <1>;
  67                         compatible = "abilis,tb10x-iomux";
  68                         reg = <0xFF10601c 0x4>;
  69                 };
  70
  71                 intc: interrupt-controller {
  72                         compatible = "snps,arc700-intc";
  73                         interrupt-controller;
  74                         #interrupt-cells = <1>;
  75                 };
  76                 tb10x_ictl: pic@fe002000 {
  77                         compatible = "abilis,tb10x-ictl";
  78                         reg = <0xFE002000 0x20>;
  79                         interrupt-controller;
  80                         #interrupt-cells = <2>;
  81                         interrupt-parent = <&intc>;
  82                         interrupts = <5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
  83                                         20 21 22 23 24 25 26 27 28 29 30 31>;
  84                 };
  85
  86                 uart@FF100000 {
  87                         compatible = "snps,dw-apb-uart";
  88                         reg = <0xFF100000 0x100>;
  89                         clock-frequency = <166666666>;
  90                         interrupts = <25 8>;
  91                         reg-shift = <2>;
  92                         reg-io-width = <4>;
  93                         interrupt-parent = <&tb10x_ictl>;
  94                 };
  95                 ethernet@FE100000 {
  96                         compatible = "snps,dwmac-3.70a","snps,dwmac";
  97                         reg = <0xFE100000 0x1058>;
  98                         interrupt-parent = <&tb10x_ictl>;
  99                         interrupts = <6 8>;
 100                         interrupt-names = "macirq";
 101                         clocks = <&ahb_clk>;
 102                         clock-names = "stmmaceth";
 103                 };
 104                 dma@FE000000 {
 105                         compatible = "snps,dma-spear1340";
 106                         reg = <0xFE000000 0x400>;
 107                         interrupt-parent = <&tb10x_ictl>;
 108                         interrupts = <14 8>;
 109                         dma-channels = <6>;
 110                         dma-requests = <0>;
 111                         dma-masters = <1>;
 112                         #dma-cells = <3>;
 113                         chan_allocation_order = <0>;
 114                         chan_priority = <1>;
 115                         block_size = <0x7ff>;
 116                         data_width = <2 0 0 0>;
 117                         clocks = <&ahb_clk>;
 118                         clock-names = "hclk";
 119                 };
 120
 121                 i2c0: i2c@FF120000 {
 122                         #address-cells = <1>;
 123                         #size-cells = <0>;
 124                         compatible = "snps,designware-i2c";
 125                         reg = <0xFF120000 0x1000>;
 126                         interrupt-parent = <&tb10x_ictl>;
 127                         interrupts = <12 8>;
 128                         clocks = <&ahb_clk>;
 129                 };
 130                 i2c1: i2c@FF121000 {
 131                         #address-cells = <1>;
 132                         #size-cells = <0>;
 133                         compatible = "snps,designware-i2c";
 134                         reg = <0xFF121000 0x1000>;
 135                         interrupt-parent = <&tb10x_ictl>;
 136                         interrupts = <12 8>;
 137                         clocks = <&ahb_clk>;
 138                 };
 139                 i2c2: i2c@FF122000 {
 140                         #address-cells = <1>;
 141                         #size-cells = <0>;
 142                         compatible = "snps,designware-i2c";
 143                         reg = <0xFF122000 0x1000>;
 144                         interrupt-parent = <&tb10x_ictl>;
 145                         interrupts = <12 8>;
 146                         clocks = <&ahb_clk>;
 147                 };
 148                 i2c3: i2c@FF123000 {
 149                         #address-cells = <1>;
 150                         #size-cells = <0>;
 151                         compatible = "snps,designware-i2c";
 152                         reg = <0xFF123000 0x1000>;
 153                         interrupt-parent = <&tb10x_ictl>;
 154                         interrupts = <12 8>;
 155                         clocks = <&ahb_clk>;
 156                 };
 157                 i2c4: i2c@FF124000 {
 158                         #address-cells = <1>;
 159                         #size-cells = <0>;
 160                         compatible = "snps,designware-i2c";
 161                         reg = <0xFF124000 0x1000>;
 162                         interrupt-parent = <&tb10x_ictl>;
 163                         interrupts = <12 8>;
 164                         clocks = <&ahb_clk>;
 165                 };
 166
 167                 spi0: spi@0xFE010000 {
 168                         #address-cells = <1>;
 169                         #size-cells = <0>;
 170                         cell-index = <0>;
 171                         compatible = "abilis,tb100-spi";
 172                         num-cs = <1>;
 173                         reg = <0xFE010000 0x20>;
 174                         interrupt-parent = <&tb10x_ictl>;
 175                         interrupts = <26 8>;
 176                         clocks = <&ahb_clk>;
 177                 };
 178                 spi1: spi@0xFE011000 {
 179                         #address-cells = <1>;
 180                         #size-cells = <0>;
 181                         cell-index = <1>;
 182                         compatible = "abilis,tb100-spi";
 183                         num-cs = <2>;
 184                         reg = <0xFE011000 0x20>;
 185                         interrupt-parent = <&tb10x_ictl>;
 186                         interrupts = <10 8>;
 187                         clocks = <&ahb_clk>;
 188                 };
 189
 190                 tb10x_tsm: tb10x-tsm@ff316000 {
 191                         compatible = "abilis,tb100-tsm";
 192                         reg = <0xff316000 0x400>;
 193                         interrupt-parent = <&tb10x_ictl>;
 194                         interrupts = <17 8>;
 195                         output-clkdiv = <4>;
 196                         global-packet-delay = <0x21>;
 197                         port-packet-delay = <0>;
 198                 };
 199                 tb10x_stream_proc: tb10x-stream-proc {
 200                         compatible = "abilis,tb100-streamproc";
 201                         reg =   <0xfff00000 0x200>,
 202                                 <0x000f0000 0x10000>,
 203                                 <0xfff00200 0x105>,
 204                                 <0xff10600c 0x1>,
 205                                 <0xfe001018 0x1>;
 206                         reg-names =     "mbox",
 207                                         "sp_iccm",
 208                                         "mbox_irq",
 209                                         "cpuctrl",
 210                                         "a6it_int_force";
 211                         interrupt-parent = <&tb10x_ictl>;
 212                         interrupts = <20 2>, <19 2>;
 213                         interrupt-names = "cmd_irq", "event_irq";
 214                 };
 215                 tb10x_mdsc0: tb10x-mdscr@FF300000 {
 216                         compatible = "abilis,tb100-mdscr";
 217                         reg = <0xFF300000 0x7000>;
 218                         tb100-mdscr-manage-tsin;
 219                 };
 220                 tb10x_mscr0: tb10x-mdscr@FF307000 {
 221                         compatible = "abilis,tb100-mdscr";
 222                         reg = <0xFF307000 0x7000>;
 223                 };
 224                 tb10x_scr0: tb10x-mdscr@ff30e000 {
 225                         compatible = "abilis,tb100-mdscr";
 226                         reg = <0xFF30e000 0x4000>;
 227                         tb100-mdscr-manage-tsin;
 228                 };
 229                 tb10x_scr1: tb10x-mdscr@ff312000 {
 230                         compatible = "abilis,tb100-mdscr";
 231                         reg = <0xFF312000 0x4000>;
 232                         tb100-mdscr-manage-tsin;
 233                 };
 234                 tb10x_wfb: tb10x-wfb@ff319000 {
 235                         compatible = "abilis,tb100-wfb";
 236                         reg = <0xff319000 0x1000>;
 237                         interrupt-parent = <&tb10x_ictl>;
 238                         interrupts = <16 8>;
 239                 };
 240         };
 241 };